Update target fns to latest main

Author: hegza

compiler/rustc_target/src/spec/targets/riscv32e_unknown_none_elf.rs

@@ -1,11 +1,17 @@
 usecrate::spec::{Cc,LinkerFlavor,Lld,PanicStrategy,RelocModel,Target,TargetOptions};
 
-pubfntarget() -> Target{
+pub(crate)fntarget() -> Target{
 Target{
 // The below `data_layout` is explicitly specified by the ilp32e ABI in LLVM. See also
 // `options.llvm_abiname`.
 data_layout:"e-m:e-p:32:32-i64:64-n32-S32".into(),
 llvm_target:"riscv32".into(),
+metadata:crate::spec::TargetMetadata{
+description:Some("Bare RISC-V (RV32E ISA)".into()),
+tier:Some(3),
+host_tools:Some(false),
+std:Some(false),
+},
 pointer_width:32,
 arch:"riscv32".into(),
 

compiler/rustc_target/src/spec/targets/riscv32em_unknown_none_elf.rs

@@ -1,11 +1,17 @@
 usecrate::spec::{Cc,LinkerFlavor,Lld,PanicStrategy,RelocModel,Target,TargetOptions};
 
-pubfntarget() -> Target{
+pub(crate)fntarget() -> Target{
 Target{
 // The below `data_layout` is explicitly specified by the ilp32e ABI in LLVM. See also
 // `options.llvm_abiname`.
 data_layout:"e-m:e-p:32:32-i64:64-n32-S32".into(),
 llvm_target:"riscv32".into(),
+metadata:crate::spec::TargetMetadata{
+description:Some("Bare RISC-V (RV32EM ISA)".into()),
+tier:Some(3),
+host_tools:Some(false),
+std:Some(false),
+},
 pointer_width:32,
 arch:"riscv32".into(),
 

compiler/rustc_target/src/spec/targets/riscv32emc_unknown_none_elf.rs

@@ -1,11 +1,17 @@
 usecrate::spec::{Cc,LinkerFlavor,Lld,PanicStrategy,RelocModel,Target,TargetOptions};
 
-pubfntarget() -> Target{
+pub(crate)fntarget() -> Target{
 Target{
 // The below `data_layout` is explicitly specified by the ilp32e ABI in LLVM. See also
 // `options.llvm_abiname`.
 data_layout:"e-m:e-p:32:32-i64:64-n32-S32".into(),
 llvm_target:"riscv32".into(),
+metadata:crate::spec::TargetMetadata{
+description:Some("Bare RISC-V (RV32EMC ISA)".into()),
+tier:Some(3),
+host_tools:Some(false),
+std:Some(false),
+},
 pointer_width:32,
 arch:"riscv32".into(),