IPC3 based topology related questions for Multi link SoundWire aggregation use case

[vijendarmukunda]

We are working on Soundwire aggregation implementation using two SoundWire manager instances.
We are using IPC3 mechanism. We do have few questions on topology creation. We have found reference topology based on IPC4.
We have refered sof-icl-rt711-rt1308-rt715-hdmi.m4 for IPC3 implementation. It's not matching our requirement.

In our implementation, we have populating single PCM device(Speaker) and two Soundwire DAI's (for ex. SW0 Pin2 & SW1 Pin2).
How the second DAI can be linked in the pipeline? Is there any virtual DAI concept exists in IPC3 implementation?

[vijendarmukunda]

@bardliao@plbossart@lgirdwood : Could you please help to comment?

[bardliao]

@vijendarmukunda sof-icl-rt711-rt1308-rt715-hdmi.m4 should be a good reference and probably the only reference for IPC3 SoundWire aggregation. We use demux to connect the 2 pipelines. And AMP_1_LINK and AMP_2_LINK are for the 2 link numbers. And MONO should not be defined in aggregated mode.
Note that you need to switch to the stable-v2.2 to read the sof-icl-rt711-rt1308-rt715-hdmi.m4 file.
https://github.com/thesofproject/sof/blob/stable-v2.2/tools/topology/topology1/sof-icl-rt711-rt1308-rt715-hdmi.m4
It is not in the main branch anymore.

[vijendarmukunda]

Thanks @bardliao for quick reply.

Hi Bard,

We do have few more questions.

1. We tried to build the topology to check the graphical view of the topology.
   We hit with below build errors.

m4 -I m4 -I common -I platform/common --define=GRAPH sof-icl-rt711-rt1308-rt715-hdmi.m4 > test.dot
m4:sof-icl-rt711-rt1308-rt715-hdmi.m4:25: cannot open `platform/intel/PLATFORM.m4': No such file or directory
digraph topology {
node [color=Red,fontname=Courier]
edge [color=Blue, style=dashed]

Could you please help in this regard?

2. Why to create PCM40 pcm device, Does PCM2 device is not enough to drive two DAI's?
   As per aggregation concept, one PCM device being used which will drive pcm data to two DAI's.
   Is there any virtual dai concept is not available like in IPC4?

[bardliao]

Thanks @bardliao for quick reply.

Hi Bard,

We do have few more questions.

1. We tried to build the topology to check the graphical view of the topology.
   We hit with below build errors.

m4 -I m4 -I common -I platform/common --define=GRAPH sof-icl-rt711-rt1308-rt715-hdmi.m4 > test.dot m4:sof-icl-rt711-rt1308-rt715-hdmi.m4:25: cannot open `platform/intel/PLATFORM.m4': No such file or directory digraph topology { node [color=Red,fontname=Courier] edge [color=Blue, style=dashed]

Could you please help in this regard?

You need to define PLATFORM. Like -DPLATFORM=tgl.
Not sure if you can remove include(platform/intel/'PLATFORM.m4') from sof-icl-rt711-rt1308-rt715-hdmi.m4

The graphic of sof-icl-rt711-rt1308-rt715.tplg is

2. Why to create PCM40 pcm device, Does PCM2 device is not enough to drive two DAI's?
   As per aggregation concept, one PCM device being used which will drive pcm data to two DAI's.
   Is there any virtual dai concept is not available like in IPC4?

I am not familiar with PCM40, but look the graphic above and https://github.com/thesofproject/sof/blob/main/tools/topology/topology1/sof/pipe-dai-endpoint.m4
I guess PCM40 is just a buffer for the SDW DAI. And that is required for the aggregation DAIs.

@ranj063@singalsu Please correct me if I am wrong.

[vijendarmukunda]

@bardliao
Hi Bard,

We have tried to replicate the topology on AMD side. we are observing topology component load failures while connecting the second DAI widget.
Our use case is we are connecting two speaker codecs on SW0 & SW1 instance.
CPU pins: SW0 PIN1 , SW1 PIN1
DAI link stream name: SW0-PIN1-PLAYBACK
DAPM Widgets : ACP_SW1.OUT and ACP_SW65.out . here 64 is the relative offset for second instance.
Could you please help to review m4 file (attached) and let us know if we are missing any thing?

From dmesg logs:
[ 51.762496] amd_sof_sdw amd_sof_sdw: ASoC: creating DAPM widget ACP_SDW65.OUT id 13
[ 51.762497] snd_sof_amd_acp70 0000:c4:00.5: tplg: widget 9 (ACP_SDW65.OUT) is ready [type: 27, pipe: 3, pins: 0 / 0, stream: SDW1-PIN1-PLAYBACK]
[ 51.762499] snd_sof_amd_acp70 0000:c4:00.5: rtd->dai_link->stream_name:SDW0-PIN1-PLAYBACK w->sname:SDW1-PIN1-PLAYBACK
[ 51.762500] snd_sof_amd_acp70 0000:c4:00.5: error: can't connect DAI ACP_SDW65.OUT stream SDW1-PIN1-PLAYBACK
[ 51.762501] snd_sof_amd_acp70 0000:c4:00.5: failed to add widget type 27 name : ACP_SDW65.OUT stream SDW1-PIN1-PLAYBACK
[ 51.762503] amd_sof_sdw amd_sof_sdw: ASoC: failed to load widget ACP_SDW65.OUT
[ 51.762504] amd_sof_sdw amd_sof_sdw: ASoC: topology: could not load header: -22

Attaching logs , m4 file and graphical view of our topology.

Multi_link_sdw_aggregation_failure_logs_3004.txt
sof-acp_7_0_sdw.zip

[bardliao]

@vijendarmukunda Can you use DAI_BE_SDW0_ACP_SW_BT_TX instead of DAI_BE_SDW1_ACP_P1_SW_BT_TX below?

DAI_ADD_SCHED(sof/pipe-dai-sched-playback.m4,
3, ACP_SDW, DI_SDW1_ACP_P1_SW_BT_TX, DAI_BE_SDW1_ACP_P1_SW_BT_TX,
PIPELINE_SOURCE_3, 2, s16le,
2000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA,
PIPELINE_PLAYBACK_SCHED_COMP_2)

In the aggregation mode, you just have one dai link which is SDW0-PIN1-PLAYBACK, right? And the 2 dai widgets share the same dai link.

[vijendarmukunda]

@bardliao : Thanks for your support. With your suggestions, we are able to resolve topology related failures. Now topology loading is successful and able to register the sound card.