Digital Design Interview Questions

This repository contains structured solutions and hardware designs for common digital design interview questions covering binary arithmetic, FSMs, pipelining, combinational logic, HDLs (Verilog/VHDL), and Assembly.

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Table of Contents

• Part 1: BCD & Binary Arithmetic
  • Max product of $N$-bit numbers
  • BCD representation rationale
  • 8-Bit BCD Adder architecture
• Part 2: FSM & Sequential Logic
  • FSM state transitions & analysis
  • Latches vs. Flip-Flops comparison
• Part 3: Pipelining & Processor Architecture
  • Pipeline throughput & depth limitations
  • Data, control, and structural hazards
  • Superscalar architectures
• Part 4: Combinational Logic Circuits
  • Circuit timing analysis
  • 31-Day Month Detector optimization
  • Tristate Buffers
• Part 5: HDL Coding (Verilog & VHDL)
  • Mux implementation in VHDL/Verilog
  • Blocking vs. Nonblocking assignments & VHDL equivalents
• Part 6: Assembly Language & Low-Level Programming
  • XOR variable swap in ARM Assembly

Reference