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Development-Modules

Overview

Verified Verilog IP modules for FPGA-based applications. Each module targets cycle-accurate, fully synchronous behavior verified against available documentation such as manufacturer datasheets, user and data manuals, and gate-level schematics traced from silicon.

Available Modules

CPU

ModuleDeviceDescription
x6502MOS Technology 6502NMOS 8-bit Microprocessor
x65c02Rockwell R65C02CMOS 8-bit Microprocessor
x68705Motorola MC68705P3M6805 based 8-bit EPROM MCU

Sound

ModuleDeviceDescription
x76489Texas Instruments SN76489ANDigital Complex Sound Generator
x8910General Instrument AY-3-8910Programmable Sound Generator

Design Principles

  • Fully Synchronous: All state changes on posedge clk with clock enable. No latches or asynchronous logic.
  • Register Compatible: Internal register maps match original device specifications.
  • Datasheet Verified: All behavior cross-referenced against original manufacturer documentation.
  • Simulation Proven: Each module includes a comprehensive ModelSim testbench with documented results.

License

This work is licensed under the Creative Commons Attribution-NonCommercial 4.0 International License (CC BY-NC 4.0). You may use, share, and modify this code for non-commercial purposes, provided that proper credit is given.

Support

Please consider supporting this and future projects by joining the Coin-Op Collection Patreon.


About

This repository contains cycle-accurate, fully synchronous Verilog IP modules developed by Coin-Op Collection for FPGA-based applications.

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