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docs(CLAUDE.md): remove follow-ups completed by Phase C.5 - #42

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docs/claude-md-phase-c5-cleanup
May 15, 2026
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docs(CLAUDE.md): remove follow-ups completed by Phase C.5#42
JC-000 merged 1 commit into
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docs/claude-md-phase-c5-cleanup

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Summary

Cleans two CLAUDE.md entries whose described work is now landed on master via PR #41 (Phase C.5).

Change 1 — MEMORY requirements paragraph (lines 87-100)

Removed: "the sibling overlay integration in Phase C.1 was rolled back — see Known issues"

Replaced with the current state — default build (in-tree x25519, banks 0-1 free) and `USE_X25519_SIBLING=1` (sibling `reu_mul_init` populates banks 0-5; collisions with the P-256/P-384 precompute reservations are theoretical only — P-256 uses `ec_scalar_mul_var` with no precompute, P-384 is stubbed).

Change 2 — CRYPTO_OVERLAY collision Known-Issues entry (lines 360-373)

Removed: the historical `ROUTINE_ADDR=$4200 → $5100` defensive relocation as the documented fix.

Replaced with the actual landed solution: the harness migrated to `MemoryArbiter` + `MemoryPolicy` (`tools/uci/_memory_policy.py` factory). The transport-layer write guard from c64-test-harness PR #95 now raises `MemoryPolicyError` on a collision before any byte crosses the wire. New `tools/uci/` scripts should reuse `build_policy_and_arbiter()` rather than hardcode addresses.

Test plan

  • Documentation only — no code, no build, no behaviour change

🤖 Generated with Claude Code

Two entries described work that has now landed on master:
1. The MEMORY requirements paragraph claimed "the sibling overlay
integration in Phase C.1 was rolled back — see Known issues."
That's historical; Phase C.5 (PR #41) landed a working flag-gated
sibling integration. Replaced with the current dual-state
description (default build leaves banks 0-1 free; sibling build
populates banks 0-5).
2. The "CRYPTO_OVERLAY address collision lesson" entry described
relocating ROUTINE_ADDR to $5100 as the fix. That defensive hack
was superseded by the MemoryPolicy + MemoryArbiter adoption in
PR #41's second commit (tools/uci/_memory_policy.py). Rewrote the
entry to point at the now-active safety mechanism: every
tools/uci/* script derives its scratch addresses from the arbiter,
and the c64-test-harness PR #95 transport-layer write guard
catches any future collision before a byte crosses the wire.
No behaviour change — documentation only.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
@JC-000
JC-000 merged commit 13c3067 into masterMay 15, 2026
@JC-000
JC-000 deleted the docs/claude-md-phase-c5-cleanup branch May 15, 2026 12:17
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