Kastner Research Group

formal_axi Public

Verilog 0 0 0 0 Updated Aug 10, 2026

krg-infra Public

Flake packages for Basic KRG Server Infrastructure

Python 0MIT 1 73 2 Updated Aug 10, 2026

cgra4ml Public

An Open Workflow to Build Custom SoCs and run Deep Models at the Edge

SystemVerilog 126Apache-2.0 28 3 2 Updated Aug 7, 2026

AFLplusplus Public Forked from AFLplusplus/AFLplusplus

The fuzzer afl++ is afl with community patches, qemu 5.1 upgrade, collision-free coverage, enhanced laf-intel & redqueen, AFLfast++ power schedules, MOpt mutators, unicorn_mode, and a lot more!

C 0AGPL-3.0 1,351 0 0 Updated Jul 25, 2026

fuzz_fuss Public Forked from supra-nlpn/FuSS

This repository contains the full implementation of FuSS (Firmware-based Symbolic-guided SoC Fuzzing)

Python 0MIT 1 0 0 Updated Jul 19, 2026

aie4ml Public Forked from dimdano/aie4ml

A plugin backend for hls4ml targeting AMD AI Engines (AIE)

Python 0Apache-2.0 6 0 0 Updated Jun 27, 2026

hls4ml Public Forked from fastmachinelearning/hls4ml

Machine learning on FPGAs using HLS

Python 2Apache-2.0 580 0 0 Updated Jun 24, 2026

fuzz_symbfuzz Public Forked from ssmiftah/SymbFuzz

Python 0Apache-2.0 2 0 0 Updated Jun 20, 2026

arbolta Public Forked from Xilinx/arbolta

Gate-level simulator for efficient hardware-software co-design.

Rust 0MIT 4 0 0 Updated Jun 20, 2026

FlooNoC Public Forked from pulp-platform/FlooNoC

A Fast, Low-Overhead On-chip Network

SystemVerilog 0Apache-2.0 73 0 0 Updated Jun 19, 2026

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