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158 workflow runs

158 workflow runs

applies clang-format CI #36: Commit 6cf6914 pushed by eyck

7m 46s main

7m 46s

fixes PMP and memory access handling CI #35: Commit 07655a2 pushed by eyck

8m 6s main

8m 6s

Changes register alias name handling for RVE based cores CI #34: Commit f14847a pushed by eyck

7m 42s main

7m 42s

applies clang-format CI #33: Commit a4b4735 pushed by eyck

7m 27s main

7m 27s

adds some decoder debugging aids CI #32: Commit ce87cb3 pushed by eyck

11m 3s main

11m 3s

updates src/vm/interp/vm_tgc5c.cpp with latest CoreDSL changes CI #31: Commit 648be18 pushed by eyck

8m 34s main

8m 34s

updates interp/vm_tgc5c according to latest coredsl gen CI #30: Commit 19bdd3a pushed by eyck

7m 35s main

7m 35s

fixes mideleg write behavior for 64bit CI #29: Commit 3613714 pushed by eyck

8m 15s main

8m 15s

applies clang-format CI #28: Commit d8e235a pushed by eyck

7m 43s main

7m 43s

fixes wrong mideleg behavior CI #27: Commit f82f932 pushed by eyck

8m 9s main

8m 9s

fixes core registrations CI #26: Commit 6f5400d pushed by eyck

8m 5s main

8m 5s

fixes PMP size for tests CI #25: Commit 5b84193 pushed by eyck

8m 8s main

8m 8s

changes default number of PMP addr registers to 16 (standard for RV32) CI #24: Commit 6c80009 pushed by eyck

7m 50s main

7m 50s

adds option to exclude generic cores from build to speedup build CI #23: Commit b0ffd4c pushed by eyck

10m 55s main

10m 55s

updates core hash in FetchContent CI #22: Commit 0a709af pushed by eyck

8m 5s main

8m 5s

Feature/iif upgrades CI #21: Pull request #53 synchronize by EAlexJ

8m 21s feature/iif_upgrades

feature/iif_upgrades

8m 21s

updates core hash in FetchContent CI #20: Commit 8da8ebe pushed by EAlexJ

8m 1s feature/iif_upgrades

feature/iif_upgrades

8m 1s

Feature/iif upgrades CI #19: Pull request #53 opened by EAlexJ

1m 36s feature/iif_upgrades

feature/iif_upgrades

1m 36s

Merge branch 'main' into feature/iif_upgrades CI #18: Commit 2875f35 pushed by EAlexJ

1m 44s feature/iif_upgrades

feature/iif_upgrades

1m 44s

fixes [m|s]i[p|e] read/write access and use of respective registers CI #17: Commit d921fe4 pushed by eyck

8m 16s main

8m 16s

updates dbt-rise-core commit for standalone build CI #16: Commit 6df869d pushed by eyck

10m 22s main

10m 22s

Feature/aia CI #15: Pull request #52 opened by eyck

10m 38s feature/aia

10m 38s

updates dbt-rise-core commit for standalone build CI #14: Commit 4849b4a pushed by eyck

7m 33s feature/aia

7m 33s

fixes compilation issues CI #13: Commit f97bcd6 pushed by eyck

10m 6s feature/aia

10m 6s

adds support for AIA registers in 32bit mode CI #12: Commit 6948577 pushed by eyck

4m 16s feature/aia

4m 16s