Skip to content
View OdysseyGuy's full-sized avatar
:octocat:
:octocat:

Highlights

  • Pro

Organizations

@NVIDIAGameWorks@rixkern

Block or report OdysseyGuy

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Content in all repositories owned by your account will be closed.
Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
OdysseyGuy/README.md

Hello, I’m Rik Seth

WebsiteEmailLinkedIn

About Me

Electronics and Communication Engineering student interested in hardware acceleration, digital signal processing, and FPGA-based design. Currently interning at the DSP Lab, Raman Research Institute (Prof. Prabu), developing MATLAB-based test-vector workflows for FPGA digital design verification.

Tools and Languages

ccpluspluspythonmatlabgit

Pinned Loading

  1. teensy41_fwteensy41_fwPublic

    Bare-Metal Firmware for Teensy 4.1

    C 1

  2. odysseyguy.github.ioodysseyguy.github.ioPublic

    My Website

    HTML 2

  3. odyguy.nvimodyguy.nvimPublic

    My neovim config files.

    Lua

  4. rix-draftrix-draftPublic

    Initial draft for rix microkernel

    C 1