Name		Name	Last commit message	Last commit date
Assembler		Assembler
work		work
.gitattributes		.gitattributes
.gitignore		.gitignore
16bitAdder.vhd		16bitAdder.vhd
30629872_1672038292877153_5581076157362601984_n.jpg		30629872_1672038292877153_5581076157362601984_n.jpg
30652380_1672038346210481_184472105243377664_n.jpg		30652380_1672038346210481_184472105243377664_n.jpg
30656581_1672038569543792_2799038403075637248_n.jpg		30656581_1672038569543792_2799038403075637248_n.jpg
30657301_1672038506210465_4602181436189966336_n.jpg		30657301_1672038506210465_4602181436189966336_n.jpg
30689036_1672038439543805_4583800466516738048_n.jpg		30689036_1672038439543805_4583800466516738048_n.jpg
ALU.vhd		ALU.vhd
ALU.vhd.bak		ALU.vhd.bak
ALU_Test.do		ALU_Test.do
AluDecode_integrate.vhd		AluDecode_integrate.vhd
AluDecode_integrate.vhd.bak		AluDecode_integrate.vhd.bak
ControlUnit.vhd		ControlUnit.vhd
ControlUnit.vhd.bak		ControlUnit.vhd.bak
ControlUnitKamal.vhd		ControlUnitKamal.vhd
ControlUnitKamal.vhd.bak		ControlUnitKamal.vhd.bak
DOOFALU		DOOFALU
DataMemory.vhd		DataMemory.vhd
DataMemory.vhd.bak		DataMemory.vhd.bak
First_integrate.do		First_integrate.do
ForwardingUnit.vhd		ForwardingUnit.vhd
ForwardingUnit.vhd.bak		ForwardingUnit.vhd.bak
Forwarding_Test.do		Forwarding_Test.do
Forwarding_Test_Cases.txt		Forwarding_Test_Cases.txt
FullAdder.vhd		FullAdder.vhd
HazardDetection.vhd		HazardDetection.vhd
HazardDetection.vhd.bak		HazardDetection.vhd.bak
LastBackup.txt		LastBackup.txt
Memory.vhd		Memory.vhd
Memory.vhd.bak		Memory.vhd.bak
Memory_model.jpg		Memory_model.jpg
Mux2x1.vhd		Mux2x1.vhd
Mux4x1.vhd		Mux4x1.vhd
Mux4x1_1bit.vhd		Mux4x1_1bit.vhd
Mux4x1_1bit.vhd.bak		Mux4x1_1bit.vhd.bak
Mux8x1.vhd		Mux8x1.vhd
Mux8x1.vhd.bak		Mux8x1.vhd.bak
Overflowflag.PNG		Overflowflag.PNG
PC_FECTCH_DECODE.vhd		PC_FECTCH_DECODE.vhd
PC_FECTCH_DECODE.vhd.bak		PC_FECTCH_DECODE.vhd.bak
PC_FETCH .vhd		PC_FETCH .vhd
PC_FETCH .vhd.bak		PC_FETCH .vhd.bak
Pcreg.vhd		Pcreg.vhd
Pcreg.vhd.bak		Pcreg.vhd.bak
Phase 2 Report - .docx		Phase 2 Report - .docx
Project-FetchUnit.vhd		Project-FetchUnit.vhd
Project-FetchUnit.vhd.bak		Project-FetchUnit.vhd.bak
Project-Memory.vhd		Project-Memory.vhd
Project-MemoryUnit.vhd.bak		Project-MemoryUnit.vhd.bak
Project-MemoryUnitBuffer.vhd		Project-MemoryUnitBuffer.vhd
Project-StaticPredictionUnit.vhd		Project-StaticPredictionUnit.vhd
Project.cr.mti		Project.cr.mti
Project.mpf		Project.mpf
QProject-registerBit.vhd		QProject-registerBit.vhd
Questions.txt		Questions.txt
README.md		README.md
SP.vhd.bak		SP.vhd.bak
Testcase1_Code.txt		Testcase1_Code.txt
ahmed-kamalpart.txt		ahmed-kamalpart.txt
alu_test1.png		alu_test1.png
alu_test2.png.png		alu_test2.png.png
alu_test_binary result.png		alu_test_binary result.png
architecture decisions.txt		architecture decisions.txt
backuplasttest.txt		backuplasttest.txt
datamemory.mem		datamemory.mem
decoder.vhd		decoder.vhd
decoder.vhd.bak		decoder.vhd.bak
dmem.mem		dmem.mem
instructions.mem		instructions.mem
m1.mem		m1.mem
mem.do		mem.do
mm.mem		mm.mem
new_integration.vhd		new_integration.vhd
new_integration.vhd.bak		new_integration.vhd.bak
notes for me arch.txt		notes for me arch.txt
pc_fetch.do		pc_fetch.do
pc_fetch_decode_alu.vhd		pc_fetch_decode_alu.vhd
pc_fetch_decode_alu.vhd.bak		pc_fetch_decode_alu.vhd.bak
pmemoryFetchUnit.mem		pmemoryFetchUnit.mem
pmemoryMemoryUnit.mem		pmemoryMemoryUnit.mem
pmemoryTestMemWB.mem		pmemoryTestMemWB.mem
projectt.cr.mti		projectt.cr.mti
projectt.mpf		projectt.mpf
register.vhd		register.vhd
register.vhd.bak		register.vhd.bak
sp.do		sp.do
spreg.vhd		spreg.vhd
spreg.vhd.bak		spreg.vhd.bak
test.do.txt		test.do.txt
testing.vhd		testing.vhd
testing.vhd.bak		testing.vhd.bak
vsim.wlf		vsim.wlf
wlft5qq5kj		wlft5qq5kj
wlftjrwx0h		wlftjrwx0h
~$ase 2 Report - .docx		~$ase 2 Report - .docx
~WRL2250.tmp		~WRL2250.tmp

Repository files navigation

Computer Architecture

About

Pipelined processor design using VHDL

0 stars

1 watching

Report repository

Releases

Packages

Contributors

Languages