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Updated AM2434 work - #3
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d700dbaCompareAdds support for the Seeed Studio XIAO CAN Bus shield. This shield is similar to the other shields but designed for the Seeed Studio XIAO hardware interface. The shield conflicts with the XIAO serial interface on D6 and D7 that must be used for SPI CS and the MCP2515 INT. The shield resolves this conflict by disabling the XIAO serial function (see documentation and DTS overlays). Successfully evaluated with the following compatible boards: - Seeeduino XIAO (a.k.a. Seeed Studio XIAO SAMD21) - Seeed Studio XIAO BLE (Sense), a.k.a. XIAO nRF52840 (Sense) - Seeed Studio XIAO RP2040 Potentially usable with the following compatible boards: - Seeed Studio XIAO ESP32-S3 (Sense) - Seeed Studio XIAO ESP32-C3 - Seeed Studio XIAO ESP32-C6 - Seeed Studio XIAO MG24 - Seeed Studio XIAO nRF54L15 - Seeed Studio XIAO RA4M1 Signed-off-by: Stephan Linz <linz@li-pro.net>
Adds build test case for Microchip MCP2515 CAN controller with seeed_xiao_can shield on all supported Seeed Studio XIAO boards. Signed-off-by: Stephan Linz <linz@li-pro.net>
The documentation referenced a blog post about RGB LED strips that is no longer accessible. Replace the broken link with a valid and relevant resource and add additional stable references to improve the documentation. Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
For STM32F4, the SAI HAL writes into the RCC DCKCFGR register to set the clock source. To ensure that is conforms with what is declared in the device tree, the ClockSource field in the Init structure needs to be correctly configured before calling HAL_SAI_InitProtocol. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The consumer functions are only meant to be used by the SCMI core. Thus, there's no need to keep their documentation public. Transport driver writers should only care about the driver API documentation anyways. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
"struct scmi_channel" has a couple of fields, which are only meant to be used by the SCMI core. As such, there's no need to expose their documentation to the public since transport driver writers shouldn't have to care about them anyways. Thus, mark these fields as INTERNAL_HIDDEN. Note that the order of the structure fields is shuffled such that public and private fields can stay grouped together. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add documentation for the transport driver API. This is done by moving and rewriting the previously existing documentation bits from the transport consumer API. The documentation is rewritten such that it can be more concise. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Fix mistyped sensor name in ILPS22QS sensor dts bindings descriptions. No functional changes. Signed-off-by: Sidharth Sankar <sidstuffhere@gmail.com>
We already allow using `fs_opendir` on the root dir, so `fs_stat` should also work with it. Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Update hal_st revision to fix unconditional directory inclusion of ST HAL. Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add rtc node to stm32h7rs dts Signed-off-by: Thomas Decker <decker@jb-lighting.de>
- Activate the RTC node in the device tree by enabling its clocks and setting its status to okay - Add 'rtc' to the supported features in the board YAML configuration Signed-off-by: Thomas Decker <decker@jb-lighting.de>
Fix multiple spelling errors in GPIO ADI dts bindings descriptions. No functional changes. Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
Split up Kconfig settings for the ti Keystone 3 (K3) architecture. The old configuration assumed that every R5F is initialized via a table that's compatible with the linux remote proc framework and OpenAMP library. Additionally the number of interrupts and speed of the system timer was specified only by the cpu type for this series. For better extendability this was split up into different files that reflect the subseries of the soc. Additionally this sets the number of interrupts and the clock frequency for the R5F in the AM243x to the correct value and the MPU is enabled by default. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
For booting the AM2434 SoC via SBL Bootloader it's necessary to have the exception vector at the address 0x0. To be able to easily use that memory with the ROMSTART_REGION Kconfig option 1 KiB has been split up. Since the ROMSTART_REGION_SIZE option uses the unit KiB this sadly wastes 960 byte of ATCM memory though it's theoretically possible to add small sections here. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add the AM243x Launchpad board from TI. It's possible to run the blinky and echo_bot example from it as one of the LEDs and a uart node are included in the devicetree. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
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2b9fedeCompareAdd a Cadence MSPI peripheral driver, used in the TI K3 platform. The driver was tested in 1S-1S-1S and 4S-4S-4S mode with the onboard infineon s25h flash of the am243x launchpad and a custom driver for the flash using this interface. The command and dummy cycles are always taken from the xfer request and never from the devicetree since different commands might have different latencies. The driver is somewhat basic for now and lacks e.g. callback implementation. This is something that can be added in the future. If a non-supported / invalid request is detected a error code is returned. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add the mspi0 bus in disabled state to the am64x soc Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
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0c35ad9CompareAdd a infineon s25h mspi nor flash driver. This driver was tested on the am243x-lp board in 1S-1S-1S and 4S-4S-4S mode. It takes the initial configuration from the devicetree and then sends a reset command. After that it disables the uniform hybrid sector architecture, if activated, and applies the setting by resetting the flash again. After that the 4S-4S-4S mode is entered, if not disabled in the devicetree, and 4 byte adressing gets enabled. During these steps the JEDEC device and manufacturer ids from the devicetree are compared against the ones reported from the flash to ensure a valid connection. If the device isn't switched into 4S-4S-4S mode the driver can also be used in 1S-1S-1S mode with S28H flash. Due to the flash possibily entering continious read mode when undesired some read operations will read the JEDEC id to prevent this. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add the Infineon flash chip to the devicetree of the am243x_launchpad Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
The test looks for devices that are enabled on a bus that's aliased mspi0. To allow the am243x_launchpad to run this test it was needed to add an overlay which creates this alias Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Adding necessary files so the mspi flash driver test can be automatically built for the AM243x LaunchPad. For running it still needs a bootloader that runs before the test itself. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Some SoCs start multiple CPU cores in a SMP configuration but sometimes there is missing support in Zephyr or the SoCs has requirements that can't be fulfilled by Zephyr yet (e.g. all spinlocks need to be implemented using hardware spinlocks since the sram doesn't support exclusive access). To address this an option was added that puts all CPU cores except the one with the number 0 (according to the Multiprocessor Affinity Register with the bits for Affinity Level 0) into an endless loop directly on startup. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Until now there was only one Kconfig option for the R5F which implied cluster 0 core 0. According to they SoC porting guide this has now been changed to add a general option for the R5F cores so it will be easier to add other cores/variants later. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
This commit adds all required parts to boot a Zephyr application directly on the AM2434 Launchpad. Additionally it has been verified that MCUboot can be used to boot a Zephyr application from the flash. To achieve this a new variant has been added that specifies the application is built to run directly after the ROM bootloader. This will automatically generate a binary that can be loaded by the ROM bootloader that's running on the chip. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
The AM2434 has a security coprocessor that does some configuration in the background. Not waiting for it to finish the configuration has led to instability. Now the SoC is waiting for the DMSC-L boot notification before progressing further. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
This commit adds support for directly running west flash on the am243x_launchpad. It does this via a new script with minimal XMODEM1k support and a new sample. The code and documentation isn't finished and should not be submitted upstream yet! Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
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This is an updated version of #1, based on an older version of zephyrproject-rtos#87321.
Additionally to #1 the following additions were made:
When using MCUboot you need to use https://github.com/siemens/mcuboot/tree/mika/upstream/add-cortex-r-support