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compilation: byte-address the fused arena, type buffers by operator - #212

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atassis:pr/fused-arena-byte-addressed
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atassis:pr/fused-arena-byte-addressed

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@atassis atassis commented Sep 18, 2026

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fuse_mlir types the consolidated arena bf16 and divides every byte offset and length by
np.dtype(ml_dtypes.bfloat16).itemsize:

buf_dtype = np.dtype[ml_dtypes.bfloat16]   # TODO: support for other data types
itemsize = np.dtype(ml_dtypes.bfloat16).itemsize

subbuffer_layout already stores byte offsets and lengths, so that divisor is correct only while
every buffer in the sequence is bf16. Any other dtype has its element count silently halved -- a
576-byte uint8 buffer (Dequant's packed input) is declared as 288 elements.

Added

  • element_size_bytes(ty), the single owner of this seam's byte<->element rate. Sub-byte types are refused rather than rounded: packed nibbles plus interleaved scales are not a whole number of elements of any single type, so such a buffer must declare the byte type it occupies.
  • iron/tests/infrastructure/element_size.py, covering integer widths, the float types, i4/i1 refusal, and that the error names the unsupported type.

Changed

  • The arena is typed int8, so byte offsets and lengths pass through unscaled; each operator's view is typed from its own element type.

Removed

  • The ml_dtypes import, whose last use byte-addressing removes.

Verified on 27cf75d: pytest iron/tests/infrastructure/element_size.py -> 70 passed, device-free;
black --check clean; ruff check reports no diagnostic that devel does not already report on this
file.

PR Merge Checklist

  1. The PR is rebased on the latest devel commit and pointing to devel.
  2. Your PR has been reviewed and approved.
  3. All checks are passing.

fuse_mlir() addressed the consolidated arena with a hardcoded bf16
itemsize and used it to type every operator's view too. Those
coincide only while every buffer is bf16, so any non-bf16 operator's
buffer got its element count halved and tripped the size assert --
including IRON's own uint8-input Dequant.

subbuffer_layout already stores byte offsets/lengths, so the arena is
now i8 and addressed directly, no divisor. Each buffer is viewed at
its operator's declared type via memref.view (subview+reinterpret_cast
cannot change element type), and the size assert compares bytes on
both sides. Declared types are re-parsed in the building context --
MLIR rejects a result type built in a different one, part of why the
hardcode went unnoticed. Sub-byte types are rejected, not rounded: no
element count describes a packed nibble buffer.

Test: iron/tests/infrastructure/sequence.py was 20F/50P before,
20F/60P after (10 new Dequant cases; same unrelated pre-existing
failures). New test fuses Dequant (uint8 input) directly through
fuse_mlir and checks the size assert no longer fires.
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