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Add initial support for Intel FPGA SDK for OpenCL (AOCL) - #1474
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liangfu
commented
Jul 23, 2018
Nice effort. |
kaytabata
commented
Jul 23, 2018
Hi @liangfu , as far as this PR goes, no, we can't. |
liangfu
commented
Jul 23, 2018
i'm not sure. perhaps by defining a different context? usually, ctx=tvm.context('opencl',0) |
| # | ||
| # Possible values: | ||
| # - OFF: disbale AOCL | ||
| # - board_name: use specific board name for offline compilation |
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I think the board name should be passed with target options (e.g. tvm.context("opencl -device=[board name]")).
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Changed to use target name option like tgt="aocl -device=de5net_a7".
| Init("opencl", "gpu"); | ||
| #else | ||
| Init("opencl", "accelerator"); | ||
| #endif |
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Implement AOCLWorkspace as a subclass of OpenCLWorkspace so that it can coexist with other OpenCL platforms.
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Introduced AOCLWorkspace.
| #ifndef AOCL_BOARD_NAME | ||
| if (device_type == "accelerator") dtype = CL_DEVICE_TYPE_ACCELERATOR; | ||
| #else | ||
| if (device_type == "accelerator") dtype = CL_DEVICE_TYPE_DEFAULT; |
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Why do you want to use CL_DEVICE_TYPE_DEFAULT here?
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Deleted this code and now works with device_type == "accelerator".
| program_ = clCreateProgramWithSource(w->context, 1, &s, &len, &err); | ||
| OPENCL_CHECK_ERROR(err); | ||
| #else | ||
| OfflineCompile(w, t); |
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Should be moved to codegen since compiling OpenCL codes for FPGAs takes very long time.
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Offline compilation was moved to codegen. See also BuildAOCL().
kaytabata
commented
Jul 24, 2018
Hi @kazum thank you for reviewing. I'll fix them. |
kaytabata
commented
Jul 25, 2018
@kazum I implemented AOCLWorkspace and moved offline compile process to codegen. Please review. |
| - Install AOCL 17.1 on Ubuntu 16.04.4 LTS. | ||
| - Install FPGA device driver. | ||
| - Make ICD file. (/etc/OpenCL/vendors/Altera.icd) | ||
| - Make FCD file. (/opt/Intel/OpenCL/Boards/de5net.fcd) |
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Add more explanation about what kinds of files we should make.
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But I can't install FPGA PCIe driver on Ubuntu 16.04 LTS,
| t->device_type = kDLOpenCL; | ||
| t->keys_array.push_back(ir::StringImm::make("sdaccel")); | ||
| } else if (target_name == "aocl") { | ||
| t->device_type = kDLOpenCL; |
| // Compile the .cl file. | ||
| Target target = Target::create(target_str); | ||
| std::string cmd = "aoc aocl.cl -march=emulator -board="; | ||
| cmd += target->device_name; |
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I think this doesn't work if we don't specify the '-device' option.
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Added logic to check device name.
| } | ||
| void AOCLWorkspace::Init() { | ||
| OpenCLWorkspace::Init("aocl", "accelerator", "Intel"); |
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I think "Intel" would match the Intel OpenCL platform for CPU/GPU. Should be "Intel(R) FPGA"?
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Changed "Intel" to the exact platform name.
kaytabata
commented
Jul 25, 2018
@kazum I made some changes to meet your comments. Will you review again? |
| import tvm | ||
| tgt_host="llvm" | ||
| tgt="aocl -device=de5net_a7 -mattr=emulator" |
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I'd suggest "-device=s5_ref" for the tutorial. It is the default device of aoc and available without installing additional BSP.
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Changed de5net_a7 to s5_ref.
| std::string cmd = "aoc aocl.cl"; | ||
| if (target_str.find("-mattr=emulator") != std::string::npos) { | ||
| cmd += " -march=emulator"; | ||
| } |
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Use target->options() to get target parameters.
for (std::string option : target->options()) {
if (option == "-mattr=emulator") {
cmd += " -march=emulator";
}
}
kazum
commented
Jul 26, 2018
@Ktabata In addition, please add a testcase to test the aocl backend. |
kaytabata
commented
Jul 28, 2018
@kazum I added testcases. |
kaytabata
commented
Jul 30, 2018
@kazum Thank you for reviewing. I tested this code on not only emulator but also physical FPGA device. It works. |
tqchen
commented
Jul 30, 2018
cc @vegaluisjose@tmoreau89@comaniac can you also please take a quick look? |
comaniac
commented
Jul 30, 2018
As I saw from the PR, this feature leverages the existing OpenCL code generator for Intel FPGA kernel. It seems to me that this may become annoying for the future improvement because the high-performance OpenCL kernel for Intel FPGA and NVidia GPU is very different. From my personal perspective, separating |
@Ktabata@kazum since we are adding support to both SDAccel and AOCL OpenCL backends, how much common infrastructure should we be using for FPGA-specific code generation? I understand that the OpenCL specs are similar between the two vendors, and that there exist analogous code pragmas between the two specs which can be generated depending on the target we're in. My opinion is to merge common infrastructure as much as possible early on rather than later. I recommend if you haven't already to coordinate together to reuse common code generation infrastructure as much as possible. Otherwise, this seems like a good start at supporting Intel FPGAs, I look forward to seeing more ways in which to use TVM to leverage FPGAs. |
kazum
commented
Jul 30, 2018
@comaniac +1 for separating AOCL code generation from the existing codes. Adding CodeGenAlteraOpenCL which inherits from CodeGenOpenCL looks good to me. @tmoreau89 I think it's a good idea to add a key like At the current stage, this PR only adds support for compiling with AOCL and, IMHO, it looks good to be merged before implementing common code generation infrastructure. |
tmoreau89
commented
Jul 30, 2018
@kazum - great! As long as we plan on converging the back-ends. It would indeed be good to have an Feel free to approve! |
comaniac
commented
Jul 30, 2018
Minor comment: My experience was the Xilinx HLS C and Intel OpenCL have very different programming model for generating the same architecture. For example, Intel OpenCL uses global variables to represent FIFOs between modules and a module is generated from a kernel function with |
tmoreau89
commented
Jul 30, 2018
@comaniac that's a good point regarding hardware constructs such as FIFOs. As a result the conclusion of this discussion is to re-use IR passes for schedule lowering purposes between the different vendors, and have specialized code generators for each vendor to convert lowered TVM IR into OpenCL code. Let me know if you agree with this approach. |
This PR adds initial support for Intel FPGA SDK for OpenCL (AOCL).
Currently it only works in CPU emulation mode.
To try this patch, you can use AOCL 17.1 without paid license.