[Doc] Introduction to module serialization

[FrozenGene]

Follow up of #4532, this doc for introducing module serialization and implementation details how we achieve it.

@tqchen

[tqchen]

Would be great if we can get more readers to help review

[FrozenGene]

Anyone has interest in helping to review and give feedback? @zhiics@yzhliu@tqchen Thanks.

[tqchen]

It would be great if we can add a figure explaining the storage relation and data structure.

[FrozenGene]

It would be great if we can add a figure explaining the storage relation and data structure.

Will do.

[FrozenGene]

It would be great if we can add a figure explaining the storage relation and data structure.

Will do.

@tqchen need to double check to make sure I understand correctly.

The doc describes:

• Module import relationship. i.e. LLVM imports cuda module. <- No need to have figure in my opinion as it only have two modules and is a simple relationship

• Serialization Format.

binary_blob_size
binary_blob_type_key
binary_blob_logic
...
_import_tree
_import_tree_logic

<- No need to have figure, as this simple table could describe cleanly.

• Mark Module Index. We have LLVM Module (0, root module) <- CUDA Module (1). <- No need to have figure.

• import tree of CSR storage. Each row is parent index, each col is child indices. <- We need to have figure to describe what is CSR module index mapping status. Like this figure: https://img-blog.csdn.net/2018092717062821?watermark/2/text/aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L2dhb2Jvcmw=/font/5a6L5L2T/fontsize/400/fill/I0JBQkFCMA==/dissolve/70

[tqchen]

sounds good, would love to see others' thoughts, @zhiics@yzhliu@ajtulloch@ZihengJiang

[yangjunpro]

Just some comments.

[zhiics]

A few high level comments beside the attached grammatical errors and typos.

• A diagram would be more helpful for ppl to understand. I think the one Tianqi provided in the RFC could be borrowed
• A little more details about export library can be explained, such as how user provided compilation flags/options can be taken

[FrozenGene]

Thanks the comment and suggestion of @zhiics@yzhliu@yangjunpro I will address the comment in the following days.

[FrozenGene]

Have addressed the comments. I also add some words of PackImportToC existed in the PR #4657 , so we should be better handle it after that PR in.

[tqchen]

my part has been address, @zhiics@yzhliu would be great if you can help followup

[zhiics]

@FrozenGene would be great to have a few more ppl read through the document because I still see a number of typos and broken sentences.

@yangjunpro@yzhliu please do another around when you have cycles.

[tqchen]

ping @zhiics@yzhliu@FrozenGene@yangjunpro please followup on this thread :)

[zhiics]

LGTM now. I will wait till tomorrow to see if there are any more comments.

[zhiics]

Thanks everyone. This is now merged.