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sha256: add AArch64 SHA-2 crypto-extension hardware backend - #90

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Adds an opt-in (asm feature) hardware compression backend for SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch intrinsics. Runtime support is detected with
is_aarch64_feature_detected!, falling back to the portable scalar implementation everywhere else.

  • New crypto/sha2/src/asm/ module: one submodule per algorithm (asm::sha256), dispatching by (target_arch, target_endian) at its own mod declaration; try_compress is always callable and is a no-op on targets with no backend, so callers never need their own #[cfg].
  • #![forbid(unsafe_code)] moves from the crate root into sha256.rs/ sha512.rs (unconditional, independent of the asm feature); the crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants itself the sole #![allow(unsafe_code)] exception, since forbid can never be overridden by a nested #[allow].
  • Forwards the feature through the workspace Cargo.toml as sha2-asm.
  • Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB one-shot case alongside the existing 16KiB one-shot.

Benchmark (16KiB one-shot, criterion):
baseline (scalar): 33.147 µs ( 471.38 MiB/s)
asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster

Assisted-by: Claude:sonnet-5

@npajkovskynpajkovsky self-assigned this Aug 26, 2026
@nikolapajkovsky
sha256: add AArch64 SHA-2 crypto-extension hardware backend
e722868
Adds an opt-in (`asm` feature) hardware compression backend for
SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic
Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch
intrinsics. Runtime support is detected with
is_aarch64_feature_detected!, falling back to the portable scalar
implementation everywhere else.
- New crypto/sha2/src/asm/ module: one submodule per algorithm
(asm::sha256), dispatching by (target_arch, target_endian) at its
own `mod` declaration; try_compress is always callable and is a
no-op on targets with no backend, so callers never need their own
#[cfg].
- #![forbid(unsafe_code)] moves from the crate root into sha256.rs/
sha512.rs (unconditional, independent of the `asm` feature); the
crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants
itself the sole #![allow(unsafe_code)] exception, since `forbid`
can never be overridden by a nested #[allow].
- Forwards the feature through the workspace Cargo.toml as
`sha2-asm`.
- Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB
one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):
baseline (scalar): 33.147 µs ( 471.38 MiB/s)
asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
Signed-off-by: Nikola Pajkovsky <nikolap@openssl.org>
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sha256: add AArch64 SHA-2 crypto-extension hardware backend by npajkovsky · Pull Request #90 · bcgit/bc-rust · GitHub
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sha256: add AArch64 SHA-2 crypto-extension hardware backend - #90
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sha256: add AArch64 SHA-2 crypto-extension hardware backend#90
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@npajkovskynpajkovsky
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Adds an opt-in (asm feature) hardware compression backend for SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch intrinsics. Runtime support is detected with

is_aarch64_feature_detected!, falling back to the portable scalar implementation everywhere else.
  • New crypto/sha2/src/asm/ module: one submodule per algorithm (asm::sha256), dispatching by (target_arch, target_endian) at its own mod declaration; try_compress is always callable and is a no-op on targets with no backend, so callers never need their own #[cfg].
  • #![forbid(unsafe_code)] moves from the crate root into sha256.rs/ sha512.rs (unconditional, independent of the asm feature); the crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants itself the sole #![allow(unsafe_code)] exception, since forbid can never be overridden by a nested #[allow].
  • Forwards the feature through the workspace Cargo.toml as sha2-asm.
  • Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):

baseline (scalar): 33.147 µs ( 471.38 MiB/s)

asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
@npajkovskynpajkovsky
self-assigned this
Aug 26, 2026
@nikolapajkovsky
sha256: add AArch64 SHA-2 crypto-extension hardware backend
e722868
Adds an opt-in (`asm` feature) hardware compression backend for
SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic
Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch
intrinsics. Runtime support is detected with
is_aarch64_feature_detected!, falling back to the portable scalar
implementation everywhere else.
- New crypto/sha2/src/asm/ module: one submodule per algorithm
(asm::sha256), dispatching by (target_arch, target_endian) at its
own `mod` declaration; try_compress is always callable and is a
no-op on targets with no backend, so callers never need their own
#[cfg].
- #![forbid(unsafe_code)] moves from the crate root into sha256.rs/
sha512.rs (unconditional, independent of the `asm` feature); the
crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants
itself the sole #![allow(unsafe_code)] exception, since `forbid`
can never be overridden by a nested #[allow].
- Forwards the feature through the workspace Cargo.toml as
`sha2-asm`.
- Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB
one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):
baseline (scalar): 33.147 µs ( 471.38 MiB/s)
asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
Signed-off-by: Nikola Pajkovsky <nikolap@openssl.org>
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var __m = "*";
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sha256: add AArch64 SHA-2 crypto-extension hardware backend by npajkovsky · Pull Request #90 · bcgit/bc-rust · GitHub
Skip to content
sha256: add AArch64 SHA-2 crypto-extension hardware backend - #90
Open
npajkovsky wants to merge 1 commit into
bcgit:mainfrom 
npajkovsky:sha256
Open
sha256: add AArch64 SHA-2 crypto-extension hardware backend#90
npajkovsky wants to merge 1 commit into
bcgit:mainfrom 
npajkovsky:sha256
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@npajkovsky
@npajkovskynpajkovsky
commented
Aug 26, 2026

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Adds an opt-in (asm feature) hardware compression backend for SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch intrinsics. Runtime support is detected with

is_aarch64_feature_detected!, falling back to the portable scalar implementation everywhere else.
  • New crypto/sha2/src/asm/ module: one submodule per algorithm (asm::sha256), dispatching by (target_arch, target_endian) at its own mod declaration; try_compress is always callable and is a no-op on targets with no backend, so callers never need their own #[cfg].
  • #![forbid(unsafe_code)] moves from the crate root into sha256.rs/ sha512.rs (unconditional, independent of the asm feature); the crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants itself the sole #![allow(unsafe_code)] exception, since forbid can never be overridden by a nested #[allow].
  • Forwards the feature through the workspace Cargo.toml as sha2-asm.
  • Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):

baseline (scalar): 33.147 µs ( 471.38 MiB/s)

asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
@npajkovskynpajkovsky
self-assigned this
Aug 26, 2026
@nikolapajkovsky
sha256: add AArch64 SHA-2 crypto-extension hardware backend
e722868
Adds an opt-in (`asm` feature) hardware compression backend for
SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic
Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch
intrinsics. Runtime support is detected with
is_aarch64_feature_detected!, falling back to the portable scalar
implementation everywhere else.
- New crypto/sha2/src/asm/ module: one submodule per algorithm
(asm::sha256), dispatching by (target_arch, target_endian) at its
own `mod` declaration; try_compress is always callable and is a
no-op on targets with no backend, so callers never need their own
#[cfg].
- #![forbid(unsafe_code)] moves from the crate root into sha256.rs/
sha512.rs (unconditional, independent of the `asm` feature); the
crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants
itself the sole #![allow(unsafe_code)] exception, since `forbid`
can never be overridden by a nested #[allow].
- Forwards the feature through the workspace Cargo.toml as
`sha2-asm`.
- Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB
one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):
baseline (scalar): 33.147 µs ( 471.38 MiB/s)
asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
Signed-off-by: Nikola Pajkovsky <nikolap@openssl.org>
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, 'i');
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var __m = "*";
var __re = new RegExp('^' + ".*" + '
sha256: add AArch64 SHA-2 crypto-extension hardware backend by npajkovsky · Pull Request #90 · bcgit/bc-rust · GitHub
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sha256: add AArch64 SHA-2 crypto-extension hardware backend - #90
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@npajkovskynpajkovsky
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Adds an opt-in (asm feature) hardware compression backend for SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch intrinsics. Runtime support is detected with

is_aarch64_feature_detected!, falling back to the portable scalar implementation everywhere else.
  • New crypto/sha2/src/asm/ module: one submodule per algorithm (asm::sha256), dispatching by (target_arch, target_endian) at its own mod declaration; try_compress is always callable and is a no-op on targets with no backend, so callers never need their own #[cfg].
  • #![forbid(unsafe_code)] moves from the crate root into sha256.rs/ sha512.rs (unconditional, independent of the asm feature); the crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants itself the sole #![allow(unsafe_code)] exception, since forbid can never be overridden by a nested #[allow].
  • Forwards the feature through the workspace Cargo.toml as sha2-asm.
  • Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):

baseline (scalar): 33.147 µs ( 471.38 MiB/s)

asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
@npajkovskynpajkovsky
self-assigned this
Aug 26, 2026
@nikolapajkovsky
sha256: add AArch64 SHA-2 crypto-extension hardware backend
e722868
Adds an opt-in (`asm` feature) hardware compression backend for
SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic
Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch
intrinsics. Runtime support is detected with
is_aarch64_feature_detected!, falling back to the portable scalar
implementation everywhere else.
- New crypto/sha2/src/asm/ module: one submodule per algorithm
(asm::sha256), dispatching by (target_arch, target_endian) at its
own `mod` declaration; try_compress is always callable and is a
no-op on targets with no backend, so callers never need their own
#[cfg].
- #![forbid(unsafe_code)] moves from the crate root into sha256.rs/
sha512.rs (unconditional, independent of the `asm` feature); the
crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants
itself the sole #![allow(unsafe_code)] exception, since `forbid`
can never be overridden by a nested #[allow].
- Forwards the feature through the workspace Cargo.toml as
`sha2-asm`.
- Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB
one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):
baseline (scalar): 33.147 µs ( 471.38 MiB/s)
asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
Signed-off-by: Nikola Pajkovsky <nikolap@openssl.org>
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, 'i');
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var __re = new RegExp('^' + "youtube\\.com" + '
sha256: add AArch64 SHA-2 crypto-extension hardware backend by npajkovsky · Pull Request #90 · bcgit/bc-rust · GitHub
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sha256: add AArch64 SHA-2 crypto-extension hardware backend - #90
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npajkovsky wants to merge 1 commit into
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sha256: add AArch64 SHA-2 crypto-extension hardware backend#90
npajkovsky wants to merge 1 commit into
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@npajkovskynpajkovsky
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Adds an opt-in (asm feature) hardware compression backend for SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch intrinsics. Runtime support is detected with

is_aarch64_feature_detected!, falling back to the portable scalar implementation everywhere else.
  • New crypto/sha2/src/asm/ module: one submodule per algorithm (asm::sha256), dispatching by (target_arch, target_endian) at its own mod declaration; try_compress is always callable and is a no-op on targets with no backend, so callers never need their own #[cfg].
  • #![forbid(unsafe_code)] moves from the crate root into sha256.rs/ sha512.rs (unconditional, independent of the asm feature); the crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants itself the sole #![allow(unsafe_code)] exception, since forbid can never be overridden by a nested #[allow].
  • Forwards the feature through the workspace Cargo.toml as sha2-asm.
  • Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):

baseline (scalar): 33.147 µs ( 471.38 MiB/s)

asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
@npajkovskynpajkovsky
self-assigned this
Aug 26, 2026
@nikolapajkovsky
sha256: add AArch64 SHA-2 crypto-extension hardware backend
e722868
Adds an opt-in (`asm` feature) hardware compression backend for
SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic
Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch
intrinsics. Runtime support is detected with
is_aarch64_feature_detected!, falling back to the portable scalar
implementation everywhere else.
- New crypto/sha2/src/asm/ module: one submodule per algorithm
(asm::sha256), dispatching by (target_arch, target_endian) at its
own `mod` declaration; try_compress is always callable and is a
no-op on targets with no backend, so callers never need their own
#[cfg].
- #![forbid(unsafe_code)] moves from the crate root into sha256.rs/
sha512.rs (unconditional, independent of the `asm` feature); the
crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants
itself the sole #![allow(unsafe_code)] exception, since `forbid`
can never be overridden by a nested #[allow].
- Forwards the feature through the workspace Cargo.toml as
`sha2-asm`.
- Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB
one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):
baseline (scalar): 33.147 µs ( 471.38 MiB/s)
asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
Signed-off-by: Nikola Pajkovsky <nikolap@openssl.org>
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, 'i');
if (__m === '*' || __re.test(location.href)) {
// Auto-enable theater mode on YouTube
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sha256: add AArch64 SHA-2 crypto-extension hardware backend by npajkovsky · Pull Request #90 · bcgit/bc-rust · GitHub
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sha256: add AArch64 SHA-2 crypto-extension hardware backend - #90
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npajkovsky:sha256
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sha256: add AArch64 SHA-2 crypto-extension hardware backend#90
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Aug 26, 2026

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Adds an opt-in (asm feature) hardware compression backend for SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch intrinsics. Runtime support is detected with

is_aarch64_feature_detected!, falling back to the portable scalar implementation everywhere else.
  • New crypto/sha2/src/asm/ module: one submodule per algorithm (asm::sha256), dispatching by (target_arch, target_endian) at its own mod declaration; try_compress is always callable and is a no-op on targets with no backend, so callers never need their own #[cfg].
  • #![forbid(unsafe_code)] moves from the crate root into sha256.rs/ sha512.rs (unconditional, independent of the asm feature); the crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants itself the sole #![allow(unsafe_code)] exception, since forbid can never be overridden by a nested #[allow].
  • Forwards the feature through the workspace Cargo.toml as sha2-asm.
  • Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):

baseline (scalar): 33.147 µs ( 471.38 MiB/s)

asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
@npajkovskynpajkovsky
self-assigned this
Aug 26, 2026
@nikolapajkovsky
sha256: add AArch64 SHA-2 crypto-extension hardware backend
e722868
Adds an opt-in (`asm` feature) hardware compression backend for
SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic
Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch
intrinsics. Runtime support is detected with
is_aarch64_feature_detected!, falling back to the portable scalar
implementation everywhere else.
- New crypto/sha2/src/asm/ module: one submodule per algorithm
(asm::sha256), dispatching by (target_arch, target_endian) at its
own `mod` declaration; try_compress is always callable and is a
no-op on targets with no backend, so callers never need their own
#[cfg].
- #![forbid(unsafe_code)] moves from the crate root into sha256.rs/
sha512.rs (unconditional, independent of the `asm` feature); the
crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants
itself the sole #![allow(unsafe_code)] exception, since `forbid`
can never be overridden by a nested #[allow].
- Forwards the feature through the workspace Cargo.toml as
`sha2-asm`.
- Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB
one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):
baseline (scalar): 33.147 µs ( 471.38 MiB/s)
asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
Signed-off-by: Nikola Pajkovsky <nikolap@openssl.org>
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, 'i');
if (__m === '*' || __re.test(location.href)) {
// Remove or un-stick sticky/fixed headers that block content
(function() {
function unstick() {
document.querySelectorAll('header, nav, [role="banner"], .header, .navbar, .sticky, .fixed-top, [style*="position: fixed"], [style*="position:sticky"]').forEach(function(el) {
if (el.style.position === 'fixed' || el.style.position === 'sticky' || getComputedStyle(el).position === 'fixed' || getComputedStyle(el).position === 'sticky') {
el.style.position = 'static';
el.style.top = 'auto';
el.style.zIndex = 'auto';
}
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unstick();
var observer = new MutationObserver(unstick);
observer.observe(document.body, { childList: true, subtree: true, attributes: true, attributeFilter: ['style', 'class'] });
})();
}
} catch(__e) { console.warn('[Userscript:Kill Sticky Headers]', __e); }
})();
})();
sha256: add AArch64 SHA-2 crypto-extension hardware backend by npajkovsky · Pull Request #90 · bcgit/bc-rust · GitHub
Skip to content
sha256: add AArch64 SHA-2 crypto-extension hardware backend - #90
Open
npajkovsky wants to merge 1 commit into
bcgit:mainfrom 
npajkovsky:sha256
Open
sha256: add AArch64 SHA-2 crypto-extension hardware backend#90
npajkovsky wants to merge 1 commit into
bcgit:mainfrom 
npajkovsky:sha256
Conversation
@npajkovsky
@npajkovskynpajkovsky
commented
Aug 26, 2026

Copy link


Copy Markdown

Collaborator
Adds an opt-in (asm feature) hardware compression backend for SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch intrinsics. Runtime support is detected with

is_aarch64_feature_detected!, falling back to the portable scalar implementation everywhere else.
  • New crypto/sha2/src/asm/ module: one submodule per algorithm (asm::sha256), dispatching by (target_arch, target_endian) at its own mod declaration; try_compress is always callable and is a no-op on targets with no backend, so callers never need their own #[cfg].
  • #![forbid(unsafe_code)] moves from the crate root into sha256.rs/ sha512.rs (unconditional, independent of the asm feature); the crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants itself the sole #![allow(unsafe_code)] exception, since forbid can never be overridden by a nested #[allow].
  • Forwards the feature through the workspace Cargo.toml as sha2-asm.
  • Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):

baseline (scalar): 33.147 µs ( 471.38 MiB/s)

asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
@npajkovskynpajkovsky
self-assigned this
Aug 26, 2026
@nikolapajkovsky
sha256: add AArch64 SHA-2 crypto-extension hardware backend
e722868
Adds an opt-in (`asm` feature) hardware compression backend for
SHA-256 on little-endian aarch64, using the ARMv8 Cryptographic
Extension (SHA256H/SHA256H2/SHA256SU0/SHA256SU1) via core::arch
intrinsics. Runtime support is detected with
is_aarch64_feature_detected!, falling back to the portable scalar
implementation everywhere else.
- New crypto/sha2/src/asm/ module: one submodule per algorithm
(asm::sha256), dispatching by (target_arch, target_endian) at its
own `mod` declaration; try_compress is always callable and is a
no-op on targets with no backend, so callers never need their own
#[cfg].
- #![forbid(unsafe_code)] moves from the crate root into sha256.rs/
sha512.rs (unconditional, independent of the `asm` feature); the
crate root drops to #![deny(unsafe_code)] and asm/mod.rs grants
itself the sole #![allow(unsafe_code)] exception, since `forbid`
can never be overridden by a nested #[allow].
- Forwards the feature through the workspace Cargo.toml as
`sha2-asm`.
- Extends the sha256 benchmark with a 1KiB-chunked and a 1MiB
one-shot case alongside the existing 16KiB one-shot.
Benchmark (16KiB one-shot, criterion):
baseline (scalar): 33.147 µs ( 471.38 MiB/s)
asm (aarch64 SHA-2): 4.757 µs (3.2077 GiB/s) ~7x faster
Assisted-by: Claude:sonnet-5
Signed-off-by: Nikola Pajkovsky <nikolap@openssl.org>
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@ounsworthounsworthAwaiting requested review from ounsworth

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@npajkovsky@nikolapajkovsky