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7 changes: 6 additions & 1 deletion src/lib.rs
Original file line numberDiff line numberDiff line change
Expand Up@@ -257,7 +257,7 @@ impl PRegSet {
}

/// Add a physical register (PReg) to the set.
pub fn add(&mut self, reg: PReg) {
pub const fn add(&mut self, reg: PReg) {
let (index, bit) = Self::split_index(reg);
self.bits[index] |= 1 << bit;
}
Expand DownExpand Up@@ -462,6 +462,11 @@ impl VReg {
pub const fn bits(self) -> usize {
self.bits as usize
}

#[inline(always)]
pub const fn from_bits(bits: u32) -> VReg {
Self { bits }
}
}

impl From<u32> for VReg {
Expand Down