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Fix s390x regressions - #3330
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uweigand
commented
Sep 11, 2021
Note: In addition to this PR, the endian fix in PR #3329 and the rsix build fix bytecodealliance/rustix#53 are required to make the CI tests fully pass again on s390x. |
uweigand
commented
Sep 11, 2021
Also: Using qemu 6.1 we should now be able to turn on upstream CI for the s390x platform. |
Subscribe to Label Actioncc @fitzgen DetailsThis issue or pull request has been labeled: "cranelift", "fuzzing"Thus the following users have been cc'd because of the following labels:
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This pulls in the s390x fix needed by bytecodealliance#3330. Also a small `rsix` API update; `PollFdVec` has been removed in favor of just using `Vec<PollFd>`.
sunfishcode
commented
Sep 11, 2021
I opened #3331 to pull in the s390x fix in |
uweigand
commented
Sep 11, 2021
Thanks, @sunfishcode ! |
This pulls in the s390x fix needed by #3330. Also a small `rsix` API update; `PollFdVec` has been removed in favor of just using `Vec<PollFd>`.
alexcrichton
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I think someone else will want to review the cranelift/codegen/src/isa/s390x/lower.rs bits, but all the other bits look good to me.
| // No simd support yet for s390x. | ||
| ("simd", _) if platform_is_s390x() => return true, | ||
| // No memory64 support yet for s390x. | ||
| ("memory64", _) if platform_is_s390x() => return true, |
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How come memory64 isn't implemented on s390x? Does it lower to unimplemented clif things at the moment?
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Yes. This is all fixable, but I'd prefer to do that separately.
| // This can address any valid CodeOffset. | ||
| LabelUse::BranchRIL => 0x7fff_ffff, | ||
| LabelUse::PCRel32 => 0x7fff_ffff, | ||
| LabelUse::PCRel32Dbl => 0x7fff_ffff, |
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Given the shift, is the range actually one bit larger than what's specified here?
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The range is actually +/- 4GB, not +/-2 GB. But that apparently cannot be represented as CodeOffset anyway, so I simply accept all valid CodeOffsets here.
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Could this return 0xffff_ffff as a placeholder? One day I think it'd be good to represent some code offsets in this area as a 64-bit integer, but that I think is a much bigger change.
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I tried that when adding BranchRIL (which has the same range) initially, and it caused failures (some kind of overflows in common code), so that's what I ended up with. I guess this could be revisited at some point, but then we should do it for all affected LabelUse types, not just PCRel32Dbl.
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Can the overflow be fixed with a saturating_add or something like that somewhere? If not can the comment be updated that this should be 4GB but it's specified as 2GB for now?
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That would probably help, I'll give it a try. It's still better to do that in a separate PR I think.
- Add relocation handling needed after PR bytecodealliance#3275 - Fix incorrect handling of signed constants detected by PR bytecodealliance#3056 test - Fix LabelUse max pos/neg ranges; fix overflow in buffers.rs - Disable fuzzing tests that require pre-built v8 binaries - Disable cranelift test that depends on i128 - Temporarily disable memory64 tests
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1632d0eCompareuweigand
commented
Sep 13, 2021
@alexcrichton you were right, I just had to add a single Note that BranchRI max ranges were just completely wrong, but that type isn't currently used anywhere so it didn't matter. I've now fixed this and used precise max ranges for all types, only capped by a max of 0xffff_ffff due to the u32 type. |
alexcrichton
commented
Sep 13, 2021
Nah yeah that's what I would have expected for a |
afonso360
commented
Sep 15, 2021
Just want to mention that we have now upgraded to 6.1 in #3325 |
uweigand
commented
Sep 15, 2021
Thanks! @cfallin do you want to have a look at those? |
uweigand
commented
Sep 15, 2021
Excellent. Not sure exactly what we need to do to add a CI job for s390x, I haven't done much with GitHub actions before ... |
alexcrichton
commented
Sep 15, 2021
To add a CI job theoretically all that needs to be done is to copy/paste this block to add another entry below it, and then update the various values for s390x instead of aarch64. |
uweigand
commented
Sep 15, 2021
Thanks! I'll give it a try once the two PRs are merged. |
uweigand
commented
Sep 20, 2021
So can this be merged now? This is now the final bit blocking successful builds on s390x ... |
uweigand
commented
Sep 20, 2021
This is now #3372 . I also had to disable the lightbeam tests (just like on aarch64). |
callinstructions between wasm functions #3275