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Improve Arm64 Performance in .NET 10 #109652

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Improve Arm64 Performance in .NET 10#109652
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JulieLeeMSFT
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User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
Milestone
10.0.0

Description

@kunalspathak
kunalspathak
opened on Nov 8, 2024

We will continue to improve the code quality for Arm64 targets in .NET 10 to benefit our customers who run or wants to run their workload on Arm64 hardware.

General optimizations

Compact encoding

  • Improve code quality by making use of instructions that do more than one operation and hence improve the encoding of Arm64. Also, as part of this work, we will revisit the addressing modes that are ignored or used less frequently (e.g. post-index addressing mode) but can give much better code quality. Review the multi-op instruction usage for Arm64 #68028

Improvements in GC

Scalable Vector Extension

Wrap the non-streaming SVE work

Reference: #101477

Sve2 APIs

Pushed out to Future

PAC/RET feature enablement

Debugger support

Scalable Vector Extension

Add support for vector length agnostic

The primary requirement before starting the design of streaming-mode SVE and SME would be to add support in JIT/.NET runtime for VL agnostic. This includes the following:

  • (WIP) Introduce TYP_SIMD and educate various JIT code paths about the new type. See if some portion of this can be achievable on how we handle stackalloc.
  • (WIP) Make sure getVectorTByteLength() returns VL that is available on the hardware and fix all the JIT code paths affected.
  • Sort locals such that TYP_SIMD / TYP_MASK are at the very last. They will be places at the bottom of the stack frame layout.
  • (WIP) Access the stack offsets of TYP_SIMD / TYP_MASK using sve instructions
  • Enable non-streaming SVE for NativeAOT / crossgen with VL agnostic.

Design streaming mode SVE and SME

  • Come up with API design of streaming-mode SVE and SME and its interaction with non-streaming APIs as well as NEON APIs.
  • Implication of the streaming modes switch on overall .NET runtime executing process
  • Handling of diagnostics and debugging during streaming mode
  • NativeAOT and crossgen support in presence of streaming mode flag toggles
  • How faults and exceptions will be handled, and how the state restore will happen.
  • Handling of ZA storage register in LSRA
  • PR: [SME] Design proposal #115037

References:

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Improve Arm64 Performance in .NET 10 · Issue #109652 · dotnet/runtime · GitHub
Skip to content
Improve Arm64 Performance in .NET 10 #109652
Closed
Closed
Improve Arm64 Performance in .NET 10#109652
Assignees
JulieLeeMSFT
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
Milestone
10.0.0
Description
@kunalspathak
kunalspathak
opened on Nov 8, 2024
We will continue to improve the code quality for Arm64 targets in .NET 10 to benefit our customers who run or wants to run their workload on Arm64 hardware.
General optimizations
Compact encoding
  •  Improve code quality by making use of instructions that do more than one operation and hence improve the encoding of Arm64. Also, as part of this work, we will revisit the addressing modes that are ignored or used less frequently (e.g. post-index addressing mode) but can give much better code quality. Review the multi-op instruction usage for Arm64 #68028
Improvements in GC
Scalable Vector Extension
Wrap the non-streaming SVE work
Reference: #101477
Sve2 APIs
Pushed out to Future
PAC/RET feature enablement
Debugger support
Scalable Vector Extension
Add support for vector length agnostic
The primary requirement before starting the design of streaming-mode SVE and SME would be to add support in JIT/.NET runtime for VL agnostic. This includes the following:
  •  (WIP) Introduce TYP_SIMD and educate various JIT code paths about the new type. See if some portion of this can be achievable on how we handle stackalloc.
  •  (WIP) Make sure getVectorTByteLength() returns VL that is available on the hardware and fix all the JIT code paths affected.
  •  Sort locals such that TYP_SIMD / TYP_MASK are at the very last. They will be places at the bottom of the stack frame layout.
  •  (WIP) Access the stack offsets of TYP_SIMD / TYP_MASK using sve instructions
  •  Enable non-streaming SVE for NativeAOT / crossgen with VL agnostic.
Design streaming mode SVE and SME
  • Come up with API design of streaming-mode SVE and SME and its interaction with non-streaming APIs as well as NEON APIs.
  • Implication of the streaming modes switch on overall .NET runtime executing process
  • Handling of diagnostics and debugging during streaming mode
  • NativeAOT and crossgen support in presence of streaming mode flag toggles
  • How faults and exceptions will be handled, and how the state restore will happen.
  • Handling of ZA storage register in LSRA
  • PR: [SME] Design proposal #115037
References:
Metadata
Metadata
Assignees
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User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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Improve Arm64 Performance in .NET 10 · Issue #109652 · dotnet/runtime · GitHub
Skip to content
Improve Arm64 Performance in .NET 10 #109652
Closed
Closed
Improve Arm64 Performance in .NET 10#109652
Assignees
JulieLeeMSFT
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
Milestone
10.0.0
Description
@kunalspathak
kunalspathak
opened on Nov 8, 2024
We will continue to improve the code quality for Arm64 targets in .NET 10 to benefit our customers who run or wants to run their workload on Arm64 hardware.
General optimizations
Compact encoding
  •  Improve code quality by making use of instructions that do more than one operation and hence improve the encoding of Arm64. Also, as part of this work, we will revisit the addressing modes that are ignored or used less frequently (e.g. post-index addressing mode) but can give much better code quality. Review the multi-op instruction usage for Arm64 #68028
Improvements in GC
Scalable Vector Extension
Wrap the non-streaming SVE work
Reference: #101477
Sve2 APIs
Pushed out to Future
PAC/RET feature enablement
Debugger support
Scalable Vector Extension
Add support for vector length agnostic
The primary requirement before starting the design of streaming-mode SVE and SME would be to add support in JIT/.NET runtime for VL agnostic. This includes the following:
  •  (WIP) Introduce TYP_SIMD and educate various JIT code paths about the new type. See if some portion of this can be achievable on how we handle stackalloc.
  •  (WIP) Make sure getVectorTByteLength() returns VL that is available on the hardware and fix all the JIT code paths affected.
  •  Sort locals such that TYP_SIMD / TYP_MASK are at the very last. They will be places at the bottom of the stack frame layout.
  •  (WIP) Access the stack offsets of TYP_SIMD / TYP_MASK using sve instructions
  •  Enable non-streaming SVE for NativeAOT / crossgen with VL agnostic.
Design streaming mode SVE and SME
  • Come up with API design of streaming-mode SVE and SME and its interaction with non-streaming APIs as well as NEON APIs.
  • Implication of the streaming modes switch on overall .NET runtime executing process
  • Handling of diagnostics and debugging during streaming mode
  • NativeAOT and crossgen support in presence of streaming mode flag toggles
  • How faults and exceptions will be handled, and how the state restore will happen.
  • Handling of ZA storage register in LSRA
  • PR: [SME] Design proposal #115037
References:
Metadata
Metadata
Assignees
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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Improve Arm64 Performance in .NET 10 · Issue #109652 · dotnet/runtime · GitHub
Skip to content
Improve Arm64 Performance in .NET 10 #109652
Closed
Closed
Improve Arm64 Performance in .NET 10#109652
Assignees
JulieLeeMSFT
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
Milestone
10.0.0
Description
@kunalspathak
kunalspathak
opened on Nov 8, 2024
We will continue to improve the code quality for Arm64 targets in .NET 10 to benefit our customers who run or wants to run their workload on Arm64 hardware.
General optimizations
Compact encoding
  •  Improve code quality by making use of instructions that do more than one operation and hence improve the encoding of Arm64. Also, as part of this work, we will revisit the addressing modes that are ignored or used less frequently (e.g. post-index addressing mode) but can give much better code quality. Review the multi-op instruction usage for Arm64 #68028
Improvements in GC
Scalable Vector Extension
Wrap the non-streaming SVE work
Reference: #101477
Sve2 APIs
Pushed out to Future
PAC/RET feature enablement
Debugger support
Scalable Vector Extension
Add support for vector length agnostic
The primary requirement before starting the design of streaming-mode SVE and SME would be to add support in JIT/.NET runtime for VL agnostic. This includes the following:
  •  (WIP) Introduce TYP_SIMD and educate various JIT code paths about the new type. See if some portion of this can be achievable on how we handle stackalloc.
  •  (WIP) Make sure getVectorTByteLength() returns VL that is available on the hardware and fix all the JIT code paths affected.
  •  Sort locals such that TYP_SIMD / TYP_MASK are at the very last. They will be places at the bottom of the stack frame layout.
  •  (WIP) Access the stack offsets of TYP_SIMD / TYP_MASK using sve instructions
  •  Enable non-streaming SVE for NativeAOT / crossgen with VL agnostic.
Design streaming mode SVE and SME
  • Come up with API design of streaming-mode SVE and SME and its interaction with non-streaming APIs as well as NEON APIs.
  • Implication of the streaming modes switch on overall .NET runtime executing process
  • Handling of diagnostics and debugging during streaming mode
  • NativeAOT and crossgen support in presence of streaming mode flag toggles
  • How faults and exceptions will be handled, and how the state restore will happen.
  • Handling of ZA storage register in LSRA
  • PR: [SME] Design proposal #115037
References:
Metadata
Metadata
Assignees
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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Improve Arm64 Performance in .NET 10 · Issue #109652 · dotnet/runtime · GitHub
Skip to content
Improve Arm64 Performance in .NET 10 #109652
Closed
Closed
Improve Arm64 Performance in .NET 10#109652
Assignees
JulieLeeMSFT
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
Milestone
10.0.0
Description
@kunalspathak
kunalspathak
opened on Nov 8, 2024
We will continue to improve the code quality for Arm64 targets in .NET 10 to benefit our customers who run or wants to run their workload on Arm64 hardware.
General optimizations
Compact encoding
  •  Improve code quality by making use of instructions that do more than one operation and hence improve the encoding of Arm64. Also, as part of this work, we will revisit the addressing modes that are ignored or used less frequently (e.g. post-index addressing mode) but can give much better code quality. Review the multi-op instruction usage for Arm64 #68028
Improvements in GC
Scalable Vector Extension
Wrap the non-streaming SVE work
Reference: #101477
Sve2 APIs
Pushed out to Future
PAC/RET feature enablement
Debugger support
Scalable Vector Extension
Add support for vector length agnostic
The primary requirement before starting the design of streaming-mode SVE and SME would be to add support in JIT/.NET runtime for VL agnostic. This includes the following:
  •  (WIP) Introduce TYP_SIMD and educate various JIT code paths about the new type. See if some portion of this can be achievable on how we handle stackalloc.
  •  (WIP) Make sure getVectorTByteLength() returns VL that is available on the hardware and fix all the JIT code paths affected.
  •  Sort locals such that TYP_SIMD / TYP_MASK are at the very last. They will be places at the bottom of the stack frame layout.
  •  (WIP) Access the stack offsets of TYP_SIMD / TYP_MASK using sve instructions
  •  Enable non-streaming SVE for NativeAOT / crossgen with VL agnostic.
Design streaming mode SVE and SME
  • Come up with API design of streaming-mode SVE and SME and its interaction with non-streaming APIs as well as NEON APIs.
  • Implication of the streaming modes switch on overall .NET runtime executing process
  • Handling of diagnostics and debugging during streaming mode
  • NativeAOT and crossgen support in presence of streaming mode flag toggles
  • How faults and exceptions will be handled, and how the state restore will happen.
  • Handling of ZA storage register in LSRA
  • PR: [SME] Design proposal #115037
References:
Metadata
Metadata
Assignees
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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Improve Arm64 Performance in .NET 10 · Issue #109652 · dotnet/runtime · GitHub
Skip to content
Improve Arm64 Performance in .NET 10 #109652
Closed
Closed
Improve Arm64 Performance in .NET 10#109652
Assignees
JulieLeeMSFT
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
Milestone
10.0.0
Description
@kunalspathak
kunalspathak
opened on Nov 8, 2024
We will continue to improve the code quality for Arm64 targets in .NET 10 to benefit our customers who run or wants to run their workload on Arm64 hardware.
General optimizations
Compact encoding
  •  Improve code quality by making use of instructions that do more than one operation and hence improve the encoding of Arm64. Also, as part of this work, we will revisit the addressing modes that are ignored or used less frequently (e.g. post-index addressing mode) but can give much better code quality. Review the multi-op instruction usage for Arm64 #68028
Improvements in GC
Scalable Vector Extension
Wrap the non-streaming SVE work
Reference: #101477
Sve2 APIs
Pushed out to Future
PAC/RET feature enablement
Debugger support
Scalable Vector Extension
Add support for vector length agnostic
The primary requirement before starting the design of streaming-mode SVE and SME would be to add support in JIT/.NET runtime for VL agnostic. This includes the following:
  •  (WIP) Introduce TYP_SIMD and educate various JIT code paths about the new type. See if some portion of this can be achievable on how we handle stackalloc.
  •  (WIP) Make sure getVectorTByteLength() returns VL that is available on the hardware and fix all the JIT code paths affected.
  •  Sort locals such that TYP_SIMD / TYP_MASK are at the very last. They will be places at the bottom of the stack frame layout.
  •  (WIP) Access the stack offsets of TYP_SIMD / TYP_MASK using sve instructions
  •  Enable non-streaming SVE for NativeAOT / crossgen with VL agnostic.
Design streaming mode SVE and SME
  • Come up with API design of streaming-mode SVE and SME and its interaction with non-streaming APIs as well as NEON APIs.
  • Implication of the streaming modes switch on overall .NET runtime executing process
  • Handling of diagnostics and debugging during streaming mode
  • NativeAOT and crossgen support in presence of streaming mode flag toggles
  • How faults and exceptions will be handled, and how the state restore will happen.
  • Handling of ZA storage register in LSRA
  • PR: [SME] Design proposal #115037
References:
Metadata
Metadata
Assignees
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
Type
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Issue actions

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Improve Arm64 Performance in .NET 10 · Issue #109652 · dotnet/runtime · GitHub
Skip to content
Improve Arm64 Performance in .NET 10 #109652
Closed
Closed
Improve Arm64 Performance in .NET 10#109652
Assignees
JulieLeeMSFT
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
Milestone
10.0.0
Description
@kunalspathak
kunalspathak
opened on Nov 8, 2024
We will continue to improve the code quality for Arm64 targets in .NET 10 to benefit our customers who run or wants to run their workload on Arm64 hardware.
General optimizations
Compact encoding
  •  Improve code quality by making use of instructions that do more than one operation and hence improve the encoding of Arm64. Also, as part of this work, we will revisit the addressing modes that are ignored or used less frequently (e.g. post-index addressing mode) but can give much better code quality. Review the multi-op instruction usage for Arm64 #68028
Improvements in GC
Scalable Vector Extension
Wrap the non-streaming SVE work
Reference: #101477
Sve2 APIs
Pushed out to Future
PAC/RET feature enablement
Debugger support
Scalable Vector Extension
Add support for vector length agnostic
The primary requirement before starting the design of streaming-mode SVE and SME would be to add support in JIT/.NET runtime for VL agnostic. This includes the following:
  •  (WIP) Introduce TYP_SIMD and educate various JIT code paths about the new type. See if some portion of this can be achievable on how we handle stackalloc.
  •  (WIP) Make sure getVectorTByteLength() returns VL that is available on the hardware and fix all the JIT code paths affected.
  •  Sort locals such that TYP_SIMD / TYP_MASK are at the very last. They will be places at the bottom of the stack frame layout.
  •  (WIP) Access the stack offsets of TYP_SIMD / TYP_MASK using sve instructions
  •  Enable non-streaming SVE for NativeAOT / crossgen with VL agnostic.
Design streaming mode SVE and SME
  • Come up with API design of streaming-mode SVE and SME and its interaction with non-streaming APIs as well as NEON APIs.
  • Implication of the streaming modes switch on overall .NET runtime executing process
  • Handling of diagnostics and debugging during streaming mode
  • NativeAOT and crossgen support in presence of streaming mode flag toggles
  • How faults and exceptions will be handled, and how the state restore will happen.
  • Handling of ZA storage register in LSRA
  • PR: [SME] Design proposal #115037
References:
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border-color: #444 !important;
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Improve Arm64 Performance in .NET 10 · Issue #109652 · dotnet/runtime · GitHub
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Improve Arm64 Performance in .NET 10 #109652
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Closed
Improve Arm64 Performance in .NET 10#109652
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JulieLeeMSFT
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
Milestone
10.0.0
Description
@kunalspathak
kunalspathak
opened on Nov 8, 2024
We will continue to improve the code quality for Arm64 targets in .NET 10 to benefit our customers who run or wants to run their workload on Arm64 hardware.
General optimizations
Compact encoding
  •  Improve code quality by making use of instructions that do more than one operation and hence improve the encoding of Arm64. Also, as part of this work, we will revisit the addressing modes that are ignored or used less frequently (e.g. post-index addressing mode) but can give much better code quality. Review the multi-op instruction usage for Arm64 #68028
Improvements in GC
Scalable Vector Extension
Wrap the non-streaming SVE work
Reference: #101477
Sve2 APIs
Pushed out to Future
PAC/RET feature enablement
Debugger support
Scalable Vector Extension
Add support for vector length agnostic
The primary requirement before starting the design of streaming-mode SVE and SME would be to add support in JIT/.NET runtime for VL agnostic. This includes the following:
  •  (WIP) Introduce TYP_SIMD and educate various JIT code paths about the new type. See if some portion of this can be achievable on how we handle stackalloc.
  •  (WIP) Make sure getVectorTByteLength() returns VL that is available on the hardware and fix all the JIT code paths affected.
  •  Sort locals such that TYP_SIMD / TYP_MASK are at the very last. They will be places at the bottom of the stack frame layout.
  •  (WIP) Access the stack offsets of TYP_SIMD / TYP_MASK using sve instructions
  •  Enable non-streaming SVE for NativeAOT / crossgen with VL agnostic.
Design streaming mode SVE and SME
  • Come up with API design of streaming-mode SVE and SME and its interaction with non-streaming APIs as well as NEON APIs.
  • Implication of the streaming modes switch on overall .NET runtime executing process
  • Handling of diagnostics and debugging during streaming mode
  • NativeAOT and crossgen support in presence of streaming mode flag toggles
  • How faults and exceptions will be handled, and how the state restore will happen.
  • Handling of ZA storage register in LSRA
  • PR: [SME] Design proposal #115037
References:
Metadata
Metadata
Assignees
Labels
User StoryA single user-facing feature. Can be grouped under an epic.arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
Type
No type
Projects
Milestone
Relationships
None yet
Development
No branches or pull requests
Issue actions