[Fuzzlyn] Assert in genHWIntrinsic on Arm64

[tannergooding]

This is occurring for an RMW instruction with HW_Category_SIMDByIndexedElement and an immediate operand.

// Generated by Fuzzlyn v3.3 on 2025-07-14 15:23:51
// Run on Arm64 MacOS
// Seed: 15922217816187027764-vectort,vector64,vector128,armadvsimd,armadvsimdarm64,armaes,armarmbase,armarmbasearm64,armcrc32,armcrc32arm64,armdp,armrdm,armrdmarm64,armsha1,armsha256
// Reduced from 639.7 KiB to 1.3 KiB in 00:01:08
// Hits JIT assert for Release:
// Assertion failed '(targetReg == op1Reg) || (targetReg != op3Reg)' in 'Program:M0()' during 'Generate code' (IL size 116; hash 0xaf50ff37; FullOpts)
// 
// File: /Users/runner/work/1/s/src/coreclr/jit/hwintrinsiccodegenarm64.cpp Line: 372
// 
using System.Runtime.Intrinsics;
using System.Runtime.Intrinsics.Arm;

public class Program
{
 public static IRuntime s_rt;
 public static void Main()
 {
 M0();
 }

 public static void M0()
 {
 sbyte var5 = default(sbyte);
 uint[] var12 = default(uint[]);
 var vr1 = Vector64.CreateScalar(var5);
 var vr0 = AdvSimd.Extract(vr1, 0);
 Vector64<short> var9 = Vector64.Create<short>(vr0);
 M1();
 var vr2 = Vector64.Create<int>(0);
 var vr3 = Vector64.Create<short>(0);
 var vr4 = AdvSimd.MultiplyAddBySelectedScalar(var9, var9, var9, 1);
 Vector64<int> var10 = AdvSimd.Arm64.MultiplyDoublingWideningScalarBySelectedScalarAndAddSaturate(vr2, vr3, vr4, 0);
 try
 {
 s_rt.WriteLine(var12[0]);
 }
 catch (System.Exception)
 {
 }

 s_rt.WriteLine(var9);
 s_rt.WriteLine(var10);
 }

 public static short M1()
 {
 return (short)(-39 >> (sbyte)(short)ArmBase.Arm64.LeadingZeroCount(0));
 }
}

public interface IRuntime
{
 void WriteLine<T>(T value);
}

public class Runtime : IRuntime
{
 public void WriteLine<T>(T value) => System.Console.WriteLine(value);
}

[dotnet-policy-service]

Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
See info in area-owners.md if you want to be subscribed.

[JulieLeeMSFT]

@jakobbotsch, PTAL.
CC @amanasifkhalid.