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[RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen #131003

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[RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen#131003
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adamperlin
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arch-wasmWebAssembly architecturearea-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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@adamperlin
adamperlin
opened on Jul 17, 2026

These are currently implemented using jump tables to select the right lane index when the lane isn't known at compile time, but the operation can be converted into {STORE,LOAD}(vector_base_addr, lane_offset), where the lane_offset does not necessarily need to be known at compile time. ReplaceScalar and ExtractScalar could also be implemented this way if the vectors were spilled to be addressable.

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[RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen · Issue #131003 · dotnet/runtime · GitHub
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    [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen #131003
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    [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen#131003
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    adamperlin
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    arch-wasmWebAssembly architecturearea-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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    @adamperlin
    adamperlin
    opened on Jul 17, 2026
    These are currently implemented using jump tables to select the right lane index when the lane isn't known at compile time, but the operation can be converted into {STORE,LOAD}(vector_base_addr, lane_offset), where the lane_offset does not necessarily need to be known at compile time. ReplaceScalar and ExtractScalar could also be implemented this way if the vectors were spilled to be addressable.
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[RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen · Issue #131003 · dotnet/runtime · GitHub
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      [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen #131003
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      [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen#131003
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      @adamperlin
      adamperlin
      opened on Jul 17, 2026
      These are currently implemented using jump tables to select the right lane index when the lane isn't known at compile time, but the operation can be converted into {STORE,LOAD}(vector_base_addr, lane_offset), where the lane_offset does not necessarily need to be known at compile time. ReplaceScalar and ExtractScalar could also be implemented this way if the vectors were spilled to be addressable.
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[RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen · Issue #131003 · dotnet/runtime · GitHub
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        [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen #131003
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        [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen#131003
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        adamperlin
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        Milestone
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        Description
        @adamperlin
        adamperlin
        opened on Jul 17, 2026
        These are currently implemented using jump tables to select the right lane index when the lane isn't known at compile time, but the operation can be converted into {STORE,LOAD}(vector_base_addr, lane_offset), where the lane_offset does not necessarily need to be known at compile time. ReplaceScalar and ExtractScalar could also be implemented this way if the vectors were spilled to be addressable.
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[RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen · Issue #131003 · dotnet/runtime · GitHub
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          [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen #131003
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          [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen#131003
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          adamperlin
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          arch-wasmWebAssembly architecturearea-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
          Milestone
          12.0.0
          Description
          @adamperlin
          adamperlin
          opened on Jul 17, 2026
          These are currently implemented using jump tables to select the right lane index when the lane isn't known at compile time, but the operation can be converted into {STORE,LOAD}(vector_base_addr, lane_offset), where the lane_offset does not necessarily need to be known at compile time. ReplaceScalar and ExtractScalar could also be implemented this way if the vectors were spilled to be addressable.
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var __m = "*";
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[RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen · Issue #131003 · dotnet/runtime · GitHub
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            [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen #131003
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            [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen#131003
            Assignees
            adamperlin
            Labels
            arch-wasmWebAssembly architecturearea-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
            Milestone
            12.0.0
            Description
            @adamperlin
            adamperlin
            opened on Jul 17, 2026
            These are currently implemented using jump tables to select the right lane index when the lane isn't known at compile time, but the operation can be converted into {STORE,LOAD}(vector_base_addr, lane_offset), where the lane_offset does not necessarily need to be known at compile time. ReplaceScalar and ExtractScalar could also be implemented this way if the vectors were spilled to be addressable.
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[RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen · Issue #131003 · dotnet/runtime · GitHub
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              [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen #131003
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              [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen#131003
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              adamperlin
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              arch-wasmWebAssembly architecturearea-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
              Milestone
              12.0.0
              Description
              @adamperlin
              adamperlin
              opened on Jul 17, 2026
              These are currently implemented using jump tables to select the right lane index when the lane isn't known at compile time, but the operation can be converted into {STORE,LOAD}(vector_base_addr, lane_offset), where the lane_offset does not necessarily need to be known at compile time. ReplaceScalar and ExtractScalar could also be implemented this way if the vectors were spilled to be addressable.
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[RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen · Issue #131003 · dotnet/runtime · GitHub
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                [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen #131003
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                [RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen#131003
                Assignees
                adamperlin
                Labels
                arch-wasmWebAssembly architecturearea-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
                Milestone
                12.0.0
                Description
                @adamperlin
                adamperlin
                opened on Jul 17, 2026
                These are currently implemented using jump tables to select the right lane index when the lane isn't known at compile time, but the operation can be converted into {STORE,LOAD}(vector_base_addr, lane_offset), where the lane_offset does not necessarily need to be known at compile time. ReplaceScalar and ExtractScalar could also be implemented this way if the vectors were spilled to be addressable.
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