Intel SHA instructions assist with hardware acceleration of the SHA-1 and SHA-256 hash algorithms.
Current Ryzen processors that support these instructions can reach SHA-256 speeds of around 2 GB/s, roughly 4x faster than not using SHA instructions.
Support for these instructions via .NET Core's hardware intrinsics would be useful in SHA-heavy workloads.
Proposed API
namespaceSystem.Runtime.Intrinsics.X86{publicclassSha{/// <summary>/// __m128i _mm_sha1msg1_epu32 (__m128i a, __m128i b)/// SHA1MSG1 xmm, xmm/m128/// </summary>publicstaticVector128<byte>Sha1MessageSchedule1(Vector128<byte>a,Vector128<byte>b)=>MessageSchedule1(a,b);/// <summary>/// __m128i _mm_sha1msg2_epu32 (__m128i a, __m128i b)/// SHA1MSG2 xmm, xmm/m128/// </summary>publicstaticVector128<byte>Sha1MessageSchedule2(Vector128<byte>a,Vector128<byte>b)=>MessageSchedule2(a,b);/// <summary>/// __m128i _mm_sha1nexte_epu32 (__m128i a, __m128i b)/// SHA1NEXTE xmm, xmm/m128/// </summary>publicstaticVector128<byte>Sha1NextE(Vector128<byte>a,Vector128<byte>b)=>NextE(a,b);/// <summary>/// __m128i _mm_sha1rnds4_epu32 (__m128i a, __m128i b, const int func)/// SHA1RNDS4 xmm, xmm/m128, imm8/// </summary>publicstaticVector128<byte>Sha1Rounds(Vector128<byte>state1,Vector128<byte>state2,bytefunc)=>Rounds(state1,state2,func);/// <summary>/// __m128i _mm_sha256msg1_epu32 (__m128i a, __m128i b)/// SHA256MSG1 xmm, xmm/m128/// </summary>publicstaticVector128<byte>Sha256MessageSchedule1(Vector128<byte>a,Vector128<byte>b)=>MessageSchedule1(a,b);/// <summary>/// __m128i _mm_sha256msg2_epu32 (__m128i a, __m128i b)/// SHA256MSG2 xmm, xmm/m128/// </summary>publicstaticVector128<byte>Sha256MessageSchedule2(Vector128<byte>a,Vector128<byte>b)=>MessageSchedule2(a,b);/// <summary>/// __m128i _mm_sha256rnds2_epu32 (__m128i a, __m128i b, __m128i k)/// SHA256RNDS2 xmm, xmm/m128, <XMM0>/// </summary>publicstaticVector128<byte>Sha256Rounds(Vector128<byte>state1,Vector128<byte>state2,Vector128<byte>message)=>Rounds(state1,state2,message);}}The naming of the functions and parameters still need work.
Intel SHA instructions assist with hardware acceleration of the SHA-1 and SHA-256 hash algorithms.
Current Ryzen processors that support these instructions can reach SHA-256 speeds of around 2 GB/s, roughly 4x faster than not using SHA instructions.
Support for these instructions via .NET Core's hardware intrinsics would be useful in SHA-heavy workloads.
Proposed API
The naming of the functions and parameters still need work.