[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86#116331

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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86 #116331

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bbc548f
Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86
filipnavara Jun 5, 2025
5deed43
WIP: Enable fast tailcall on x86
filipnavara Jun 6, 2025
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4 changes: 1 addition & 3 deletions src/coreclr/clrdefinitions.cmake
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Original file line numberDiff line numberDiff line change
Expand Up@@ -64,9 +64,7 @@ if(NOT CLR_CMAKE_TARGET_ARCH_I386)
add_definitions(-DFEATURE_PORTABLE_SHUFFLE_THUNKS)
endif()

if(CLR_CMAKE_TARGET_UNIX OR NOT CLR_CMAKE_TARGET_ARCH_I386)
add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)
endif()
add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)

add_compile_definitions(FEATURE_CODE_VERSIONING)
add_definitions(-DFEATURE_COLLECTIBLE_TYPES)
Expand Down
12 changes: 4 additions & 8 deletions src/coreclr/jit/codegen.h
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Original file line numberDiff line numberDiff line change
Expand Up@@ -1172,14 +1172,12 @@ class CodeGen final : public CodeGenInterface

#endif

#ifndef TARGET_X86
void genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum);
#endif // !TARGET_X86

#ifdef TARGET_X86
bool genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk);
void genPushReg(var_types type, regNumber srcReg);
void genPutArgStkFieldList(GenTreePutArgStk* putArgStk);
void genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk);
#endif // TARGET_X86

void genPutStructArgStk(GenTreePutArgStk* treeNode);
Expand All@@ -1194,9 +1192,8 @@ class CodeGen final : public CodeGenInterface
void genStructPutArgUnroll(GenTreePutArgStk* putArgStkNode);
#ifdef TARGET_X86
void genStructPutArgPush(GenTreePutArgStk* putArgStkNode);
#else
void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);
#endif
void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);

void genCodeForStoreBlk(GenTreeBlk* storeBlkNode);
void genCodeForInitBlkLoop(GenTreeBlk* initBlkNode);
Expand DownExpand Up@@ -1294,10 +1291,9 @@ class CodeGen final : public CodeGenInterface

#ifdef TARGET_X86
bool m_pushStkArg;
#else // !TARGET_X86
unsigned m_stkArgVarNum;
unsigned m_stkArgOffset;
#endif // !TARGET_X86
unsigned m_stkArgVarNum = BAD_VAR_NUM;
unsigned m_stkArgOffset;

#if defined(DEBUG) && defined(TARGET_XARCH)
void genStackPointerCheck(bool doStackPointerCheck,
Expand Down
22 changes: 16 additions & 6 deletions src/coreclr/jit/codegencommon.cpp
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Original file line numberDiff line numberDiff line change
Expand Up@@ -201,9 +201,7 @@ void CodeGenInterface::CopyRegisterInfo()
CodeGen::CodeGen(Compiler* theCompiler)
: CodeGenInterface(theCompiler)
{
#if !defined(TARGET_X86)
m_stkArgVarNum = BAD_VAR_NUM;
#endif

#if defined(UNIX_X86_ABI)
curNestedAlignment = 0;
Expand DownExpand Up@@ -4456,7 +4454,7 @@ void CodeGen::genFinalizeFrame()

#if defined(TARGET_X86)

if (compiler->compTailCallUsed)
if (compiler->compTailCallViaJitHelperUsed)
{
// If we are generating a helper-based tailcall, we've set the tailcall helper "flags"
// argument to "1", indicating to the tailcall helper that we've saved the callee-saved
Expand DownExpand Up@@ -5895,10 +5893,22 @@ unsigned CodeGen::getFirstArgWithStackSlot()
return BAD_VAR_NUM;
#elif defined(TARGET_AMD64)
return 0;
#else // TARGET_X86
// Not implemented for x86.
NYI_X86("getFirstArgWithStackSlot not yet implemented for x86.");
#elif defined(TARGET_X86)
// On x86 args are passed on the stack in reverse, so the base is the last stack argument.
for (unsigned i = compiler->info.compArgsCount; i != 0; i--)
{
const ABIPassingInformation& abiInfo = compiler->lvaGetParameterABIInfo(i - 1);
assert(abiInfo.NumSegments == 1);
if (abiInfo.Segment(0).IsPassedOnStack())
{
return i - 1;
}
}

assert(!"Expected to find stack parameter");
return BAD_VAR_NUM;
#else
#error Not implemented
#endif // TARGET_X86
}

Expand Down
15 changes: 10 additions & 5 deletions src/coreclr/jit/codegenlinear.cpp
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Original file line numberDiff line numberDiff line change
Expand Up@@ -1793,7 +1793,14 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,

#ifdef TARGET_X86
assert(dstReg != REG_SPBASE);
inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
if (m_stkArgVarNum == BAD_VAR_NUM)
{
inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
}
else
{
GetEmitter()->emitIns_R_S(INS_lea, EA_PTRSIZE, dstReg, m_stkArgVarNum, putArgNode->getArgOffset());
}
#else // !TARGET_X86
GenTree* dstAddr = putArgNode;
if (dstAddr->GetRegNum() != dstReg)
Expand DownExpand Up@@ -1834,10 +1841,9 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,
// outArgVarNum - The lclVar num for the argument
//
// Notes:
// The x86 version of this is in codegenxarch.cpp, and doesn't take an
// outArgVarNum, as it pushes its args onto the stack.
// The primary x86 version of this is genPutArgStkPushFieldList in
// codegenxarch.cpp. This version is only used for fast tailcalls on x86.
//
#ifndef TARGET_X86
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum)
{
assert(putArgStk->gtOp1->OperIs(GT_FIELD_LIST));
Expand DownExpand Up@@ -1884,7 +1890,6 @@ void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArg
#endif
}
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// genSetBlockSize: Ensure that the block size is in the given register
Expand Down
78 changes: 59 additions & 19 deletions src/coreclr/jit/codegenxarch.cpp
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Open in desktop
Original file line numberDiff line numberDiff line change
Expand Up@@ -4126,7 +4126,6 @@ void CodeGen::genStructPutArgPush(GenTreePutArgStk* putArgNode)
}
#endif // TARGET_X86

#ifndef TARGET_X86
//------------------------------------------------------------------------
// genStructPutArgPartialRepMovs: Generates code for passing a struct arg by value on stack using
// a mix of pointer-sized stores, "movsq" and "rep movsd".
Expand DownExpand Up@@ -4217,7 +4216,6 @@ void CodeGen::genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgNode)

assert(numGCSlotsCopied == layout->GetGCPtrCount());
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// If any Vector3 args are on stack and they are not pass-by-ref, the upper 32bits
Expand DownExpand Up@@ -8107,15 +8105,15 @@ bool CodeGen::genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk)
}

//---------------------------------------------------------------------
// genPutArgStkFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
// genPutArgStkPushFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
//
// Arguments
// treeNode - the GT_PUTARG_STK node whose op1 is a GT_FIELD_LIST
//
// Return value:
// None
//
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk)
void CodeGen::genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk)
{
GenTreeFieldList* const fieldList = putArgStk->gtOp1->AsFieldList();
assert(fieldList != nullptr);
Expand DownExpand Up@@ -8332,28 +8330,63 @@ void CodeGen::genPutArgStk(GenTreePutArgStk* putArgStk)

if (data->OperIs(GT_FIELD_LIST))
{
genPutArgStkFieldList(putArgStk);
if (putArgStk->putInIncomingArgArea())
{
genPutArgStkFieldList(putArgStk, getBaseVarForPutArgStk(putArgStk));
}
else
{
genPutArgStkPushFieldList(putArgStk);
}
return;
}

if (varTypeIsStruct(targetType))
{
genAdjustStackForPutArgStk(putArgStk);
genPutStructArgStk(putArgStk);
if (putArgStk->putInIncomingArgArea())
{
m_pushStkArg = false;
m_stkArgVarNum = getBaseVarForPutArgStk(putArgStk);
m_stkArgOffset = putArgStk->getArgOffset();
genPutStructArgStk(putArgStk);
m_stkArgVarNum = BAD_VAR_NUM;
}
else
{
genAdjustStackForPutArgStk(putArgStk);
genPutStructArgStk(putArgStk);
}
return;
}

genConsumeRegs(data);

if (data->isUsedFromReg())
if (putArgStk->putInIncomingArgArea())
{
genPushReg(targetType, data->GetRegNum());
unsigned baseVarNum = getBaseVarForPutArgStk(putArgStk);
if (data->isContainedIntOrIImmed())
{
GetEmitter()->emitIns_S_I(ins_Store(targetType), emitTypeSize(targetType), baseVarNum,
putArgStk->getArgOffset(), (int)data->AsIntConCommon()->IconValue());
}
else
{
GetEmitter()->emitIns_S_R(ins_Store(targetType), emitTypeSize(targetType), data->GetRegNum(), baseVarNum,
putArgStk->getArgOffset());
}
}
else
{
assert(genTypeSize(data) == TARGET_POINTER_SIZE);
inst_TT(INS_push, emitTypeSize(data), data);
AddStackLevel(TARGET_POINTER_SIZE);
if (data->isUsedFromReg())
{
genPushReg(targetType, data->GetRegNum());
}
else
{
assert(genTypeSize(data) == TARGET_POINTER_SIZE);
inst_TT(INS_push, emitTypeSize(data), data);
AddStackLevel(TARGET_POINTER_SIZE);
}
}
#else // !TARGET_X86
{
Expand DownExpand Up@@ -8543,7 +8576,14 @@ void CodeGen::genStoreRegToStackArg(var_types type, regNumber srcReg, int offset
}
else
{
GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
if (m_stkArgVarNum != BAD_VAR_NUM)
{
GetEmitter()->emitIns_S_R(ins, attr, srcReg, m_stkArgVarNum, m_stkArgOffset + offset);
}
else
{
GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
}
}
#else // !TARGET_X86
assert(m_stkArgVarNum != BAD_VAR_NUM);
Expand DownExpand Up@@ -8571,7 +8611,7 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
var_types targetType = source->TypeGet();

#if defined(TARGET_X86) && defined(FEATURE_SIMD)
if (putArgStk->isSIMD12())
if (putArgStk->isSIMD12() && !putArgStk->putInIncomingArgArea())
{
genPutArgStkSimd12(putArgStk);
return;
Expand All@@ -8593,11 +8633,10 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
case GenTreePutArgStk::Kind::RepInstr:
genStructPutArgRepMovs(putArgStk);
break;
#ifndef TARGET_X86

case GenTreePutArgStk::Kind::PartialRepInstr:
genStructPutArgPartialRepMovs(putArgStk);
break;
#endif // !TARGET_X86

case GenTreePutArgStk::Kind::Unroll:
genStructPutArgUnroll(putArgStk);
Expand DownExpand Up@@ -10567,7 +10606,8 @@ void CodeGen::genFnEpilog(BasicBlock* block)
// Add 'compiler->compLclFrameSize' to ESP. Use "pop ECX" for that, except in cases
// where ECX may contain some state.

if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync())
if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync() &&
!compiler->compFastTailCallUsed)
{
inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
regSet.verifyRegUsed(REG_ECX);
Expand DownExpand Up@@ -10655,7 +10695,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
}
#ifdef TARGET_X86
else if ((compiler->compLclFrameSize == REGSIZE_BYTES) && !compiler->compJmpOpUsed &&
!compiler->compIsAsync())
!compiler->compIsAsync() && !compiler->compFastTailCallUsed)
{
// "pop ecx" will make ESP point to the callee-saved registers
inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
Expand DownExpand Up@@ -10809,7 +10849,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
#if FEATURE_FASTTAILCALL
else
{
genCallInstruction(jmpNode->AsCall());
genCallInstruction(jmpNode->AsCall() X86_ARG(0));
}
#endif // FEATURE_FASTTAILCALL
}
Expand Down
14 changes: 9 additions & 5 deletions src/coreclr/jit/compiler.h
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Original file line numberDiff line numberDiff line change
Expand Up@@ -9877,11 +9877,15 @@ class Compiler

InlineResult* compInlineResult; // The result of importing the inlinee method.

bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
bool compJmpOpUsed = false; // Does the method do a JMP
bool compLongUsed = false; // Does the method use TYP_LONG
bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
bool compTailCallUsed = false; // Does the method do a tailcall
bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
bool compJmpOpUsed = false; // Does the method do a JMP
bool compLongUsed = false; // Does the method use TYP_LONG
bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
bool compTailCallUsed = false; // Does the method do a tailcall
#ifdef TARGET_X86
bool compTailCallViaJitHelperUsed = false;
bool compFastTailCallUsed = false;
#endif
bool compTailPrefixSeen = false; // Does the method IL have tail. prefix
bool compLocallocSeen = false; // Does the method IL have localloc opcode
bool compLocallocUsed = false; // Does the method use localloc.
Expand Down
4 changes: 4 additions & 0 deletions src/coreclr/jit/emitxarch.cpp
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Original file line numberDiff line numberDiff line change
Expand Up@@ -11266,12 +11266,14 @@ void emitter::emitIns_Call(const EmitCallParams& params)
id->idAddr()->iiaAddrMode.amScale = params.xmul ? emitEncodeScale(params.xmul) : emitter::OPSZ1;

code_t code = insCodeMR(ins);
#ifndef TARGET_X86
if (ins == INS_tail_i_jmp)
{
// Tailcall with addressing mode/register needs to be rex.w
// prefixed to be recognized as part of epilog by unwinder.
code = AddRexWPrefix(id, code);
}
#endif

sz = emitInsSizeAM(id, code);

Expand DownExpand Up@@ -14386,12 +14388,14 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
if ((ins == INS_call) || (ins == INS_tail_i_jmp))
{
code = AddX86PrefixIfNeeded(id, code, size);
#ifndef TARGET_X86
if (ins == INS_tail_i_jmp)
{
// tail call with addressing mode (or through register) needs rex.w
// prefix to be recognized by unwinder as part of epilog.
code = AddRexWPrefix(id, code);
}
#endif

// Special case: call via a register
if (id->idIsCallRegPtr())
Expand Down
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, 'i'); if (__m === '*' || __re.test(location.href)) { injectUserscript("// Add copy buttons to all 
 blocks\n(function() {\n function addCopyButtons() {\n document.querySelectorAll('pre code').forEach(function(codeBlock) {\n if (codeBlock.parentElement.hasAttribute('data-copy-added')) return;\n codeBlock.parentElement.setAttribute('data-copy-added', 'true');\n \n var btn = document.createElement('button');\n btn.textContent = 'Copy';\n btn.style.cssText = 'position:absolute;top:4px;right:4px;padding:2px 8px;font-size:11px;background:#4ecdc4;border:none;border-radius:4px;color:#1a1a2e;cursor:pointer;opacity:0.7;transition:opacity 0.2s;';\n btn.onmouseover = function() { this.style.opacity = '1'; };\n btn.onmouseout = function() { this.style.opacity = '0.7'; };\n btn.onclick = function() {\n navigator.clipboard.writeText(codeBlock.textContent).then(function() {\n btn.textContent = 'Copied!';\n setTimeout(function() { btn.textContent = 'Copy'; }, 1500);\n });\n };\n codeBlock.parentElement.style.position = 'relative';\n codeBlock.parentElement.appendChild(btn);\n });\n }\n \n addCopyButtons();\n \n // Re-run on dynamic content\n var observer = new MutationObserver(addCopyButtons);\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Add Copy Buttons to Code Blocks");
}
} catch(__e) { console.warn('[Userscript:Add Copy Buttons to Code Blocks]', __e); }
})();
(function(){
try {
var __m = "github.com";
var __re = new RegExp('^' + "github\\.com" + '

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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86#116331

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filipnavara
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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86
#116331
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bbc548f

Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86


filipnavara Jun 5, 2025
5deed43

WIP: Enable fast tailcall on x86


filipnavara Jun 6, 2025

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4 changes: 1 addition & 3 deletions
src/coreclr/clrdefinitions.cmake

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -64,9 +64,7 @@ if(NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_PORTABLE_SHUFFLE_THUNKS)
endif()

if(CLR_CMAKE_TARGET_UNIX OR NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)
endif()
add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)

add_compile_definitions(FEATURE_CODE_VERSIONING)
add_definitions(-DFEATURE_COLLECTIBLE_TYPES)
Expand Down

12 changes: 4 additions & 8 deletions
src/coreclr/jit/codegen.h

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Original file line numberDiff line numberDiff line change
Expand Up@@ -1172,14 +1172,12 @@ class CodeGen final : public CodeGenInterface

#endif

#ifndef TARGET_X86
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum);
#endif // !TARGET_X86

#ifdef TARGET_X86
 bool genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk);
 void genPushReg(var_types type, regNumber srcReg);
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk);
 void genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk);
#endif // TARGET_X86

 void genPutStructArgStk(GenTreePutArgStk* treeNode);
Expand All@@ -1194,9 +1192,8 @@ class CodeGen final : public CodeGenInterface
 void genStructPutArgUnroll(GenTreePutArgStk* putArgStkNode);
#ifdef TARGET_X86
 void genStructPutArgPush(GenTreePutArgStk* putArgStkNode);
#else
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);
#endif
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);

 void genCodeForStoreBlk(GenTreeBlk* storeBlkNode);
 void genCodeForInitBlkLoop(GenTreeBlk* initBlkNode);
Expand DownExpand Up@@ -1294,10 +1291,9 @@ class CodeGen final : public CodeGenInterface

#ifdef TARGET_X86
 bool m_pushStkArg;
#else // !TARGET_X86
 unsigned m_stkArgVarNum;
 unsigned m_stkArgOffset;
#endif // !TARGET_X86
 unsigned m_stkArgVarNum = BAD_VAR_NUM;
 unsigned m_stkArgOffset;

#if defined(DEBUG) && defined(TARGET_XARCH)
 void genStackPointerCheck(bool doStackPointerCheck,
Expand Down

22 changes: 16 additions & 6 deletions
src/coreclr/jit/codegencommon.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -201,9 +201,7 @@ void CodeGenInterface::CopyRegisterInfo()
CodeGen::CodeGen(Compiler* theCompiler)
 : CodeGenInterface(theCompiler)
{
#if !defined(TARGET_X86)
 m_stkArgVarNum = BAD_VAR_NUM;
#endif

#if defined(UNIX_X86_ABI)
 curNestedAlignment = 0;
Expand DownExpand Up@@ -4456,7 +4454,7 @@ void CodeGen::genFinalizeFrame()

#if defined(TARGET_X86)

 if (compiler->compTailCallUsed)
 if (compiler->compTailCallViaJitHelperUsed)
 {
 // If we are generating a helper-based tailcall, we've set the tailcall helper "flags"
 // argument to "1", indicating to the tailcall helper that we've saved the callee-saved
Expand DownExpand Up@@ -5895,10 +5893,22 @@ unsigned CodeGen::getFirstArgWithStackSlot()
 return BAD_VAR_NUM;
#elif defined(TARGET_AMD64)
 return 0;
#else // TARGET_X86
 // Not implemented for x86.
 NYI_X86("getFirstArgWithStackSlot not yet implemented for x86.");
#elif defined(TARGET_X86)
 // On x86 args are passed on the stack in reverse, so the base is the last stack argument.
 for (unsigned i = compiler->info.compArgsCount; i != 0; i--)
 {
 const ABIPassingInformation& abiInfo = compiler->lvaGetParameterABIInfo(i - 1);
 assert(abiInfo.NumSegments == 1);
 if (abiInfo.Segment(0).IsPassedOnStack())
 {
 return i - 1;
 }
 }

 assert(!"Expected to find stack parameter");
 return BAD_VAR_NUM;
#else
#error Not implemented
#endif // TARGET_X86
}

Expand Down

15 changes: 10 additions & 5 deletions
src/coreclr/jit/codegenlinear.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -1793,7 +1793,14 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,

#ifdef TARGET_X86
 assert(dstReg != REG_SPBASE);
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 if (m_stkArgVarNum == BAD_VAR_NUM)
 {
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 }
 else
 {
 GetEmitter()->emitIns_R_S(INS_lea, EA_PTRSIZE, dstReg, m_stkArgVarNum, putArgNode->getArgOffset());
 }
#else // !TARGET_X86
 GenTree* dstAddr = putArgNode;
 if (dstAddr->GetRegNum() != dstReg)
Expand DownExpand Up@@ -1834,10 +1841,9 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,
// outArgVarNum - The lclVar num for the argument
//
// Notes:
// The x86 version of this is in codegenxarch.cpp, and doesn't take an
// outArgVarNum, as it pushes its args onto the stack.
// The primary x86 version of this is genPutArgStkPushFieldList in
// codegenxarch.cpp. This version is only used for fast tailcalls on x86.
//
#ifndef TARGET_X86
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum)
{
 assert(putArgStk->gtOp1->OperIs(GT_FIELD_LIST));
Expand DownExpand Up@@ -1884,7 +1890,6 @@ void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArg
#endif
 }
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// genSetBlockSize: Ensure that the block size is in the given register
Expand Down

78 changes: 59 additions & 19 deletions
src/coreclr/jit/codegenxarch.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -4126,7 +4126,6 @@ void CodeGen::genStructPutArgPush(GenTreePutArgStk* putArgNode)
}
#endif // TARGET_X86

#ifndef TARGET_X86
//------------------------------------------------------------------------
// genStructPutArgPartialRepMovs: Generates code for passing a struct arg by value on stack using
// a mix of pointer-sized stores, "movsq" and "rep movsd".
Expand DownExpand Up@@ -4217,7 +4216,6 @@ void CodeGen::genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgNode)

 assert(numGCSlotsCopied == layout->GetGCPtrCount());
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// If any Vector3 args are on stack and they are not pass-by-ref, the upper 32bits
Expand DownExpand Up@@ -8107,15 +8105,15 @@ bool CodeGen::genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk)
}

//---------------------------------------------------------------------
// genPutArgStkFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
// genPutArgStkPushFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
//
// Arguments
// treeNode - the GT_PUTARG_STK node whose op1 is a GT_FIELD_LIST
//
// Return value:
// None
//
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk)
void CodeGen::genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk)
{
 GenTreeFieldList* const fieldList = putArgStk->gtOp1->AsFieldList();
 assert(fieldList != nullptr);
Expand DownExpand Up@@ -8332,28 +8330,63 @@ void CodeGen::genPutArgStk(GenTreePutArgStk* putArgStk)

 if (data->OperIs(GT_FIELD_LIST))
 {
 genPutArgStkFieldList(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 genPutArgStkFieldList(putArgStk, getBaseVarForPutArgStk(putArgStk));
 }
 else
 {
 genPutArgStkPushFieldList(putArgStk);
 }
 return;
 }

 if (varTypeIsStruct(targetType))
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 m_pushStkArg = false;
 m_stkArgVarNum = getBaseVarForPutArgStk(putArgStk);
 m_stkArgOffset = putArgStk->getArgOffset();
 genPutStructArgStk(putArgStk);
 m_stkArgVarNum = BAD_VAR_NUM;
 }
 else
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 }
 return;
 }

 genConsumeRegs(data);

 if (data->isUsedFromReg())
 if (putArgStk->putInIncomingArgArea())
 {
 genPushReg(targetType, data->GetRegNum());
 unsigned baseVarNum = getBaseVarForPutArgStk(putArgStk);
 if (data->isContainedIntOrIImmed())
 {
 GetEmitter()->emitIns_S_I(ins_Store(targetType), emitTypeSize(targetType), baseVarNum,
 putArgStk->getArgOffset(), (int)data->AsIntConCommon()->IconValue());
 }
 else
 {
 GetEmitter()->emitIns_S_R(ins_Store(targetType), emitTypeSize(targetType), data->GetRegNum(), baseVarNum,
 putArgStk->getArgOffset());
 }
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 if (data->isUsedFromReg())
 {
 genPushReg(targetType, data->GetRegNum());
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 }
 }
#else // !TARGET_X86
 {
Expand DownExpand Up@@ -8543,7 +8576,14 @@ void CodeGen::genStoreRegToStackArg(var_types type, regNumber srcReg, int offset
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 if (m_stkArgVarNum != BAD_VAR_NUM)
 {
 GetEmitter()->emitIns_S_R(ins, attr, srcReg, m_stkArgVarNum, m_stkArgOffset + offset);
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 }
 }
#else // !TARGET_X86
 assert(m_stkArgVarNum != BAD_VAR_NUM);
Expand DownExpand Up@@ -8571,7 +8611,7 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 var_types targetType = source->TypeGet();

#if defined(TARGET_X86) && defined(FEATURE_SIMD)
 if (putArgStk->isSIMD12())
 if (putArgStk->isSIMD12() && !putArgStk->putInIncomingArgArea())
 {
 genPutArgStkSimd12(putArgStk);
 return;
Expand All@@ -8593,11 +8633,10 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 case GenTreePutArgStk::Kind::RepInstr:
 genStructPutArgRepMovs(putArgStk);
 break;
#ifndef TARGET_X86

 case GenTreePutArgStk::Kind::PartialRepInstr:
 genStructPutArgPartialRepMovs(putArgStk);
 break;
#endif // !TARGET_X86

 case GenTreePutArgStk::Kind::Unroll:
 genStructPutArgUnroll(putArgStk);
Expand DownExpand Up@@ -10567,7 +10606,8 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 // Add 'compiler->compLclFrameSize' to ESP. Use "pop ECX" for that, except in cases
 // where ECX may contain some state.

 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync())
 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync() &&
 !compiler->compFastTailCallUsed)
 {
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
 regSet.verifyRegUsed(REG_ECX);
Expand DownExpand Up@@ -10655,7 +10695,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 }
#ifdef TARGET_X86
 else if ((compiler->compLclFrameSize == REGSIZE_BYTES) && !compiler->compJmpOpUsed &&
 !compiler->compIsAsync())
 !compiler->compIsAsync() && !compiler->compFastTailCallUsed)
 {
 // "pop ecx" will make ESP point to the callee-saved registers
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
Expand DownExpand Up@@ -10809,7 +10849,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
#if FEATURE_FASTTAILCALL
 else
 {
 genCallInstruction(jmpNode->AsCall());
 genCallInstruction(jmpNode->AsCall() X86_ARG(0));
 }
#endif // FEATURE_FASTTAILCALL
 }
Expand Down

14 changes: 9 additions & 5 deletions
src/coreclr/jit/compiler.h

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Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -9877,11 +9877,15 @@ class Compiler

 InlineResult* compInlineResult; // The result of importing the inlinee method.

 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
#ifdef TARGET_X86
 bool compTailCallViaJitHelperUsed = false;
 bool compFastTailCallUsed = false;
#endif
 bool compTailPrefixSeen = false; // Does the method IL have tail. prefix
 bool compLocallocSeen = false; // Does the method IL have localloc opcode
 bool compLocallocUsed = false; // Does the method use localloc.
Expand Down

4 changes: 4 additions & 0 deletions
src/coreclr/jit/emitxarch.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -11266,12 +11266,14 @@ void emitter::emitIns_Call(const EmitCallParams& params)
 id->idAddr()->iiaAddrMode.amScale = params.xmul ? emitEncodeScale(params.xmul) : emitter::OPSZ1;

 code_t code = insCodeMR(ins);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // Tailcall with addressing mode/register needs to be rex.w
 // prefixed to be recognized as part of epilog by unwinder.
 code = AddRexWPrefix(id, code);
 }
#endif

 sz = emitInsSizeAM(id, code);

Expand DownExpand Up@@ -14386,12 +14388,14 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
 if ((ins == INS_call) || (ins == INS_tail_i_jmp))
 {
 code = AddX86PrefixIfNeeded(id, code, size);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // tail call with addressing mode (or through register) needs rex.w
 // prefix to be recognized by unwinder as part of epilog.
 code = AddRexWPrefix(id, code);
 }
#endif

 // Special case: call via a register
 if (id->idIsCallRegPtr())
Expand Down
Loading

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Force GitHub README to respect dark mode\n(function() {\n var style = document.createElement('style');\n style.textContent = '\n .markdown-body {\n color-scheme: dark light;\n }\n .markdown-body pre { background: #161b22 !important; }\n .markdown-body code { background: rgba(110, 118, 129, 0.4) !important; }\n .markdown-body table th, .markdown-body table td { border-color: #30363d !important; }\n .markdown-body img { background: #0d1117; }\n .markdown-body blockquote { border-left-color: #8b949e; }\n .markdown-body hr { border-color: #30363d; }\n ';\n document.head.appendChild(style);\n})();", "GitHub Dark Mode README Fix");
}
} catch(__e) { console.warn('[Userscript:GitHub Dark Mode README Fix]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86#116331

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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86
#116331
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bbc548f

Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86


filipnavara Jun 5, 2025
5deed43

WIP: Enable fast tailcall on x86


filipnavara Jun 6, 2025

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4 changes: 1 addition & 3 deletions
src/coreclr/clrdefinitions.cmake

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Original file line numberDiff line numberDiff line change
Expand Up@@ -64,9 +64,7 @@ if(NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_PORTABLE_SHUFFLE_THUNKS)
endif()

if(CLR_CMAKE_TARGET_UNIX OR NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)
endif()
add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)

add_compile_definitions(FEATURE_CODE_VERSIONING)
add_definitions(-DFEATURE_COLLECTIBLE_TYPES)
Expand Down

12 changes: 4 additions & 8 deletions
src/coreclr/jit/codegen.h

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Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1172,14 +1172,12 @@ class CodeGen final : public CodeGenInterface

#endif

#ifndef TARGET_X86
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum);
#endif // !TARGET_X86

#ifdef TARGET_X86
 bool genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk);
 void genPushReg(var_types type, regNumber srcReg);
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk);
 void genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk);
#endif // TARGET_X86

 void genPutStructArgStk(GenTreePutArgStk* treeNode);
Expand All@@ -1194,9 +1192,8 @@ class CodeGen final : public CodeGenInterface
 void genStructPutArgUnroll(GenTreePutArgStk* putArgStkNode);
#ifdef TARGET_X86
 void genStructPutArgPush(GenTreePutArgStk* putArgStkNode);
#else
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);
#endif
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);

 void genCodeForStoreBlk(GenTreeBlk* storeBlkNode);
 void genCodeForInitBlkLoop(GenTreeBlk* initBlkNode);
Expand DownExpand Up@@ -1294,10 +1291,9 @@ class CodeGen final : public CodeGenInterface

#ifdef TARGET_X86
 bool m_pushStkArg;
#else // !TARGET_X86
 unsigned m_stkArgVarNum;
 unsigned m_stkArgOffset;
#endif // !TARGET_X86
 unsigned m_stkArgVarNum = BAD_VAR_NUM;
 unsigned m_stkArgOffset;

#if defined(DEBUG) && defined(TARGET_XARCH)
 void genStackPointerCheck(bool doStackPointerCheck,
Expand Down

22 changes: 16 additions & 6 deletions
src/coreclr/jit/codegencommon.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -201,9 +201,7 @@ void CodeGenInterface::CopyRegisterInfo()
CodeGen::CodeGen(Compiler* theCompiler)
 : CodeGenInterface(theCompiler)
{
#if !defined(TARGET_X86)
 m_stkArgVarNum = BAD_VAR_NUM;
#endif

#if defined(UNIX_X86_ABI)
 curNestedAlignment = 0;
Expand DownExpand Up@@ -4456,7 +4454,7 @@ void CodeGen::genFinalizeFrame()

#if defined(TARGET_X86)

 if (compiler->compTailCallUsed)
 if (compiler->compTailCallViaJitHelperUsed)
 {
 // If we are generating a helper-based tailcall, we've set the tailcall helper "flags"
 // argument to "1", indicating to the tailcall helper that we've saved the callee-saved
Expand DownExpand Up@@ -5895,10 +5893,22 @@ unsigned CodeGen::getFirstArgWithStackSlot()
 return BAD_VAR_NUM;
#elif defined(TARGET_AMD64)
 return 0;
#else // TARGET_X86
 // Not implemented for x86.
 NYI_X86("getFirstArgWithStackSlot not yet implemented for x86.");
#elif defined(TARGET_X86)
 // On x86 args are passed on the stack in reverse, so the base is the last stack argument.
 for (unsigned i = compiler->info.compArgsCount; i != 0; i--)
 {
 const ABIPassingInformation& abiInfo = compiler->lvaGetParameterABIInfo(i - 1);
 assert(abiInfo.NumSegments == 1);
 if (abiInfo.Segment(0).IsPassedOnStack())
 {
 return i - 1;
 }
 }

 assert(!"Expected to find stack parameter");
 return BAD_VAR_NUM;
#else
#error Not implemented
#endif // TARGET_X86
}

Expand Down

15 changes: 10 additions & 5 deletions
src/coreclr/jit/codegenlinear.cpp

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Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1793,7 +1793,14 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,

#ifdef TARGET_X86
 assert(dstReg != REG_SPBASE);
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 if (m_stkArgVarNum == BAD_VAR_NUM)
 {
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 }
 else
 {
 GetEmitter()->emitIns_R_S(INS_lea, EA_PTRSIZE, dstReg, m_stkArgVarNum, putArgNode->getArgOffset());
 }
#else // !TARGET_X86
 GenTree* dstAddr = putArgNode;
 if (dstAddr->GetRegNum() != dstReg)
Expand DownExpand Up@@ -1834,10 +1841,9 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,
// outArgVarNum - The lclVar num for the argument
//
// Notes:
// The x86 version of this is in codegenxarch.cpp, and doesn't take an
// outArgVarNum, as it pushes its args onto the stack.
// The primary x86 version of this is genPutArgStkPushFieldList in
// codegenxarch.cpp. This version is only used for fast tailcalls on x86.
//
#ifndef TARGET_X86
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum)
{
 assert(putArgStk->gtOp1->OperIs(GT_FIELD_LIST));
Expand DownExpand Up@@ -1884,7 +1890,6 @@ void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArg
#endif
 }
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// genSetBlockSize: Ensure that the block size is in the given register
Expand Down

78 changes: 59 additions & 19 deletions
src/coreclr/jit/codegenxarch.cpp

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Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -4126,7 +4126,6 @@ void CodeGen::genStructPutArgPush(GenTreePutArgStk* putArgNode)
}
#endif // TARGET_X86

#ifndef TARGET_X86
//------------------------------------------------------------------------
// genStructPutArgPartialRepMovs: Generates code for passing a struct arg by value on stack using
// a mix of pointer-sized stores, "movsq" and "rep movsd".
Expand DownExpand Up@@ -4217,7 +4216,6 @@ void CodeGen::genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgNode)

 assert(numGCSlotsCopied == layout->GetGCPtrCount());
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// If any Vector3 args are on stack and they are not pass-by-ref, the upper 32bits
Expand DownExpand Up@@ -8107,15 +8105,15 @@ bool CodeGen::genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk)
}

//---------------------------------------------------------------------
// genPutArgStkFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
// genPutArgStkPushFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
//
// Arguments
// treeNode - the GT_PUTARG_STK node whose op1 is a GT_FIELD_LIST
//
// Return value:
// None
//
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk)
void CodeGen::genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk)
{
 GenTreeFieldList* const fieldList = putArgStk->gtOp1->AsFieldList();
 assert(fieldList != nullptr);
Expand DownExpand Up@@ -8332,28 +8330,63 @@ void CodeGen::genPutArgStk(GenTreePutArgStk* putArgStk)

 if (data->OperIs(GT_FIELD_LIST))
 {
 genPutArgStkFieldList(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 genPutArgStkFieldList(putArgStk, getBaseVarForPutArgStk(putArgStk));
 }
 else
 {
 genPutArgStkPushFieldList(putArgStk);
 }
 return;
 }

 if (varTypeIsStruct(targetType))
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 m_pushStkArg = false;
 m_stkArgVarNum = getBaseVarForPutArgStk(putArgStk);
 m_stkArgOffset = putArgStk->getArgOffset();
 genPutStructArgStk(putArgStk);
 m_stkArgVarNum = BAD_VAR_NUM;
 }
 else
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 }
 return;
 }

 genConsumeRegs(data);

 if (data->isUsedFromReg())
 if (putArgStk->putInIncomingArgArea())
 {
 genPushReg(targetType, data->GetRegNum());
 unsigned baseVarNum = getBaseVarForPutArgStk(putArgStk);
 if (data->isContainedIntOrIImmed())
 {
 GetEmitter()->emitIns_S_I(ins_Store(targetType), emitTypeSize(targetType), baseVarNum,
 putArgStk->getArgOffset(), (int)data->AsIntConCommon()->IconValue());
 }
 else
 {
 GetEmitter()->emitIns_S_R(ins_Store(targetType), emitTypeSize(targetType), data->GetRegNum(), baseVarNum,
 putArgStk->getArgOffset());
 }
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 if (data->isUsedFromReg())
 {
 genPushReg(targetType, data->GetRegNum());
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 }
 }
#else // !TARGET_X86
 {
Expand DownExpand Up@@ -8543,7 +8576,14 @@ void CodeGen::genStoreRegToStackArg(var_types type, regNumber srcReg, int offset
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 if (m_stkArgVarNum != BAD_VAR_NUM)
 {
 GetEmitter()->emitIns_S_R(ins, attr, srcReg, m_stkArgVarNum, m_stkArgOffset + offset);
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 }
 }
#else // !TARGET_X86
 assert(m_stkArgVarNum != BAD_VAR_NUM);
Expand DownExpand Up@@ -8571,7 +8611,7 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 var_types targetType = source->TypeGet();

#if defined(TARGET_X86) && defined(FEATURE_SIMD)
 if (putArgStk->isSIMD12())
 if (putArgStk->isSIMD12() && !putArgStk->putInIncomingArgArea())
 {
 genPutArgStkSimd12(putArgStk);
 return;
Expand All@@ -8593,11 +8633,10 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 case GenTreePutArgStk::Kind::RepInstr:
 genStructPutArgRepMovs(putArgStk);
 break;
#ifndef TARGET_X86

 case GenTreePutArgStk::Kind::PartialRepInstr:
 genStructPutArgPartialRepMovs(putArgStk);
 break;
#endif // !TARGET_X86

 case GenTreePutArgStk::Kind::Unroll:
 genStructPutArgUnroll(putArgStk);
Expand DownExpand Up@@ -10567,7 +10606,8 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 // Add 'compiler->compLclFrameSize' to ESP. Use "pop ECX" for that, except in cases
 // where ECX may contain some state.

 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync())
 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync() &&
 !compiler->compFastTailCallUsed)
 {
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
 regSet.verifyRegUsed(REG_ECX);
Expand DownExpand Up@@ -10655,7 +10695,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 }
#ifdef TARGET_X86
 else if ((compiler->compLclFrameSize == REGSIZE_BYTES) && !compiler->compJmpOpUsed &&
 !compiler->compIsAsync())
 !compiler->compIsAsync() && !compiler->compFastTailCallUsed)
 {
 // "pop ecx" will make ESP point to the callee-saved registers
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
Expand DownExpand Up@@ -10809,7 +10849,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
#if FEATURE_FASTTAILCALL
 else
 {
 genCallInstruction(jmpNode->AsCall());
 genCallInstruction(jmpNode->AsCall() X86_ARG(0));
 }
#endif // FEATURE_FASTTAILCALL
 }
Expand Down

14 changes: 9 additions & 5 deletions
src/coreclr/jit/compiler.h

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -9877,11 +9877,15 @@ class Compiler

 InlineResult* compInlineResult; // The result of importing the inlinee method.

 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
#ifdef TARGET_X86
 bool compTailCallViaJitHelperUsed = false;
 bool compFastTailCallUsed = false;
#endif
 bool compTailPrefixSeen = false; // Does the method IL have tail. prefix
 bool compLocallocSeen = false; // Does the method IL have localloc opcode
 bool compLocallocUsed = false; // Does the method use localloc.
Expand Down

4 changes: 4 additions & 0 deletions
src/coreclr/jit/emitxarch.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -11266,12 +11266,14 @@ void emitter::emitIns_Call(const EmitCallParams& params)
 id->idAddr()->iiaAddrMode.amScale = params.xmul ? emitEncodeScale(params.xmul) : emitter::OPSZ1;

 code_t code = insCodeMR(ins);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // Tailcall with addressing mode/register needs to be rex.w
 // prefixed to be recognized as part of epilog by unwinder.
 code = AddRexWPrefix(id, code);
 }
#endif

 sz = emitInsSizeAM(id, code);

Expand DownExpand Up@@ -14386,12 +14388,14 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
 if ((ins == INS_call) || (ins == INS_tail_i_jmp))
 {
 code = AddX86PrefixIfNeeded(id, code, size);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // tail call with addressing mode (or through register) needs rex.w
 // prefix to be recognized by unwinder as part of epilog.
 code = AddRexWPrefix(id, code);
 }
#endif

 // Special case: call via a register
 if (id->idIsCallRegPtr())
Expand Down
Loading

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Highlight search terms from Google/DuckDuckGo/Bing referrer\n(function() {\n var ref = document.referrer;\n var terms = [];\n \n if (ref.includes('google.com') || ref.includes('duckduckgo.com') || ref.includes('bing.com')) {\n var url = new URL(ref);\n var q = url.searchParams.get('q') || url.searchParams.get('p');\n if (q) {\n terms = q.split(/\\s+/).filter(function(t) { return t.length > 2; });\n }\n }\n \n if (terms.length === 0) return;\n \n var style = document.createElement('style');\n style.textContent = '.userscript-highlight { background: #fbbf24; color: #1a1a2e; padding: 1px 3px; border-radius: 2px; }';\n document.head.appendChild(style);\n \n function highlight(node) {\n if (node.nodeType === 3) { // text node\n var text = node.textContent;\n var found = false;\n terms.forEach(function(term) {\n var regex = new RegExp('(' + term.replace(/[.*+?^${}()|[\\]\\\\]/g, '\\\\') + ')', 'gi');\n if (regex.test(text)) {\n found = true;\n var frag = document.createDocumentFragment();\n var parts = text.split(regex);\n parts.forEach(function(part, i) {\n if (i % 2 === 0) {\n frag.appendChild(document.createTextNode(part));\n } else {\n var span = document.createElement('span');\n span.className = 'userscript-highlight';\n span.textContent = part;\n frag.appendChild(span);\n }\n });\n node.parentNode.replaceChild(frag, node);\n }\n });\n } else if (node.nodeType === 1 && node.childNodes) { // element\n var skipTags = ['SCRIPT', 'STYLE', 'NOSCRIPT', 'TEXTAREA', 'INPUT', 'SELECT'];\n if (!skipTags.includes(node.tagName)) {\n Array.from(node.childNodes).forEach(highlight);\n }\n }\n }\n \n highlight(document.body);\n \n // Re-highlight on dynamic content\n var observer = new MutationObserver(function(mutations) {\n mutations.forEach(function(m) {\n m.addedNodes.forEach(function(node) {\n if (node.nodeType === 1 || node.nodeType === 3) highlight(node);\n });\n });\n });\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Highlight Search Terms");
}
} catch(__e) { console.warn('[Userscript:Highlight Search Terms]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86#116331

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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86
#116331
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bbc548f

Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86


filipnavara Jun 5, 2025
5deed43

WIP: Enable fast tailcall on x86


filipnavara Jun 6, 2025

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4 changes: 1 addition & 3 deletions
src/coreclr/clrdefinitions.cmake

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -64,9 +64,7 @@ if(NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_PORTABLE_SHUFFLE_THUNKS)
endif()

if(CLR_CMAKE_TARGET_UNIX OR NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)
endif()
add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)

add_compile_definitions(FEATURE_CODE_VERSIONING)
add_definitions(-DFEATURE_COLLECTIBLE_TYPES)
Expand Down

12 changes: 4 additions & 8 deletions
src/coreclr/jit/codegen.h

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1172,14 +1172,12 @@ class CodeGen final : public CodeGenInterface

#endif

#ifndef TARGET_X86
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum);
#endif // !TARGET_X86

#ifdef TARGET_X86
 bool genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk);
 void genPushReg(var_types type, regNumber srcReg);
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk);
 void genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk);
#endif // TARGET_X86

 void genPutStructArgStk(GenTreePutArgStk* treeNode);
Expand All@@ -1194,9 +1192,8 @@ class CodeGen final : public CodeGenInterface
 void genStructPutArgUnroll(GenTreePutArgStk* putArgStkNode);
#ifdef TARGET_X86
 void genStructPutArgPush(GenTreePutArgStk* putArgStkNode);
#else
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);
#endif
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);

 void genCodeForStoreBlk(GenTreeBlk* storeBlkNode);
 void genCodeForInitBlkLoop(GenTreeBlk* initBlkNode);
Expand DownExpand Up@@ -1294,10 +1291,9 @@ class CodeGen final : public CodeGenInterface

#ifdef TARGET_X86
 bool m_pushStkArg;
#else // !TARGET_X86
 unsigned m_stkArgVarNum;
 unsigned m_stkArgOffset;
#endif // !TARGET_X86
 unsigned m_stkArgVarNum = BAD_VAR_NUM;
 unsigned m_stkArgOffset;

#if defined(DEBUG) && defined(TARGET_XARCH)
 void genStackPointerCheck(bool doStackPointerCheck,
Expand Down

22 changes: 16 additions & 6 deletions
src/coreclr/jit/codegencommon.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -201,9 +201,7 @@ void CodeGenInterface::CopyRegisterInfo()
CodeGen::CodeGen(Compiler* theCompiler)
 : CodeGenInterface(theCompiler)
{
#if !defined(TARGET_X86)
 m_stkArgVarNum = BAD_VAR_NUM;
#endif

#if defined(UNIX_X86_ABI)
 curNestedAlignment = 0;
Expand DownExpand Up@@ -4456,7 +4454,7 @@ void CodeGen::genFinalizeFrame()

#if defined(TARGET_X86)

 if (compiler->compTailCallUsed)
 if (compiler->compTailCallViaJitHelperUsed)
 {
 // If we are generating a helper-based tailcall, we've set the tailcall helper "flags"
 // argument to "1", indicating to the tailcall helper that we've saved the callee-saved
Expand DownExpand Up@@ -5895,10 +5893,22 @@ unsigned CodeGen::getFirstArgWithStackSlot()
 return BAD_VAR_NUM;
#elif defined(TARGET_AMD64)
 return 0;
#else // TARGET_X86
 // Not implemented for x86.
 NYI_X86("getFirstArgWithStackSlot not yet implemented for x86.");
#elif defined(TARGET_X86)
 // On x86 args are passed on the stack in reverse, so the base is the last stack argument.
 for (unsigned i = compiler->info.compArgsCount; i != 0; i--)
 {
 const ABIPassingInformation& abiInfo = compiler->lvaGetParameterABIInfo(i - 1);
 assert(abiInfo.NumSegments == 1);
 if (abiInfo.Segment(0).IsPassedOnStack())
 {
 return i - 1;
 }
 }

 assert(!"Expected to find stack parameter");
 return BAD_VAR_NUM;
#else
#error Not implemented
#endif // TARGET_X86
}

Expand Down

15 changes: 10 additions & 5 deletions
src/coreclr/jit/codegenlinear.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1793,7 +1793,14 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,

#ifdef TARGET_X86
 assert(dstReg != REG_SPBASE);
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 if (m_stkArgVarNum == BAD_VAR_NUM)
 {
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 }
 else
 {
 GetEmitter()->emitIns_R_S(INS_lea, EA_PTRSIZE, dstReg, m_stkArgVarNum, putArgNode->getArgOffset());
 }
#else // !TARGET_X86
 GenTree* dstAddr = putArgNode;
 if (dstAddr->GetRegNum() != dstReg)
Expand DownExpand Up@@ -1834,10 +1841,9 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,
// outArgVarNum - The lclVar num for the argument
//
// Notes:
// The x86 version of this is in codegenxarch.cpp, and doesn't take an
// outArgVarNum, as it pushes its args onto the stack.
// The primary x86 version of this is genPutArgStkPushFieldList in
// codegenxarch.cpp. This version is only used for fast tailcalls on x86.
//
#ifndef TARGET_X86
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum)
{
 assert(putArgStk->gtOp1->OperIs(GT_FIELD_LIST));
Expand DownExpand Up@@ -1884,7 +1890,6 @@ void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArg
#endif
 }
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// genSetBlockSize: Ensure that the block size is in the given register
Expand Down

78 changes: 59 additions & 19 deletions
src/coreclr/jit/codegenxarch.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -4126,7 +4126,6 @@ void CodeGen::genStructPutArgPush(GenTreePutArgStk* putArgNode)
}
#endif // TARGET_X86

#ifndef TARGET_X86
//------------------------------------------------------------------------
// genStructPutArgPartialRepMovs: Generates code for passing a struct arg by value on stack using
// a mix of pointer-sized stores, "movsq" and "rep movsd".
Expand DownExpand Up@@ -4217,7 +4216,6 @@ void CodeGen::genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgNode)

 assert(numGCSlotsCopied == layout->GetGCPtrCount());
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// If any Vector3 args are on stack and they are not pass-by-ref, the upper 32bits
Expand DownExpand Up@@ -8107,15 +8105,15 @@ bool CodeGen::genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk)
}

//---------------------------------------------------------------------
// genPutArgStkFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
// genPutArgStkPushFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
//
// Arguments
// treeNode - the GT_PUTARG_STK node whose op1 is a GT_FIELD_LIST
//
// Return value:
// None
//
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk)
void CodeGen::genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk)
{
 GenTreeFieldList* const fieldList = putArgStk->gtOp1->AsFieldList();
 assert(fieldList != nullptr);
Expand DownExpand Up@@ -8332,28 +8330,63 @@ void CodeGen::genPutArgStk(GenTreePutArgStk* putArgStk)

 if (data->OperIs(GT_FIELD_LIST))
 {
 genPutArgStkFieldList(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 genPutArgStkFieldList(putArgStk, getBaseVarForPutArgStk(putArgStk));
 }
 else
 {
 genPutArgStkPushFieldList(putArgStk);
 }
 return;
 }

 if (varTypeIsStruct(targetType))
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 m_pushStkArg = false;
 m_stkArgVarNum = getBaseVarForPutArgStk(putArgStk);
 m_stkArgOffset = putArgStk->getArgOffset();
 genPutStructArgStk(putArgStk);
 m_stkArgVarNum = BAD_VAR_NUM;
 }
 else
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 }
 return;
 }

 genConsumeRegs(data);

 if (data->isUsedFromReg())
 if (putArgStk->putInIncomingArgArea())
 {
 genPushReg(targetType, data->GetRegNum());
 unsigned baseVarNum = getBaseVarForPutArgStk(putArgStk);
 if (data->isContainedIntOrIImmed())
 {
 GetEmitter()->emitIns_S_I(ins_Store(targetType), emitTypeSize(targetType), baseVarNum,
 putArgStk->getArgOffset(), (int)data->AsIntConCommon()->IconValue());
 }
 else
 {
 GetEmitter()->emitIns_S_R(ins_Store(targetType), emitTypeSize(targetType), data->GetRegNum(), baseVarNum,
 putArgStk->getArgOffset());
 }
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 if (data->isUsedFromReg())
 {
 genPushReg(targetType, data->GetRegNum());
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 }
 }
#else // !TARGET_X86
 {
Expand DownExpand Up@@ -8543,7 +8576,14 @@ void CodeGen::genStoreRegToStackArg(var_types type, regNumber srcReg, int offset
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 if (m_stkArgVarNum != BAD_VAR_NUM)
 {
 GetEmitter()->emitIns_S_R(ins, attr, srcReg, m_stkArgVarNum, m_stkArgOffset + offset);
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 }
 }
#else // !TARGET_X86
 assert(m_stkArgVarNum != BAD_VAR_NUM);
Expand DownExpand Up@@ -8571,7 +8611,7 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 var_types targetType = source->TypeGet();

#if defined(TARGET_X86) && defined(FEATURE_SIMD)
 if (putArgStk->isSIMD12())
 if (putArgStk->isSIMD12() && !putArgStk->putInIncomingArgArea())
 {
 genPutArgStkSimd12(putArgStk);
 return;
Expand All@@ -8593,11 +8633,10 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 case GenTreePutArgStk::Kind::RepInstr:
 genStructPutArgRepMovs(putArgStk);
 break;
#ifndef TARGET_X86

 case GenTreePutArgStk::Kind::PartialRepInstr:
 genStructPutArgPartialRepMovs(putArgStk);
 break;
#endif // !TARGET_X86

 case GenTreePutArgStk::Kind::Unroll:
 genStructPutArgUnroll(putArgStk);
Expand DownExpand Up@@ -10567,7 +10606,8 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 // Add 'compiler->compLclFrameSize' to ESP. Use "pop ECX" for that, except in cases
 // where ECX may contain some state.

 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync())
 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync() &&
 !compiler->compFastTailCallUsed)
 {
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
 regSet.verifyRegUsed(REG_ECX);
Expand DownExpand Up@@ -10655,7 +10695,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 }
#ifdef TARGET_X86
 else if ((compiler->compLclFrameSize == REGSIZE_BYTES) && !compiler->compJmpOpUsed &&
 !compiler->compIsAsync())
 !compiler->compIsAsync() && !compiler->compFastTailCallUsed)
 {
 // "pop ecx" will make ESP point to the callee-saved registers
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
Expand DownExpand Up@@ -10809,7 +10849,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
#if FEATURE_FASTTAILCALL
 else
 {
 genCallInstruction(jmpNode->AsCall());
 genCallInstruction(jmpNode->AsCall() X86_ARG(0));
 }
#endif // FEATURE_FASTTAILCALL
 }
Expand Down

14 changes: 9 additions & 5 deletions
src/coreclr/jit/compiler.h

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -9877,11 +9877,15 @@ class Compiler

 InlineResult* compInlineResult; // The result of importing the inlinee method.

 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
#ifdef TARGET_X86
 bool compTailCallViaJitHelperUsed = false;
 bool compFastTailCallUsed = false;
#endif
 bool compTailPrefixSeen = false; // Does the method IL have tail. prefix
 bool compLocallocSeen = false; // Does the method IL have localloc opcode
 bool compLocallocUsed = false; // Does the method use localloc.
Expand Down

4 changes: 4 additions & 0 deletions
src/coreclr/jit/emitxarch.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -11266,12 +11266,14 @@ void emitter::emitIns_Call(const EmitCallParams& params)
 id->idAddr()->iiaAddrMode.amScale = params.xmul ? emitEncodeScale(params.xmul) : emitter::OPSZ1;

 code_t code = insCodeMR(ins);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // Tailcall with addressing mode/register needs to be rex.w
 // prefixed to be recognized as part of epilog by unwinder.
 code = AddRexWPrefix(id, code);
 }
#endif

 sz = emitInsSizeAM(id, code);

Expand DownExpand Up@@ -14386,12 +14388,14 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
 if ((ins == INS_call) || (ins == INS_tail_i_jmp))
 {
 code = AddX86PrefixIfNeeded(id, code, size);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // tail call with addressing mode (or through register) needs rex.w
 // prefix to be recognized by unwinder as part of epilog.
 code = AddRexWPrefix(id, code);
 }
#endif

 // Special case: call via a register
 if (id->idIsCallRegPtr())
Expand Down
Loading

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Strip utm_, fbclid, gclid, etc. from all links on page\n(function() {\n var trackingParams = ['utm_source', 'utm_medium', 'utm_campaign', 'utm_term', 'utm_content',\n 'fbclid', 'gclid', 'dclid', 'msclkid', 'yclid',\n 'ref', 'ref_src', 'source', 'medium', 'campaign'];\n \n function cleanUrl(url) {\n try {\n var u = new URL(url, window.location.origin);\n var changed = false;\n trackingParams.forEach(function(p) {\n if (u.searchParams.has(p)) {\n u.searchParams.delete(p);\n changed = true;\n }\n });\n return changed ? u.toString() : url;\n } catch (e) {\n return url;\n }\n }\n \n function cleanLinks() {\n document.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n \n cleanLinks();\n \n var observer = new MutationObserver(function(mutations) {\n mutations.forEach(function(m) {\n m.addedNodes.forEach(function(node) {\n if (node.nodeType === 1) {\n if (node.tagName === 'A') cleanLinks();\n node.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n });\n });\n });\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Remove Tracking Parameters from Links");
}
} catch(__e) { console.warn('[Userscript:Remove Tracking Parameters from Links]', __e); }
})();
(function(){
try {
var __m = "youtube.com";
var __re = new RegExp('^' + "youtube\\.com" + '

Skip to content
[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86#116331

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 Closed

filipnavara
wants to merge
2
commits into

from

 Closed


[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86
#116331
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bbc548f

Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86


filipnavara Jun 5, 2025
5deed43

WIP: Enable fast tailcall on x86


filipnavara Jun 6, 2025

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4 changes: 1 addition & 3 deletions
src/coreclr/clrdefinitions.cmake

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -64,9 +64,7 @@ if(NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_PORTABLE_SHUFFLE_THUNKS)
endif()

if(CLR_CMAKE_TARGET_UNIX OR NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)
endif()
add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)

add_compile_definitions(FEATURE_CODE_VERSIONING)
add_definitions(-DFEATURE_COLLECTIBLE_TYPES)
Expand Down

12 changes: 4 additions & 8 deletions
src/coreclr/jit/codegen.h

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1172,14 +1172,12 @@ class CodeGen final : public CodeGenInterface

#endif

#ifndef TARGET_X86
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum);
#endif // !TARGET_X86

#ifdef TARGET_X86
 bool genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk);
 void genPushReg(var_types type, regNumber srcReg);
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk);
 void genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk);
#endif // TARGET_X86

 void genPutStructArgStk(GenTreePutArgStk* treeNode);
Expand All@@ -1194,9 +1192,8 @@ class CodeGen final : public CodeGenInterface
 void genStructPutArgUnroll(GenTreePutArgStk* putArgStkNode);
#ifdef TARGET_X86
 void genStructPutArgPush(GenTreePutArgStk* putArgStkNode);
#else
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);
#endif
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);

 void genCodeForStoreBlk(GenTreeBlk* storeBlkNode);
 void genCodeForInitBlkLoop(GenTreeBlk* initBlkNode);
Expand DownExpand Up@@ -1294,10 +1291,9 @@ class CodeGen final : public CodeGenInterface

#ifdef TARGET_X86
 bool m_pushStkArg;
#else // !TARGET_X86
 unsigned m_stkArgVarNum;
 unsigned m_stkArgOffset;
#endif // !TARGET_X86
 unsigned m_stkArgVarNum = BAD_VAR_NUM;
 unsigned m_stkArgOffset;

#if defined(DEBUG) && defined(TARGET_XARCH)
 void genStackPointerCheck(bool doStackPointerCheck,
Expand Down

22 changes: 16 additions & 6 deletions
src/coreclr/jit/codegencommon.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -201,9 +201,7 @@ void CodeGenInterface::CopyRegisterInfo()
CodeGen::CodeGen(Compiler* theCompiler)
 : CodeGenInterface(theCompiler)
{
#if !defined(TARGET_X86)
 m_stkArgVarNum = BAD_VAR_NUM;
#endif

#if defined(UNIX_X86_ABI)
 curNestedAlignment = 0;
Expand DownExpand Up@@ -4456,7 +4454,7 @@ void CodeGen::genFinalizeFrame()

#if defined(TARGET_X86)

 if (compiler->compTailCallUsed)
 if (compiler->compTailCallViaJitHelperUsed)
 {
 // If we are generating a helper-based tailcall, we've set the tailcall helper "flags"
 // argument to "1", indicating to the tailcall helper that we've saved the callee-saved
Expand DownExpand Up@@ -5895,10 +5893,22 @@ unsigned CodeGen::getFirstArgWithStackSlot()
 return BAD_VAR_NUM;
#elif defined(TARGET_AMD64)
 return 0;
#else // TARGET_X86
 // Not implemented for x86.
 NYI_X86("getFirstArgWithStackSlot not yet implemented for x86.");
#elif defined(TARGET_X86)
 // On x86 args are passed on the stack in reverse, so the base is the last stack argument.
 for (unsigned i = compiler->info.compArgsCount; i != 0; i--)
 {
 const ABIPassingInformation& abiInfo = compiler->lvaGetParameterABIInfo(i - 1);
 assert(abiInfo.NumSegments == 1);
 if (abiInfo.Segment(0).IsPassedOnStack())
 {
 return i - 1;
 }
 }

 assert(!"Expected to find stack parameter");
 return BAD_VAR_NUM;
#else
#error Not implemented
#endif // TARGET_X86
}

Expand Down

15 changes: 10 additions & 5 deletions
src/coreclr/jit/codegenlinear.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -1793,7 +1793,14 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,

#ifdef TARGET_X86
 assert(dstReg != REG_SPBASE);
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 if (m_stkArgVarNum == BAD_VAR_NUM)
 {
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 }
 else
 {
 GetEmitter()->emitIns_R_S(INS_lea, EA_PTRSIZE, dstReg, m_stkArgVarNum, putArgNode->getArgOffset());
 }
#else // !TARGET_X86
 GenTree* dstAddr = putArgNode;
 if (dstAddr->GetRegNum() != dstReg)
Expand DownExpand Up@@ -1834,10 +1841,9 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,
// outArgVarNum - The lclVar num for the argument
//
// Notes:
// The x86 version of this is in codegenxarch.cpp, and doesn't take an
// outArgVarNum, as it pushes its args onto the stack.
// The primary x86 version of this is genPutArgStkPushFieldList in
// codegenxarch.cpp. This version is only used for fast tailcalls on x86.
//
#ifndef TARGET_X86
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum)
{
 assert(putArgStk->gtOp1->OperIs(GT_FIELD_LIST));
Expand DownExpand Up@@ -1884,7 +1890,6 @@ void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArg
#endif
 }
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// genSetBlockSize: Ensure that the block size is in the given register
Expand Down

78 changes: 59 additions & 19 deletions
src/coreclr/jit/codegenxarch.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -4126,7 +4126,6 @@ void CodeGen::genStructPutArgPush(GenTreePutArgStk* putArgNode)
}
#endif // TARGET_X86

#ifndef TARGET_X86
//------------------------------------------------------------------------
// genStructPutArgPartialRepMovs: Generates code for passing a struct arg by value on stack using
// a mix of pointer-sized stores, "movsq" and "rep movsd".
Expand DownExpand Up@@ -4217,7 +4216,6 @@ void CodeGen::genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgNode)

 assert(numGCSlotsCopied == layout->GetGCPtrCount());
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// If any Vector3 args are on stack and they are not pass-by-ref, the upper 32bits
Expand DownExpand Up@@ -8107,15 +8105,15 @@ bool CodeGen::genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk)
}

//---------------------------------------------------------------------
// genPutArgStkFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
// genPutArgStkPushFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
//
// Arguments
// treeNode - the GT_PUTARG_STK node whose op1 is a GT_FIELD_LIST
//
// Return value:
// None
//
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk)
void CodeGen::genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk)
{
 GenTreeFieldList* const fieldList = putArgStk->gtOp1->AsFieldList();
 assert(fieldList != nullptr);
Expand DownExpand Up@@ -8332,28 +8330,63 @@ void CodeGen::genPutArgStk(GenTreePutArgStk* putArgStk)

 if (data->OperIs(GT_FIELD_LIST))
 {
 genPutArgStkFieldList(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 genPutArgStkFieldList(putArgStk, getBaseVarForPutArgStk(putArgStk));
 }
 else
 {
 genPutArgStkPushFieldList(putArgStk);
 }
 return;
 }

 if (varTypeIsStruct(targetType))
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 m_pushStkArg = false;
 m_stkArgVarNum = getBaseVarForPutArgStk(putArgStk);
 m_stkArgOffset = putArgStk->getArgOffset();
 genPutStructArgStk(putArgStk);
 m_stkArgVarNum = BAD_VAR_NUM;
 }
 else
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 }
 return;
 }

 genConsumeRegs(data);

 if (data->isUsedFromReg())
 if (putArgStk->putInIncomingArgArea())
 {
 genPushReg(targetType, data->GetRegNum());
 unsigned baseVarNum = getBaseVarForPutArgStk(putArgStk);
 if (data->isContainedIntOrIImmed())
 {
 GetEmitter()->emitIns_S_I(ins_Store(targetType), emitTypeSize(targetType), baseVarNum,
 putArgStk->getArgOffset(), (int)data->AsIntConCommon()->IconValue());
 }
 else
 {
 GetEmitter()->emitIns_S_R(ins_Store(targetType), emitTypeSize(targetType), data->GetRegNum(), baseVarNum,
 putArgStk->getArgOffset());
 }
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 if (data->isUsedFromReg())
 {
 genPushReg(targetType, data->GetRegNum());
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 }
 }
#else // !TARGET_X86
 {
Expand DownExpand Up@@ -8543,7 +8576,14 @@ void CodeGen::genStoreRegToStackArg(var_types type, regNumber srcReg, int offset
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 if (m_stkArgVarNum != BAD_VAR_NUM)
 {
 GetEmitter()->emitIns_S_R(ins, attr, srcReg, m_stkArgVarNum, m_stkArgOffset + offset);
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 }
 }
#else // !TARGET_X86
 assert(m_stkArgVarNum != BAD_VAR_NUM);
Expand DownExpand Up@@ -8571,7 +8611,7 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 var_types targetType = source->TypeGet();

#if defined(TARGET_X86) && defined(FEATURE_SIMD)
 if (putArgStk->isSIMD12())
 if (putArgStk->isSIMD12() && !putArgStk->putInIncomingArgArea())
 {
 genPutArgStkSimd12(putArgStk);
 return;
Expand All@@ -8593,11 +8633,10 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 case GenTreePutArgStk::Kind::RepInstr:
 genStructPutArgRepMovs(putArgStk);
 break;
#ifndef TARGET_X86

 case GenTreePutArgStk::Kind::PartialRepInstr:
 genStructPutArgPartialRepMovs(putArgStk);
 break;
#endif // !TARGET_X86

 case GenTreePutArgStk::Kind::Unroll:
 genStructPutArgUnroll(putArgStk);
Expand DownExpand Up@@ -10567,7 +10606,8 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 // Add 'compiler->compLclFrameSize' to ESP. Use "pop ECX" for that, except in cases
 // where ECX may contain some state.

 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync())
 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync() &&
 !compiler->compFastTailCallUsed)
 {
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
 regSet.verifyRegUsed(REG_ECX);
Expand DownExpand Up@@ -10655,7 +10695,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 }
#ifdef TARGET_X86
 else if ((compiler->compLclFrameSize == REGSIZE_BYTES) && !compiler->compJmpOpUsed &&
 !compiler->compIsAsync())
 !compiler->compIsAsync() && !compiler->compFastTailCallUsed)
 {
 // "pop ecx" will make ESP point to the callee-saved registers
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
Expand DownExpand Up@@ -10809,7 +10849,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
#if FEATURE_FASTTAILCALL
 else
 {
 genCallInstruction(jmpNode->AsCall());
 genCallInstruction(jmpNode->AsCall() X86_ARG(0));
 }
#endif // FEATURE_FASTTAILCALL
 }
Expand Down

14 changes: 9 additions & 5 deletions
src/coreclr/jit/compiler.h

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Original file line numberDiff line numberDiff line change
Expand Up@@ -9877,11 +9877,15 @@ class Compiler

 InlineResult* compInlineResult; // The result of importing the inlinee method.

 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
#ifdef TARGET_X86
 bool compTailCallViaJitHelperUsed = false;
 bool compFastTailCallUsed = false;
#endif
 bool compTailPrefixSeen = false; // Does the method IL have tail. prefix
 bool compLocallocSeen = false; // Does the method IL have localloc opcode
 bool compLocallocUsed = false; // Does the method use localloc.
Expand Down

4 changes: 4 additions & 0 deletions
src/coreclr/jit/emitxarch.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -11266,12 +11266,14 @@ void emitter::emitIns_Call(const EmitCallParams& params)
 id->idAddr()->iiaAddrMode.amScale = params.xmul ? emitEncodeScale(params.xmul) : emitter::OPSZ1;

 code_t code = insCodeMR(ins);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // Tailcall with addressing mode/register needs to be rex.w
 // prefixed to be recognized as part of epilog by unwinder.
 code = AddRexWPrefix(id, code);
 }
#endif

 sz = emitInsSizeAM(id, code);

Expand DownExpand Up@@ -14386,12 +14388,14 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
 if ((ins == INS_call) || (ins == INS_tail_i_jmp))
 {
 code = AddX86PrefixIfNeeded(id, code, size);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // tail call with addressing mode (or through register) needs rex.w
 // prefix to be recognized by unwinder as part of epilog.
 code = AddRexWPrefix(id, code);
 }
#endif

 // Special case: call via a register
 if (id->idIsCallRegPtr())
Expand Down
Loading

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Auto-enable theater mode on YouTube\n(function() {\n function tryTheater() {\n var btn = document.querySelector('button[aria-label=\"Theater mode\"], ytd-player #player button[title=\"Theater mode\"]');\n if (btn && !btn.classList.contains('activated')) {\n btn.click();\n }\n }\n \n // Try immediately\n tryTheater();\n \n // Try after navigation (SPA)\n var lastUrl = location.href;\n setInterval(function() {\n if (location.href !== lastUrl) {\n lastUrl = location.href;\n setTimeout(tryTheater, 500);\n }\n }, 1000);\n \n // Also try on player load\n var observer = new MutationObserver(tryTheater);\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "YouTube Theater Mode Default");
}
} catch(__e) { console.warn('[Userscript:YouTube Theater Mode Default]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86#116331

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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86
#116331
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bbc548f

Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86


filipnavara Jun 5, 2025
5deed43

WIP: Enable fast tailcall on x86


filipnavara Jun 6, 2025

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4 changes: 1 addition & 3 deletions
src/coreclr/clrdefinitions.cmake

View file


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Original file line numberDiff line numberDiff line change
Expand Up@@ -64,9 +64,7 @@ if(NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_PORTABLE_SHUFFLE_THUNKS)
endif()

if(CLR_CMAKE_TARGET_UNIX OR NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)
endif()
add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)

add_compile_definitions(FEATURE_CODE_VERSIONING)
add_definitions(-DFEATURE_COLLECTIBLE_TYPES)
Expand Down

12 changes: 4 additions & 8 deletions
src/coreclr/jit/codegen.h

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1172,14 +1172,12 @@ class CodeGen final : public CodeGenInterface

#endif

#ifndef TARGET_X86
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum);
#endif // !TARGET_X86

#ifdef TARGET_X86
 bool genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk);
 void genPushReg(var_types type, regNumber srcReg);
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk);
 void genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk);
#endif // TARGET_X86

 void genPutStructArgStk(GenTreePutArgStk* treeNode);
Expand All@@ -1194,9 +1192,8 @@ class CodeGen final : public CodeGenInterface
 void genStructPutArgUnroll(GenTreePutArgStk* putArgStkNode);
#ifdef TARGET_X86
 void genStructPutArgPush(GenTreePutArgStk* putArgStkNode);
#else
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);
#endif
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);

 void genCodeForStoreBlk(GenTreeBlk* storeBlkNode);
 void genCodeForInitBlkLoop(GenTreeBlk* initBlkNode);
Expand DownExpand Up@@ -1294,10 +1291,9 @@ class CodeGen final : public CodeGenInterface

#ifdef TARGET_X86
 bool m_pushStkArg;
#else // !TARGET_X86
 unsigned m_stkArgVarNum;
 unsigned m_stkArgOffset;
#endif // !TARGET_X86
 unsigned m_stkArgVarNum = BAD_VAR_NUM;
 unsigned m_stkArgOffset;

#if defined(DEBUG) && defined(TARGET_XARCH)
 void genStackPointerCheck(bool doStackPointerCheck,
Expand Down

22 changes: 16 additions & 6 deletions
src/coreclr/jit/codegencommon.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -201,9 +201,7 @@ void CodeGenInterface::CopyRegisterInfo()
CodeGen::CodeGen(Compiler* theCompiler)
 : CodeGenInterface(theCompiler)
{
#if !defined(TARGET_X86)
 m_stkArgVarNum = BAD_VAR_NUM;
#endif

#if defined(UNIX_X86_ABI)
 curNestedAlignment = 0;
Expand DownExpand Up@@ -4456,7 +4454,7 @@ void CodeGen::genFinalizeFrame()

#if defined(TARGET_X86)

 if (compiler->compTailCallUsed)
 if (compiler->compTailCallViaJitHelperUsed)
 {
 // If we are generating a helper-based tailcall, we've set the tailcall helper "flags"
 // argument to "1", indicating to the tailcall helper that we've saved the callee-saved
Expand DownExpand Up@@ -5895,10 +5893,22 @@ unsigned CodeGen::getFirstArgWithStackSlot()
 return BAD_VAR_NUM;
#elif defined(TARGET_AMD64)
 return 0;
#else // TARGET_X86
 // Not implemented for x86.
 NYI_X86("getFirstArgWithStackSlot not yet implemented for x86.");
#elif defined(TARGET_X86)
 // On x86 args are passed on the stack in reverse, so the base is the last stack argument.
 for (unsigned i = compiler->info.compArgsCount; i != 0; i--)
 {
 const ABIPassingInformation& abiInfo = compiler->lvaGetParameterABIInfo(i - 1);
 assert(abiInfo.NumSegments == 1);
 if (abiInfo.Segment(0).IsPassedOnStack())
 {
 return i - 1;
 }
 }

 assert(!"Expected to find stack parameter");
 return BAD_VAR_NUM;
#else
#error Not implemented
#endif // TARGET_X86
}

Expand Down

15 changes: 10 additions & 5 deletions
src/coreclr/jit/codegenlinear.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1793,7 +1793,14 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,

#ifdef TARGET_X86
 assert(dstReg != REG_SPBASE);
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 if (m_stkArgVarNum == BAD_VAR_NUM)
 {
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 }
 else
 {
 GetEmitter()->emitIns_R_S(INS_lea, EA_PTRSIZE, dstReg, m_stkArgVarNum, putArgNode->getArgOffset());
 }
#else // !TARGET_X86
 GenTree* dstAddr = putArgNode;
 if (dstAddr->GetRegNum() != dstReg)
Expand DownExpand Up@@ -1834,10 +1841,9 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,
// outArgVarNum - The lclVar num for the argument
//
// Notes:
// The x86 version of this is in codegenxarch.cpp, and doesn't take an
// outArgVarNum, as it pushes its args onto the stack.
// The primary x86 version of this is genPutArgStkPushFieldList in
// codegenxarch.cpp. This version is only used for fast tailcalls on x86.
//
#ifndef TARGET_X86
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum)
{
 assert(putArgStk->gtOp1->OperIs(GT_FIELD_LIST));
Expand DownExpand Up@@ -1884,7 +1890,6 @@ void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArg
#endif
 }
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// genSetBlockSize: Ensure that the block size is in the given register
Expand Down

78 changes: 59 additions & 19 deletions
src/coreclr/jit/codegenxarch.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -4126,7 +4126,6 @@ void CodeGen::genStructPutArgPush(GenTreePutArgStk* putArgNode)
}
#endif // TARGET_X86

#ifndef TARGET_X86
//------------------------------------------------------------------------
// genStructPutArgPartialRepMovs: Generates code for passing a struct arg by value on stack using
// a mix of pointer-sized stores, "movsq" and "rep movsd".
Expand DownExpand Up@@ -4217,7 +4216,6 @@ void CodeGen::genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgNode)

 assert(numGCSlotsCopied == layout->GetGCPtrCount());
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// If any Vector3 args are on stack and they are not pass-by-ref, the upper 32bits
Expand DownExpand Up@@ -8107,15 +8105,15 @@ bool CodeGen::genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk)
}

//---------------------------------------------------------------------
// genPutArgStkFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
// genPutArgStkPushFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
//
// Arguments
// treeNode - the GT_PUTARG_STK node whose op1 is a GT_FIELD_LIST
//
// Return value:
// None
//
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk)
void CodeGen::genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk)
{
 GenTreeFieldList* const fieldList = putArgStk->gtOp1->AsFieldList();
 assert(fieldList != nullptr);
Expand DownExpand Up@@ -8332,28 +8330,63 @@ void CodeGen::genPutArgStk(GenTreePutArgStk* putArgStk)

 if (data->OperIs(GT_FIELD_LIST))
 {
 genPutArgStkFieldList(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 genPutArgStkFieldList(putArgStk, getBaseVarForPutArgStk(putArgStk));
 }
 else
 {
 genPutArgStkPushFieldList(putArgStk);
 }
 return;
 }

 if (varTypeIsStruct(targetType))
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 m_pushStkArg = false;
 m_stkArgVarNum = getBaseVarForPutArgStk(putArgStk);
 m_stkArgOffset = putArgStk->getArgOffset();
 genPutStructArgStk(putArgStk);
 m_stkArgVarNum = BAD_VAR_NUM;
 }
 else
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 }
 return;
 }

 genConsumeRegs(data);

 if (data->isUsedFromReg())
 if (putArgStk->putInIncomingArgArea())
 {
 genPushReg(targetType, data->GetRegNum());
 unsigned baseVarNum = getBaseVarForPutArgStk(putArgStk);
 if (data->isContainedIntOrIImmed())
 {
 GetEmitter()->emitIns_S_I(ins_Store(targetType), emitTypeSize(targetType), baseVarNum,
 putArgStk->getArgOffset(), (int)data->AsIntConCommon()->IconValue());
 }
 else
 {
 GetEmitter()->emitIns_S_R(ins_Store(targetType), emitTypeSize(targetType), data->GetRegNum(), baseVarNum,
 putArgStk->getArgOffset());
 }
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 if (data->isUsedFromReg())
 {
 genPushReg(targetType, data->GetRegNum());
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 }
 }
#else // !TARGET_X86
 {
Expand DownExpand Up@@ -8543,7 +8576,14 @@ void CodeGen::genStoreRegToStackArg(var_types type, regNumber srcReg, int offset
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 if (m_stkArgVarNum != BAD_VAR_NUM)
 {
 GetEmitter()->emitIns_S_R(ins, attr, srcReg, m_stkArgVarNum, m_stkArgOffset + offset);
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 }
 }
#else // !TARGET_X86
 assert(m_stkArgVarNum != BAD_VAR_NUM);
Expand DownExpand Up@@ -8571,7 +8611,7 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 var_types targetType = source->TypeGet();

#if defined(TARGET_X86) && defined(FEATURE_SIMD)
 if (putArgStk->isSIMD12())
 if (putArgStk->isSIMD12() && !putArgStk->putInIncomingArgArea())
 {
 genPutArgStkSimd12(putArgStk);
 return;
Expand All@@ -8593,11 +8633,10 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 case GenTreePutArgStk::Kind::RepInstr:
 genStructPutArgRepMovs(putArgStk);
 break;
#ifndef TARGET_X86

 case GenTreePutArgStk::Kind::PartialRepInstr:
 genStructPutArgPartialRepMovs(putArgStk);
 break;
#endif // !TARGET_X86

 case GenTreePutArgStk::Kind::Unroll:
 genStructPutArgUnroll(putArgStk);
Expand DownExpand Up@@ -10567,7 +10606,8 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 // Add 'compiler->compLclFrameSize' to ESP. Use "pop ECX" for that, except in cases
 // where ECX may contain some state.

 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync())
 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync() &&
 !compiler->compFastTailCallUsed)
 {
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
 regSet.verifyRegUsed(REG_ECX);
Expand DownExpand Up@@ -10655,7 +10695,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 }
#ifdef TARGET_X86
 else if ((compiler->compLclFrameSize == REGSIZE_BYTES) && !compiler->compJmpOpUsed &&
 !compiler->compIsAsync())
 !compiler->compIsAsync() && !compiler->compFastTailCallUsed)
 {
 // "pop ecx" will make ESP point to the callee-saved registers
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
Expand DownExpand Up@@ -10809,7 +10849,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
#if FEATURE_FASTTAILCALL
 else
 {
 genCallInstruction(jmpNode->AsCall());
 genCallInstruction(jmpNode->AsCall() X86_ARG(0));
 }
#endif // FEATURE_FASTTAILCALL
 }
Expand Down

14 changes: 9 additions & 5 deletions
src/coreclr/jit/compiler.h

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Original file line numberDiff line numberDiff line change
Expand Up@@ -9877,11 +9877,15 @@ class Compiler

 InlineResult* compInlineResult; // The result of importing the inlinee method.

 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
#ifdef TARGET_X86
 bool compTailCallViaJitHelperUsed = false;
 bool compFastTailCallUsed = false;
#endif
 bool compTailPrefixSeen = false; // Does the method IL have tail. prefix
 bool compLocallocSeen = false; // Does the method IL have localloc opcode
 bool compLocallocUsed = false; // Does the method use localloc.
Expand Down

4 changes: 4 additions & 0 deletions
src/coreclr/jit/emitxarch.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -11266,12 +11266,14 @@ void emitter::emitIns_Call(const EmitCallParams& params)
 id->idAddr()->iiaAddrMode.amScale = params.xmul ? emitEncodeScale(params.xmul) : emitter::OPSZ1;

 code_t code = insCodeMR(ins);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // Tailcall with addressing mode/register needs to be rex.w
 // prefixed to be recognized as part of epilog by unwinder.
 code = AddRexWPrefix(id, code);
 }
#endif

 sz = emitInsSizeAM(id, code);

Expand DownExpand Up@@ -14386,12 +14388,14 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
 if ((ins == INS_call) || (ins == INS_tail_i_jmp))
 {
 code = AddX86PrefixIfNeeded(id, code, size);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // tail call with addressing mode (or through register) needs rex.w
 // prefix to be recognized by unwinder as part of epilog.
 code = AddRexWPrefix(id, code);
 }
#endif

 // Special case: call via a register
 if (id->idIsCallRegPtr())
Expand Down
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, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Remove or un-stick sticky/fixed headers that block content\n(function() {\n function unstick() {\n document.querySelectorAll('header, nav, [role=\"banner\"], .header, .navbar, .sticky, .fixed-top, [style*=\"position: fixed\"], [style*=\"position:sticky\"]').forEach(function(el) {\n if (el.style.position === 'fixed' || el.style.position === 'sticky' || \n getComputedStyle(el).position === 'fixed' || getComputedStyle(el).position === 'sticky') {\n el.style.position = 'static';\n el.style.top = 'auto';\n el.style.zIndex = 'auto';\n }\n });\n }\n \n unstick();\n \n var observer = new MutationObserver(unstick);\n observer.observe(document.body, { childList: true, subtree: true, attributes: true, attributeFilter: ['style', 'class'] });\n})();", "Kill Sticky Headers");
}
} catch(__e) { console.warn('[Userscript:Kill Sticky Headers]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86#116331

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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86
#116331
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bbc548f

Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86


filipnavara Jun 5, 2025
5deed43

WIP: Enable fast tailcall on x86


filipnavara Jun 6, 2025

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4 changes: 1 addition & 3 deletions
src/coreclr/clrdefinitions.cmake

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Original file line numberDiff line numberDiff line change
Expand Up@@ -64,9 +64,7 @@ if(NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_PORTABLE_SHUFFLE_THUNKS)
endif()

if(CLR_CMAKE_TARGET_UNIX OR NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)
endif()
add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)

add_compile_definitions(FEATURE_CODE_VERSIONING)
add_definitions(-DFEATURE_COLLECTIBLE_TYPES)
Expand Down

12 changes: 4 additions & 8 deletions
src/coreclr/jit/codegen.h

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Original file line numberDiff line numberDiff line change
Expand Up@@ -1172,14 +1172,12 @@ class CodeGen final : public CodeGenInterface

#endif

#ifndef TARGET_X86
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum);
#endif // !TARGET_X86

#ifdef TARGET_X86
 bool genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk);
 void genPushReg(var_types type, regNumber srcReg);
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk);
 void genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk);
#endif // TARGET_X86

 void genPutStructArgStk(GenTreePutArgStk* treeNode);
Expand All@@ -1194,9 +1192,8 @@ class CodeGen final : public CodeGenInterface
 void genStructPutArgUnroll(GenTreePutArgStk* putArgStkNode);
#ifdef TARGET_X86
 void genStructPutArgPush(GenTreePutArgStk* putArgStkNode);
#else
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);
#endif
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);

 void genCodeForStoreBlk(GenTreeBlk* storeBlkNode);
 void genCodeForInitBlkLoop(GenTreeBlk* initBlkNode);
Expand DownExpand Up@@ -1294,10 +1291,9 @@ class CodeGen final : public CodeGenInterface

#ifdef TARGET_X86
 bool m_pushStkArg;
#else // !TARGET_X86
 unsigned m_stkArgVarNum;
 unsigned m_stkArgOffset;
#endif // !TARGET_X86
 unsigned m_stkArgVarNum = BAD_VAR_NUM;
 unsigned m_stkArgOffset;

#if defined(DEBUG) && defined(TARGET_XARCH)
 void genStackPointerCheck(bool doStackPointerCheck,
Expand Down

22 changes: 16 additions & 6 deletions
src/coreclr/jit/codegencommon.cpp

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Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -201,9 +201,7 @@ void CodeGenInterface::CopyRegisterInfo()
CodeGen::CodeGen(Compiler* theCompiler)
 : CodeGenInterface(theCompiler)
{
#if !defined(TARGET_X86)
 m_stkArgVarNum = BAD_VAR_NUM;
#endif

#if defined(UNIX_X86_ABI)
 curNestedAlignment = 0;
Expand DownExpand Up@@ -4456,7 +4454,7 @@ void CodeGen::genFinalizeFrame()

#if defined(TARGET_X86)

 if (compiler->compTailCallUsed)
 if (compiler->compTailCallViaJitHelperUsed)
 {
 // If we are generating a helper-based tailcall, we've set the tailcall helper "flags"
 // argument to "1", indicating to the tailcall helper that we've saved the callee-saved
Expand DownExpand Up@@ -5895,10 +5893,22 @@ unsigned CodeGen::getFirstArgWithStackSlot()
 return BAD_VAR_NUM;
#elif defined(TARGET_AMD64)
 return 0;
#else // TARGET_X86
 // Not implemented for x86.
 NYI_X86("getFirstArgWithStackSlot not yet implemented for x86.");
#elif defined(TARGET_X86)
 // On x86 args are passed on the stack in reverse, so the base is the last stack argument.
 for (unsigned i = compiler->info.compArgsCount; i != 0; i--)
 {
 const ABIPassingInformation& abiInfo = compiler->lvaGetParameterABIInfo(i - 1);
 assert(abiInfo.NumSegments == 1);
 if (abiInfo.Segment(0).IsPassedOnStack())
 {
 return i - 1;
 }
 }

 assert(!"Expected to find stack parameter");
 return BAD_VAR_NUM;
#else
#error Not implemented
#endif // TARGET_X86
}

Expand Down

15 changes: 10 additions & 5 deletions
src/coreclr/jit/codegenlinear.cpp

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Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1793,7 +1793,14 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,

#ifdef TARGET_X86
 assert(dstReg != REG_SPBASE);
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 if (m_stkArgVarNum == BAD_VAR_NUM)
 {
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 }
 else
 {
 GetEmitter()->emitIns_R_S(INS_lea, EA_PTRSIZE, dstReg, m_stkArgVarNum, putArgNode->getArgOffset());
 }
#else // !TARGET_X86
 GenTree* dstAddr = putArgNode;
 if (dstAddr->GetRegNum() != dstReg)
Expand DownExpand Up@@ -1834,10 +1841,9 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,
// outArgVarNum - The lclVar num for the argument
//
// Notes:
// The x86 version of this is in codegenxarch.cpp, and doesn't take an
// outArgVarNum, as it pushes its args onto the stack.
// The primary x86 version of this is genPutArgStkPushFieldList in
// codegenxarch.cpp. This version is only used for fast tailcalls on x86.
//
#ifndef TARGET_X86
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum)
{
 assert(putArgStk->gtOp1->OperIs(GT_FIELD_LIST));
Expand DownExpand Up@@ -1884,7 +1890,6 @@ void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArg
#endif
 }
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// genSetBlockSize: Ensure that the block size is in the given register
Expand Down

78 changes: 59 additions & 19 deletions
src/coreclr/jit/codegenxarch.cpp

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Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -4126,7 +4126,6 @@ void CodeGen::genStructPutArgPush(GenTreePutArgStk* putArgNode)
}
#endif // TARGET_X86

#ifndef TARGET_X86
//------------------------------------------------------------------------
// genStructPutArgPartialRepMovs: Generates code for passing a struct arg by value on stack using
// a mix of pointer-sized stores, "movsq" and "rep movsd".
Expand DownExpand Up@@ -4217,7 +4216,6 @@ void CodeGen::genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgNode)

 assert(numGCSlotsCopied == layout->GetGCPtrCount());
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// If any Vector3 args are on stack and they are not pass-by-ref, the upper 32bits
Expand DownExpand Up@@ -8107,15 +8105,15 @@ bool CodeGen::genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk)
}

//---------------------------------------------------------------------
// genPutArgStkFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
// genPutArgStkPushFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
//
// Arguments
// treeNode - the GT_PUTARG_STK node whose op1 is a GT_FIELD_LIST
//
// Return value:
// None
//
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk)
void CodeGen::genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk)
{
 GenTreeFieldList* const fieldList = putArgStk->gtOp1->AsFieldList();
 assert(fieldList != nullptr);
Expand DownExpand Up@@ -8332,28 +8330,63 @@ void CodeGen::genPutArgStk(GenTreePutArgStk* putArgStk)

 if (data->OperIs(GT_FIELD_LIST))
 {
 genPutArgStkFieldList(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 genPutArgStkFieldList(putArgStk, getBaseVarForPutArgStk(putArgStk));
 }
 else
 {
 genPutArgStkPushFieldList(putArgStk);
 }
 return;
 }

 if (varTypeIsStruct(targetType))
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 m_pushStkArg = false;
 m_stkArgVarNum = getBaseVarForPutArgStk(putArgStk);
 m_stkArgOffset = putArgStk->getArgOffset();
 genPutStructArgStk(putArgStk);
 m_stkArgVarNum = BAD_VAR_NUM;
 }
 else
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 }
 return;
 }

 genConsumeRegs(data);

 if (data->isUsedFromReg())
 if (putArgStk->putInIncomingArgArea())
 {
 genPushReg(targetType, data->GetRegNum());
 unsigned baseVarNum = getBaseVarForPutArgStk(putArgStk);
 if (data->isContainedIntOrIImmed())
 {
 GetEmitter()->emitIns_S_I(ins_Store(targetType), emitTypeSize(targetType), baseVarNum,
 putArgStk->getArgOffset(), (int)data->AsIntConCommon()->IconValue());
 }
 else
 {
 GetEmitter()->emitIns_S_R(ins_Store(targetType), emitTypeSize(targetType), data->GetRegNum(), baseVarNum,
 putArgStk->getArgOffset());
 }
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 if (data->isUsedFromReg())
 {
 genPushReg(targetType, data->GetRegNum());
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 }
 }
#else // !TARGET_X86
 {
Expand DownExpand Up@@ -8543,7 +8576,14 @@ void CodeGen::genStoreRegToStackArg(var_types type, regNumber srcReg, int offset
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 if (m_stkArgVarNum != BAD_VAR_NUM)
 {
 GetEmitter()->emitIns_S_R(ins, attr, srcReg, m_stkArgVarNum, m_stkArgOffset + offset);
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 }
 }
#else // !TARGET_X86
 assert(m_stkArgVarNum != BAD_VAR_NUM);
Expand DownExpand Up@@ -8571,7 +8611,7 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 var_types targetType = source->TypeGet();

#if defined(TARGET_X86) && defined(FEATURE_SIMD)
 if (putArgStk->isSIMD12())
 if (putArgStk->isSIMD12() && !putArgStk->putInIncomingArgArea())
 {
 genPutArgStkSimd12(putArgStk);
 return;
Expand All@@ -8593,11 +8633,10 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 case GenTreePutArgStk::Kind::RepInstr:
 genStructPutArgRepMovs(putArgStk);
 break;
#ifndef TARGET_X86

 case GenTreePutArgStk::Kind::PartialRepInstr:
 genStructPutArgPartialRepMovs(putArgStk);
 break;
#endif // !TARGET_X86

 case GenTreePutArgStk::Kind::Unroll:
 genStructPutArgUnroll(putArgStk);
Expand DownExpand Up@@ -10567,7 +10606,8 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 // Add 'compiler->compLclFrameSize' to ESP. Use "pop ECX" for that, except in cases
 // where ECX may contain some state.

 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync())
 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync() &&
 !compiler->compFastTailCallUsed)
 {
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
 regSet.verifyRegUsed(REG_ECX);
Expand DownExpand Up@@ -10655,7 +10695,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 }
#ifdef TARGET_X86
 else if ((compiler->compLclFrameSize == REGSIZE_BYTES) && !compiler->compJmpOpUsed &&
 !compiler->compIsAsync())
 !compiler->compIsAsync() && !compiler->compFastTailCallUsed)
 {
 // "pop ecx" will make ESP point to the callee-saved registers
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
Expand DownExpand Up@@ -10809,7 +10849,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
#if FEATURE_FASTTAILCALL
 else
 {
 genCallInstruction(jmpNode->AsCall());
 genCallInstruction(jmpNode->AsCall() X86_ARG(0));
 }
#endif // FEATURE_FASTTAILCALL
 }
Expand Down

14 changes: 9 additions & 5 deletions
src/coreclr/jit/compiler.h

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Original file line numberDiff line numberDiff line change
Expand Up@@ -9877,11 +9877,15 @@ class Compiler

 InlineResult* compInlineResult; // The result of importing the inlinee method.

 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
#ifdef TARGET_X86
 bool compTailCallViaJitHelperUsed = false;
 bool compFastTailCallUsed = false;
#endif
 bool compTailPrefixSeen = false; // Does the method IL have tail. prefix
 bool compLocallocSeen = false; // Does the method IL have localloc opcode
 bool compLocallocUsed = false; // Does the method use localloc.
Expand Down

4 changes: 4 additions & 0 deletions
src/coreclr/jit/emitxarch.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -11266,12 +11266,14 @@ void emitter::emitIns_Call(const EmitCallParams& params)
 id->idAddr()->iiaAddrMode.amScale = params.xmul ? emitEncodeScale(params.xmul) : emitter::OPSZ1;

 code_t code = insCodeMR(ins);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // Tailcall with addressing mode/register needs to be rex.w
 // prefixed to be recognized as part of epilog by unwinder.
 code = AddRexWPrefix(id, code);
 }
#endif

 sz = emitInsSizeAM(id, code);

Expand DownExpand Up@@ -14386,12 +14388,14 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
 if ((ins == INS_call) || (ins == INS_tail_i_jmp))
 {
 code = AddX86PrefixIfNeeded(id, code, size);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // tail call with addressing mode (or through register) needs rex.w
 // prefix to be recognized by unwinder as part of epilog.
 code = AddRexWPrefix(id, code);
 }
#endif

 // Special case: call via a register
 if (id->idIsCallRegPtr())
Expand Down
Loading

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Universal Dark Mode - works on any site\n(function() {\n var enabled = true;\n \n function applyDarkMode() {\n if (!enabled) return;\n \n // Create style element if it doesn't exist\n var style = document.getElementById('universal-dark-mode-style');\n if (!style) {\n style = document.createElement('style');\n style.id = 'universal-dark-mode-style';\n document.head.appendChild(style);\n }\n \n // Dark mode CSS - inverts colors but preserves images/video\n style.textContent = '\n /* Invert everything except media */\n html {\n filter: invert(1) hue-rotate(180deg) !important;\n background: #1a1a2e !important;\n }\n \n /* Restore images, videos, iframes, canvas */\n img, video, iframe, canvas, svg, picture, [style*=\"background-image\"] {\n filter: invert(1) hue-rotate(180deg) !important;\n }\n \n /* Preserve specific elements that should not be inverted */\n .no-dark-mode, .no-dark-mode *,\n [data-theme=\"light\"], [data-theme=\"light\"],\n .ace_editor, .ace_editor *,\n .CodeMirror, .CodeMirror *,\n .monaco-editor, .monaco-editor *,\n .markdown-body pre, .markdown-body pre *,\n .highlight, .highlight *,\n pre code, pre code * {\n filter: none !important;\n }\n \n /* Fix common UI elements */\n .modal, .popup, .dropdown-menu, .tooltip, .popover {\n filter: invert(1) hue-rotate(180deg) !important;\n background: #2d2d44 !important;\n border-color: #444 !important;\n }\n \n /* Scrollbars */\n ::-webkit-scrollbar { background: #1a1a2e !important; }\n ::-webkit-scrollbar-thumb { background: #444 !important; }\n ::-webkit-scrollbar-thumb:hover { background: #555 !important; }\n \n /* Selection */\n ::selection { background: #4ecdc4 !important; color: #1a1a2e !important; }\n ::-moz-selection { background: #4ecdc4 !important; color: #1a1a2e !important; }\n ';\n }\n \n function removeDarkMode() {\n var style = document.getElementById('universal-dark-mode-style');\n if (style) style.remove();\n }\n \n // Toggle with Alt+Shift+D\n document.addEventListener('keydown', function(e) {\n if (e.altKey && e.shiftKey && e.key === 'D') {\n e.preventDefault();\n enabled = !enabled;\n if (enabled) {\n applyDarkMode();\n console.log('[Universal Dark Mode] Enabled');\n } else {\n removeDarkMode();\n console.log('[Universal Dark Mode] Disabled');\n }\n }\n });\n \n // Apply on load\n applyDarkMode();\n \n // Re-apply on dynamic content\n var observer = new MutationObserver(function(mutations) {\n if (enabled && !document.getElementById('universal-dark-mode-style')) {\n applyDarkMode();\n }\n });\n observer.observe(document.head, { childList: true });\n \n console.log('[Universal Dark Mode] Loaded - Press Alt+Shift+D to toggle');\n})();", "Universal Dark Mode");
}
} catch(__e) { console.warn('[Userscript:Universal Dark Mode]', __e); }
})();
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[CI run only] Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86
#116331
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bbc548f

Enable FEATURE_INSTANTIATINGSTUB_AS_IL on win-x86


filipnavara Jun 5, 2025
5deed43

WIP: Enable fast tailcall on x86


filipnavara Jun 6, 2025

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4 changes: 1 addition & 3 deletions
src/coreclr/clrdefinitions.cmake

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Original file line numberDiff line numberDiff line change
Expand Up@@ -64,9 +64,7 @@ if(NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_PORTABLE_SHUFFLE_THUNKS)
endif()

if(CLR_CMAKE_TARGET_UNIX OR NOT CLR_CMAKE_TARGET_ARCH_I386)
 add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)
endif()
add_definitions(-DFEATURE_INSTANTIATINGSTUB_AS_IL)

add_compile_definitions(FEATURE_CODE_VERSIONING)
add_definitions(-DFEATURE_COLLECTIBLE_TYPES)
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12 changes: 4 additions & 8 deletions
src/coreclr/jit/codegen.h

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Original file line numberDiff line numberDiff line change
Expand Up@@ -1172,14 +1172,12 @@ class CodeGen final : public CodeGenInterface

#endif

#ifndef TARGET_X86
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum);
#endif // !TARGET_X86

#ifdef TARGET_X86
 bool genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk);
 void genPushReg(var_types type, regNumber srcReg);
 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk);
 void genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk);
#endif // TARGET_X86

 void genPutStructArgStk(GenTreePutArgStk* treeNode);
Expand All@@ -1194,9 +1192,8 @@ class CodeGen final : public CodeGenInterface
 void genStructPutArgUnroll(GenTreePutArgStk* putArgStkNode);
#ifdef TARGET_X86
 void genStructPutArgPush(GenTreePutArgStk* putArgStkNode);
#else
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);
#endif
 void genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgStkNode);

 void genCodeForStoreBlk(GenTreeBlk* storeBlkNode);
 void genCodeForInitBlkLoop(GenTreeBlk* initBlkNode);
Expand DownExpand Up@@ -1294,10 +1291,9 @@ class CodeGen final : public CodeGenInterface

#ifdef TARGET_X86
 bool m_pushStkArg;
#else // !TARGET_X86
 unsigned m_stkArgVarNum;
 unsigned m_stkArgOffset;
#endif // !TARGET_X86
 unsigned m_stkArgVarNum = BAD_VAR_NUM;
 unsigned m_stkArgOffset;

#if defined(DEBUG) && defined(TARGET_XARCH)
 void genStackPointerCheck(bool doStackPointerCheck,
Expand Down

22 changes: 16 additions & 6 deletions
src/coreclr/jit/codegencommon.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -201,9 +201,7 @@ void CodeGenInterface::CopyRegisterInfo()
CodeGen::CodeGen(Compiler* theCompiler)
 : CodeGenInterface(theCompiler)
{
#if !defined(TARGET_X86)
 m_stkArgVarNum = BAD_VAR_NUM;
#endif

#if defined(UNIX_X86_ABI)
 curNestedAlignment = 0;
Expand DownExpand Up@@ -4456,7 +4454,7 @@ void CodeGen::genFinalizeFrame()

#if defined(TARGET_X86)

 if (compiler->compTailCallUsed)
 if (compiler->compTailCallViaJitHelperUsed)
 {
 // If we are generating a helper-based tailcall, we've set the tailcall helper "flags"
 // argument to "1", indicating to the tailcall helper that we've saved the callee-saved
Expand DownExpand Up@@ -5895,10 +5893,22 @@ unsigned CodeGen::getFirstArgWithStackSlot()
 return BAD_VAR_NUM;
#elif defined(TARGET_AMD64)
 return 0;
#else // TARGET_X86
 // Not implemented for x86.
 NYI_X86("getFirstArgWithStackSlot not yet implemented for x86.");
#elif defined(TARGET_X86)
 // On x86 args are passed on the stack in reverse, so the base is the last stack argument.
 for (unsigned i = compiler->info.compArgsCount; i != 0; i--)
 {
 const ABIPassingInformation& abiInfo = compiler->lvaGetParameterABIInfo(i - 1);
 assert(abiInfo.NumSegments == 1);
 if (abiInfo.Segment(0).IsPassedOnStack())
 {
 return i - 1;
 }
 }

 assert(!"Expected to find stack parameter");
 return BAD_VAR_NUM;
#else
#error Not implemented
#endif // TARGET_X86
}

Expand Down

15 changes: 10 additions & 5 deletions
src/coreclr/jit/codegenlinear.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -1793,7 +1793,14 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,

#ifdef TARGET_X86
 assert(dstReg != REG_SPBASE);
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 if (m_stkArgVarNum == BAD_VAR_NUM)
 {
 inst_Mov(TYP_I_IMPL, dstReg, REG_SPBASE, /* canSkip */ false);
 }
 else
 {
 GetEmitter()->emitIns_R_S(INS_lea, EA_PTRSIZE, dstReg, m_stkArgVarNum, putArgNode->getArgOffset());
 }
#else // !TARGET_X86
 GenTree* dstAddr = putArgNode;
 if (dstAddr->GetRegNum() != dstReg)
Expand DownExpand Up@@ -1834,10 +1841,9 @@ void CodeGen::genConsumePutStructArgStk(GenTreePutArgStk* putArgNode,
// outArgVarNum - The lclVar num for the argument
//
// Notes:
// The x86 version of this is in codegenxarch.cpp, and doesn't take an
// outArgVarNum, as it pushes its args onto the stack.
// The primary x86 version of this is genPutArgStkPushFieldList in
// codegenxarch.cpp. This version is only used for fast tailcalls on x86.
//
#ifndef TARGET_X86
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArgVarNum)
{
 assert(putArgStk->gtOp1->OperIs(GT_FIELD_LIST));
Expand DownExpand Up@@ -1884,7 +1890,6 @@ void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk, unsigned outArg
#endif
 }
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// genSetBlockSize: Ensure that the block size is in the given register
Expand Down

78 changes: 59 additions & 19 deletions
src/coreclr/jit/codegenxarch.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -4126,7 +4126,6 @@ void CodeGen::genStructPutArgPush(GenTreePutArgStk* putArgNode)
}
#endif // TARGET_X86

#ifndef TARGET_X86
//------------------------------------------------------------------------
// genStructPutArgPartialRepMovs: Generates code for passing a struct arg by value on stack using
// a mix of pointer-sized stores, "movsq" and "rep movsd".
Expand DownExpand Up@@ -4217,7 +4216,6 @@ void CodeGen::genStructPutArgPartialRepMovs(GenTreePutArgStk* putArgNode)

 assert(numGCSlotsCopied == layout->GetGCPtrCount());
}
#endif // !TARGET_X86

//------------------------------------------------------------------------
// If any Vector3 args are on stack and they are not pass-by-ref, the upper 32bits
Expand DownExpand Up@@ -8107,15 +8105,15 @@ bool CodeGen::genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk)
}

//---------------------------------------------------------------------
// genPutArgStkFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
// genPutArgStkPushFieldList - generate code for passing a GT_FIELD_LIST arg on the stack.
//
// Arguments
// treeNode - the GT_PUTARG_STK node whose op1 is a GT_FIELD_LIST
//
// Return value:
// None
//
void CodeGen::genPutArgStkFieldList(GenTreePutArgStk* putArgStk)
void CodeGen::genPutArgStkPushFieldList(GenTreePutArgStk* putArgStk)
{
 GenTreeFieldList* const fieldList = putArgStk->gtOp1->AsFieldList();
 assert(fieldList != nullptr);
Expand DownExpand Up@@ -8332,28 +8330,63 @@ void CodeGen::genPutArgStk(GenTreePutArgStk* putArgStk)

 if (data->OperIs(GT_FIELD_LIST))
 {
 genPutArgStkFieldList(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 genPutArgStkFieldList(putArgStk, getBaseVarForPutArgStk(putArgStk));
 }
 else
 {
 genPutArgStkPushFieldList(putArgStk);
 }
 return;
 }

 if (varTypeIsStruct(targetType))
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 if (putArgStk->putInIncomingArgArea())
 {
 m_pushStkArg = false;
 m_stkArgVarNum = getBaseVarForPutArgStk(putArgStk);
 m_stkArgOffset = putArgStk->getArgOffset();
 genPutStructArgStk(putArgStk);
 m_stkArgVarNum = BAD_VAR_NUM;
 }
 else
 {
 genAdjustStackForPutArgStk(putArgStk);
 genPutStructArgStk(putArgStk);
 }
 return;
 }

 genConsumeRegs(data);

 if (data->isUsedFromReg())
 if (putArgStk->putInIncomingArgArea())
 {
 genPushReg(targetType, data->GetRegNum());
 unsigned baseVarNum = getBaseVarForPutArgStk(putArgStk);
 if (data->isContainedIntOrIImmed())
 {
 GetEmitter()->emitIns_S_I(ins_Store(targetType), emitTypeSize(targetType), baseVarNum,
 putArgStk->getArgOffset(), (int)data->AsIntConCommon()->IconValue());
 }
 else
 {
 GetEmitter()->emitIns_S_R(ins_Store(targetType), emitTypeSize(targetType), data->GetRegNum(), baseVarNum,
 putArgStk->getArgOffset());
 }
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 if (data->isUsedFromReg())
 {
 genPushReg(targetType, data->GetRegNum());
 }
 else
 {
 assert(genTypeSize(data) == TARGET_POINTER_SIZE);
 inst_TT(INS_push, emitTypeSize(data), data);
 AddStackLevel(TARGET_POINTER_SIZE);
 }
 }
#else // !TARGET_X86
 {
Expand DownExpand Up@@ -8543,7 +8576,14 @@ void CodeGen::genStoreRegToStackArg(var_types type, regNumber srcReg, int offset
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 if (m_stkArgVarNum != BAD_VAR_NUM)
 {
 GetEmitter()->emitIns_S_R(ins, attr, srcReg, m_stkArgVarNum, m_stkArgOffset + offset);
 }
 else
 {
 GetEmitter()->emitIns_AR_R(ins, attr, srcReg, REG_SPBASE, offset);
 }
 }
#else // !TARGET_X86
 assert(m_stkArgVarNum != BAD_VAR_NUM);
Expand DownExpand Up@@ -8571,7 +8611,7 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 var_types targetType = source->TypeGet();

#if defined(TARGET_X86) && defined(FEATURE_SIMD)
 if (putArgStk->isSIMD12())
 if (putArgStk->isSIMD12() && !putArgStk->putInIncomingArgArea())
 {
 genPutArgStkSimd12(putArgStk);
 return;
Expand All@@ -8593,11 +8633,10 @@ void CodeGen::genPutStructArgStk(GenTreePutArgStk* putArgStk)
 case GenTreePutArgStk::Kind::RepInstr:
 genStructPutArgRepMovs(putArgStk);
 break;
#ifndef TARGET_X86

 case GenTreePutArgStk::Kind::PartialRepInstr:
 genStructPutArgPartialRepMovs(putArgStk);
 break;
#endif // !TARGET_X86

 case GenTreePutArgStk::Kind::Unroll:
 genStructPutArgUnroll(putArgStk);
Expand DownExpand Up@@ -10567,7 +10606,8 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 // Add 'compiler->compLclFrameSize' to ESP. Use "pop ECX" for that, except in cases
 // where ECX may contain some state.

 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync())
 if ((frameSize == TARGET_POINTER_SIZE) && !compiler->compJmpOpUsed && !compiler->compIsAsync() &&
 !compiler->compFastTailCallUsed)
 {
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
 regSet.verifyRegUsed(REG_ECX);
Expand DownExpand Up@@ -10655,7 +10695,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
 }
#ifdef TARGET_X86
 else if ((compiler->compLclFrameSize == REGSIZE_BYTES) && !compiler->compJmpOpUsed &&
 !compiler->compIsAsync())
 !compiler->compIsAsync() && !compiler->compFastTailCallUsed)
 {
 // "pop ecx" will make ESP point to the callee-saved registers
 inst_RV(INS_pop, REG_ECX, TYP_I_IMPL);
Expand DownExpand Up@@ -10809,7 +10849,7 @@ void CodeGen::genFnEpilog(BasicBlock* block)
#if FEATURE_FASTTAILCALL
 else
 {
 genCallInstruction(jmpNode->AsCall());
 genCallInstruction(jmpNode->AsCall() X86_ARG(0));
 }
#endif // FEATURE_FASTTAILCALL
 }
Expand Down

14 changes: 9 additions & 5 deletions
src/coreclr/jit/compiler.h

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Original file line numberDiff line numberDiff line change
Expand Up@@ -9877,11 +9877,15 @@ class Compiler

 InlineResult* compInlineResult; // The result of importing the inlinee method.

 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
 bool compDoAggressiveInlining = false; // If true, mark every method as CORINFO_FLG_FORCEINLINE
 bool compJmpOpUsed = false; // Does the method do a JMP
 bool compLongUsed = false; // Does the method use TYP_LONG
 bool compFloatingPointUsed = false; // Does the method use TYP_FLOAT or TYP_DOUBLE
 bool compTailCallUsed = false; // Does the method do a tailcall
#ifdef TARGET_X86
 bool compTailCallViaJitHelperUsed = false;
 bool compFastTailCallUsed = false;
#endif
 bool compTailPrefixSeen = false; // Does the method IL have tail. prefix
 bool compLocallocSeen = false; // Does the method IL have localloc opcode
 bool compLocallocUsed = false; // Does the method use localloc.
Expand Down

4 changes: 4 additions & 0 deletions
src/coreclr/jit/emitxarch.cpp

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Original file line numberDiff line numberDiff line change
Expand Up@@ -11266,12 +11266,14 @@ void emitter::emitIns_Call(const EmitCallParams& params)
 id->idAddr()->iiaAddrMode.amScale = params.xmul ? emitEncodeScale(params.xmul) : emitter::OPSZ1;

 code_t code = insCodeMR(ins);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // Tailcall with addressing mode/register needs to be rex.w
 // prefixed to be recognized as part of epilog by unwinder.
 code = AddRexWPrefix(id, code);
 }
#endif

 sz = emitInsSizeAM(id, code);

Expand DownExpand Up@@ -14386,12 +14388,14 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
 if ((ins == INS_call) || (ins == INS_tail_i_jmp))
 {
 code = AddX86PrefixIfNeeded(id, code, size);
#ifndef TARGET_X86
 if (ins == INS_tail_i_jmp)
 {
 // tail call with addressing mode (or through register) needs rex.w
 // prefix to be recognized by unwinder as part of epilog.
 code = AddRexWPrefix(id, code);
 }
#endif

 // Special case: call via a register
 if (id->idIsCallRegPtr())
Expand Down
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