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Add support for utilizing F16C instructions on xarch - #127094
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tannergooding
commented
Apr 17, 2026
@EgorBot -intel -amd usingBenchmarkDotNet.Attributes;usingBenchmarkDotNet.Running;publicclassBenchmarks{staticvoidMain(string[]args){BenchmarkSwitcher.FromAssembly(typeof(Benchmarks).Assembly).Run(args);}floatdataF32=float.Pi;HalfdataF16=Half.Pi;[Benchmark]publicfloatHalfToSingle()=>(float)dataF16;[Benchmark]publicHalfSingleToHalf()=>(Half)dataF32;} |
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Pull request overview
This PR adds initial xarch JIT support to accelerate System.Half ↔ float explicit conversions by recognizing Half.op_Explicit as a named intrinsic and lowering it to AVX2/F16C conversion instructions where available, without changing the existing ABI.
Changes:
- Mark
System.Halfand theHalf(float)/float(Half)explicit operators as[Intrinsic]so the JIT can recognize them. - Add a new named intrinsic (
NI_System_Half_op_Explicit) and importer expansion that emits AVX2 conversion HW intrinsics (vcvtps2ph / vcvtph2ps) for xarch. - Update xarch HW intrinsic lists + containment/perf metadata to support the new conversion instructions.
Reviewed changes
Copilot reviewed 8 out of 8 changed files in this pull request and generated 3 comments.
Show a summary per file
| File | Description |
|---|---|
| src/libraries/System.Private.CoreLib/src/System/Half.cs | Marks Half and key explicit operators as [Intrinsic] to enable JIT recognition. |
| src/coreclr/jit/namedintrinsiclist.h | Adds a named intrinsic ID for System.Half.op_Explicit. |
| src/coreclr/jit/importercalls.cpp | Recognizes Half.op_Explicit and expands it to AVX2 conversion intrinsic sequences on xarch. |
| src/coreclr/jit/importer.cpp | Adds helper routines to pack/unpack scalar Half values through SIMD nodes. |
| src/coreclr/jit/compiler.h | Declares helper routines and adds isSystemHalfClass type recognition. |
| src/coreclr/jit/hwintrinsiclistxarch.h | Adds AVX2 conversion intrinsics for half<->single vector conversions. |
| src/coreclr/jit/lowerxarch.cpp | Extends containment logic to support the new conversion/store patterns. |
| src/coreclr/jit/emitxarch.cpp | Adds perf characteristics entries for the new conversion instructions. |
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tannergooding
commented
Apr 17, 2026
CC. @dotnet/jit-contrib, @EgorBo, @kg for review @dotnet/intel and @jkotas as an FYI on the alternative approach. AVX512-FP16 support can be done nearly identically, it's just a bigger PR. I'll pull the changes from #122649 after this lands. We can then look at the ABI handling and ensuring |
tannergooding
commented
Apr 17, 2026
Benchmark (EgorBot/Benchmarks#132) is too small to get good results... The realistic is that |
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Follow up to #127094 The instruction was added a while ago but only started being utilized in the above PR. However, the instruction needs to be `MR` rather than `RM` encoded or it can cause invalid results in some scenarios.
Since #122649 had to be reverted due to the ABI concerns, this is a simpler initial change that works with the existing ABI and on hardware with AVX2 support (not just AVX512-FP16 capable hardware).
This should provide a nice win across most existing hardware and we can follow up with a PR that does similar for the AVX512-FP16 instructions that allow directly accelerated arithmetic operations, rather than only handling conversions.
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