[experiment] x64: custom calling convention for WB helpers - #128807

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Custom calling convention for CORINFO_HELP_ASSIGN_REF / CORINFO_HELP_CHECKED_ASSIGN_REF on x64: dst is passed in R11 instead of REG_ARG_0, and the helpers preserve REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep this-style values alive across the call.

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Pull request overview

Experimental change introducing a custom Win-x64 calling convention for the JIT write-barrier helpers: the destination address is passed in R11 instead of RCX, and RCX is preserved across JIT_WriteBarrier / JIT_CheckedWriteBarrier. This lets the JIT keep this-style values live across the call, yielding SPMI asmdiffs of −42,489 bytes / −2.36% PerfScore on benchmarks.run_pgo. SysV-x64 keeps the standard ABI for now.

Changes:

  • targetamd64.h: on Win-x64, set REG_WRITE_BARRIER_DST = R11 and exclude RBM_RCX from both RBM_CALLEE_TRASH_WRITEBARRIER and RBM_CALLEE_GCTRASH_WRITEBARRIER; SysV unchanged.
  • All Win-x64 CoreCLR VM write-barrier helpers (JIT_WriteBarrier_*, JIT_CheckedWriteBarrier, JIT_WriteBarrier_Debug) rewritten to use R11; Bit_Region64 replaces the mov dl,1; shl dl,cl sequence with xor edx,edx; bts edx,r10d to avoid touching CL/RCX; extra NOP_* padding inserted to keep patchable movabs immediates 8-byte-aligned after REX.B-induced growth; a buffer-tail NOP block widens the generic JIT_WriteBarrier buffer to cover the now-larger specific templates.
  • NativeAOT runtime/amd64/WriteBarriers.asm: the DEFINE_*WRITE_BARRIER* macros are parameterized over DESTREG; RhpAssignRefEDX / RhpCheckedAssignRefEDX are instantiated with r11, the interlocked helpers keep rcx, and the g_write_watch_table scratch in the core macro moves from r11 (now potentially live as dst) to r9.

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Copilot reviewed 6 out of 6 changed files in this pull request and generated no comments.

Show a summary per file
FileDescription
src/coreclr/jit/targetamd64.hDefines the new Win-x64 WB ABI: dst in R11 and RCX preserved (kept out of WB kill sets); SysV unchanged.
src/coreclr/vm/amd64/JitHelpers_Fast.asmJIT_CheckedWriteBarrier reads/writes dst via R11.
src/coreclr/vm/amd64/JitHelpers_FastWriteBarriers.asmAll JIT_WriteBarrier_* specific templates switched to R11; bit-region helpers use bts to avoid CL; alignment NOPs added for every patch label that shifted.
src/coreclr/vm/amd64/JitHelpers_Slow.asmJIT_WriteBarrier_Debug switched to R11; shadow-check scratch moves from R11 to R8 to free R11 as dst.
src/coreclr/vm/amd64/patchedcode.asmNon-patched JIT_WriteBarrier paths updated to R11; tail NOP block widens the generic buffer to accommodate the larger specific templates.
src/coreclr/runtime/amd64/WriteBarriers.asmNativeAOT write-barrier macros parameterized over DESTREG; assignment helpers use R11 to match the JIT convention, interlocked helpers keep RCX, and the WWT scratch moves to R9.

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EgorBoforce-pushed the win-x64-wb-custom-conv-experiment branch from 89020f3 to 51b6e4eCompareMay 31, 2026 00:57
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EgorBoforce-pushed the win-x64-wb-custom-conv-experiment branch from 51b6e4e to ba48720CompareMay 31, 2026 11:36
@EgorBoEgorBo changed the title [experiment] Win-x64: custom calling convention for WB helpers[experiment] x64: custom calling convention for WB helpersMay 31, 2026
@EgorBo
[experiment] x64: custom calling convention for WB helpers
c253152
Pass the WB dst register in R11 instead of REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep `this`-style values live across the call. Both x64 ABIs covered: Win-x64 .asm helpers + SysV .S helpers (CoreCLR) and NativeAOT WriteBarriers.asm.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Pull request overview

Copilot reviewed 10 out of 10 changed files in this pull request and generated 1 comment.

Comment threadsrc/coreclr/jit/targetamd64.h
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Quite big diffs implying there is a benefit in having a custom calling convention e.g. the one preserving this. r11 register is tricky as all loads/stores with it require +1 byte and it led to additional NOPs to keep alignment.

I'm closing this for now as it's too risky

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[experiment] x64: custom calling convention for WB helpers - #128807
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Custom calling convention for CORINFO_HELP_ASSIGN_REF / CORINFO_HELP_CHECKED_ASSIGN_REF on x64: dst is passed in R11 instead of REG_ARG_0, and the helpers preserve REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep this-style values alive across the call.
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Pull request overview
Experimental change introducing a custom Win-x64 calling convention for the JIT write-barrier helpers: the destination address is passed in R11 instead of RCX, and RCX is preserved across JIT_WriteBarrier / JIT_CheckedWriteBarrier. This lets the JIT keep this-style values live across the call, yielding SPMI asmdiffs of −42,489 bytes / −2.36% PerfScore on benchmarks.run_pgo. SysV-x64 keeps the standard ABI for now.
Changes:
  • targetamd64.h: on Win-x64, set REG_WRITE_BARRIER_DST = R11 and exclude RBM_RCX from both RBM_CALLEE_TRASH_WRITEBARRIER and RBM_CALLEE_GCTRASH_WRITEBARRIER; SysV unchanged.
  • All Win-x64 CoreCLR VM write-barrier helpers (JIT_WriteBarrier_*, JIT_CheckedWriteBarrier, JIT_WriteBarrier_Debug) rewritten to use R11; Bit_Region64 replaces the mov dl,1; shl dl,cl sequence with xor edx,edx; bts edx,r10d to avoid touching CL/RCX; extra NOP_* padding inserted to keep patchable movabs immediates 8-byte-aligned after REX.B-induced growth; a buffer-tail NOP block widens the generic JIT_WriteBarrier buffer to cover the now-larger specific templates.
  • NativeAOT runtime/amd64/WriteBarriers.asm: the DEFINE_*WRITE_BARRIER* macros are parameterized over DESTREG; RhpAssignRefEDX / RhpCheckedAssignRefEDX are instantiated with r11, the interlocked helpers keep rcx, and the g_write_watch_table scratch in the core macro moves from r11 (now potentially live as dst) to r9.
Reviewed changes
Copilot reviewed 6 out of 6 changed files in this pull request and generated no comments.
Show a summary per file
FileDescription
src/coreclr/jit/targetamd64.hDefines the new Win-x64 WB ABI: dst in R11 and RCX preserved (kept out of WB kill sets); SysV unchanged.
src/coreclr/vm/amd64/JitHelpers_Fast.asmJIT_CheckedWriteBarrier reads/writes dst via R11.
src/coreclr/vm/amd64/JitHelpers_FastWriteBarriers.asmAll JIT_WriteBarrier_* specific templates switched to R11; bit-region helpers use bts to avoid CL; alignment NOPs added for every patch label that shifted.
src/coreclr/vm/amd64/JitHelpers_Slow.asmJIT_WriteBarrier_Debug switched to R11; shadow-check scratch moves from R11 to R8 to free R11 as dst.
src/coreclr/vm/amd64/patchedcode.asmNon-patched JIT_WriteBarrier paths updated to R11; tail NOP block widens the generic buffer to accommodate the larger specific templates.
src/coreclr/runtime/amd64/WriteBarriers.asmNativeAOT write-barrier macros parameterized over DESTREG; assignment helpers use R11 to match the JIT convention, interlocked helpers keep RCX, and the WWT scratch moves to R9.
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[experiment] Win-x64: custom calling convention for WB helpers[experiment] x64: custom calling convention for WB helpersMay 31, 2026
@EgorBo
[experiment] x64: custom calling convention for WB helpers
c253152
Pass the WB dst register in R11 instead of REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep `this`-style values live across the call. Both x64 ABIs covered: Win-x64 .asm helpers + SysV .S helpers (CoreCLR) and NativeAOT WriteBarriers.asm.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Pull request overview
Copilot reviewed 10 out of 10 changed files in this pull request and generated 1 comment.
Comment threadsrc/coreclr/jit/targetamd64.h
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Quite big diffs implying there is a benefit in having a custom calling convention e.g. the one preserving this. r11 register is tricky as all loads/stores with it require +1 byte and it led to additional NOPs to keep alignment.
I'm closing this for now as it's too risky
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, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Force GitHub README to respect dark mode\n(function() {\n var style = document.createElement('style');\n style.textContent = '\n .markdown-body {\n color-scheme: dark light;\n }\n .markdown-body pre { background: #161b22 !important; }\n .markdown-body code { background: rgba(110, 118, 129, 0.4) !important; }\n .markdown-body table th, .markdown-body table td { border-color: #30363d !important; }\n .markdown-body img { background: #0d1117; }\n .markdown-body blockquote { border-left-color: #8b949e; }\n .markdown-body hr { border-color: #30363d; }\n ';\n document.head.appendChild(style);\n})();", "GitHub Dark Mode README Fix");
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[experiment] x64: custom calling convention for WB helpers - #128807
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Custom calling convention for CORINFO_HELP_ASSIGN_REF / CORINFO_HELP_CHECKED_ASSIGN_REF on x64: dst is passed in R11 instead of REG_ARG_0, and the helpers preserve REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep this-style values alive across the call.
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Pull request overview
Experimental change introducing a custom Win-x64 calling convention for the JIT write-barrier helpers: the destination address is passed in R11 instead of RCX, and RCX is preserved across JIT_WriteBarrier / JIT_CheckedWriteBarrier. This lets the JIT keep this-style values live across the call, yielding SPMI asmdiffs of −42,489 bytes / −2.36% PerfScore on benchmarks.run_pgo. SysV-x64 keeps the standard ABI for now.
Changes:
  • targetamd64.h: on Win-x64, set REG_WRITE_BARRIER_DST = R11 and exclude RBM_RCX from both RBM_CALLEE_TRASH_WRITEBARRIER and RBM_CALLEE_GCTRASH_WRITEBARRIER; SysV unchanged.
  • All Win-x64 CoreCLR VM write-barrier helpers (JIT_WriteBarrier_*, JIT_CheckedWriteBarrier, JIT_WriteBarrier_Debug) rewritten to use R11; Bit_Region64 replaces the mov dl,1; shl dl,cl sequence with xor edx,edx; bts edx,r10d to avoid touching CL/RCX; extra NOP_* padding inserted to keep patchable movabs immediates 8-byte-aligned after REX.B-induced growth; a buffer-tail NOP block widens the generic JIT_WriteBarrier buffer to cover the now-larger specific templates.
  • NativeAOT runtime/amd64/WriteBarriers.asm: the DEFINE_*WRITE_BARRIER* macros are parameterized over DESTREG; RhpAssignRefEDX / RhpCheckedAssignRefEDX are instantiated with r11, the interlocked helpers keep rcx, and the g_write_watch_table scratch in the core macro moves from r11 (now potentially live as dst) to r9.
Reviewed changes
Copilot reviewed 6 out of 6 changed files in this pull request and generated no comments.
Show a summary per file
FileDescription
src/coreclr/jit/targetamd64.hDefines the new Win-x64 WB ABI: dst in R11 and RCX preserved (kept out of WB kill sets); SysV unchanged.
src/coreclr/vm/amd64/JitHelpers_Fast.asmJIT_CheckedWriteBarrier reads/writes dst via R11.
src/coreclr/vm/amd64/JitHelpers_FastWriteBarriers.asmAll JIT_WriteBarrier_* specific templates switched to R11; bit-region helpers use bts to avoid CL; alignment NOPs added for every patch label that shifted.
src/coreclr/vm/amd64/JitHelpers_Slow.asmJIT_WriteBarrier_Debug switched to R11; shadow-check scratch moves from R11 to R8 to free R11 as dst.
src/coreclr/vm/amd64/patchedcode.asmNon-patched JIT_WriteBarrier paths updated to R11; tail NOP block widens the generic buffer to accommodate the larger specific templates.
src/coreclr/runtime/amd64/WriteBarriers.asmNativeAOT write-barrier macros parameterized over DESTREG; assignment helpers use R11 to match the JIT convention, interlocked helpers keep RCX, and the WWT scratch moves to R9.
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[experiment] Win-x64: custom calling convention for WB helpers[experiment] x64: custom calling convention for WB helpersMay 31, 2026
@EgorBo
[experiment] x64: custom calling convention for WB helpers
c253152
Pass the WB dst register in R11 instead of REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep `this`-style values live across the call. Both x64 ABIs covered: Win-x64 .asm helpers + SysV .S helpers (CoreCLR) and NativeAOT WriteBarriers.asm.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Copilot reviewed 10 out of 10 changed files in this pull request and generated 1 comment.
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Quite big diffs implying there is a benefit in having a custom calling convention e.g. the one preserving this. r11 register is tricky as all loads/stores with it require +1 byte and it led to additional NOPs to keep alignment.
I'm closing this for now as it's too risky
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[experiment] x64: custom calling convention for WB helpers - #128807
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Custom calling convention for CORINFO_HELP_ASSIGN_REF / CORINFO_HELP_CHECKED_ASSIGN_REF on x64: dst is passed in R11 instead of REG_ARG_0, and the helpers preserve REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep this-style values alive across the call.
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Pull request overview
Experimental change introducing a custom Win-x64 calling convention for the JIT write-barrier helpers: the destination address is passed in R11 instead of RCX, and RCX is preserved across JIT_WriteBarrier / JIT_CheckedWriteBarrier. This lets the JIT keep this-style values live across the call, yielding SPMI asmdiffs of −42,489 bytes / −2.36% PerfScore on benchmarks.run_pgo. SysV-x64 keeps the standard ABI for now.
Changes:
  • targetamd64.h: on Win-x64, set REG_WRITE_BARRIER_DST = R11 and exclude RBM_RCX from both RBM_CALLEE_TRASH_WRITEBARRIER and RBM_CALLEE_GCTRASH_WRITEBARRIER; SysV unchanged.
  • All Win-x64 CoreCLR VM write-barrier helpers (JIT_WriteBarrier_*, JIT_CheckedWriteBarrier, JIT_WriteBarrier_Debug) rewritten to use R11; Bit_Region64 replaces the mov dl,1; shl dl,cl sequence with xor edx,edx; bts edx,r10d to avoid touching CL/RCX; extra NOP_* padding inserted to keep patchable movabs immediates 8-byte-aligned after REX.B-induced growth; a buffer-tail NOP block widens the generic JIT_WriteBarrier buffer to cover the now-larger specific templates.
  • NativeAOT runtime/amd64/WriteBarriers.asm: the DEFINE_*WRITE_BARRIER* macros are parameterized over DESTREG; RhpAssignRefEDX / RhpCheckedAssignRefEDX are instantiated with r11, the interlocked helpers keep rcx, and the g_write_watch_table scratch in the core macro moves from r11 (now potentially live as dst) to r9.
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Show a summary per file
FileDescription
src/coreclr/jit/targetamd64.hDefines the new Win-x64 WB ABI: dst in R11 and RCX preserved (kept out of WB kill sets); SysV unchanged.
src/coreclr/vm/amd64/JitHelpers_Fast.asmJIT_CheckedWriteBarrier reads/writes dst via R11.
src/coreclr/vm/amd64/JitHelpers_FastWriteBarriers.asmAll JIT_WriteBarrier_* specific templates switched to R11; bit-region helpers use bts to avoid CL; alignment NOPs added for every patch label that shifted.
src/coreclr/vm/amd64/JitHelpers_Slow.asmJIT_WriteBarrier_Debug switched to R11; shadow-check scratch moves from R11 to R8 to free R11 as dst.
src/coreclr/vm/amd64/patchedcode.asmNon-patched JIT_WriteBarrier paths updated to R11; tail NOP block widens the generic buffer to accommodate the larger specific templates.
src/coreclr/runtime/amd64/WriteBarriers.asmNativeAOT write-barrier macros parameterized over DESTREG; assignment helpers use R11 to match the JIT convention, interlocked helpers keep RCX, and the WWT scratch moves to R9.
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[experiment] Win-x64: custom calling convention for WB helpers[experiment] x64: custom calling convention for WB helpersMay 31, 2026
@EgorBo
[experiment] x64: custom calling convention for WB helpers
c253152
Pass the WB dst register in R11 instead of REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep `this`-style values live across the call. Both x64 ABIs covered: Win-x64 .asm helpers + SysV .S helpers (CoreCLR) and NativeAOT WriteBarriers.asm.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Pull request overview
Copilot reviewed 10 out of 10 changed files in this pull request and generated 1 comment.
Comment threadsrc/coreclr/jit/targetamd64.h
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Quite big diffs implying there is a benefit in having a custom calling convention e.g. the one preserving this. r11 register is tricky as all loads/stores with it require +1 byte and it led to additional NOPs to keep alignment.
I'm closing this for now as it's too risky
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, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Strip utm_, fbclid, gclid, etc. from all links on page\n(function() {\n var trackingParams = ['utm_source', 'utm_medium', 'utm_campaign', 'utm_term', 'utm_content',\n 'fbclid', 'gclid', 'dclid', 'msclkid', 'yclid',\n 'ref', 'ref_src', 'source', 'medium', 'campaign'];\n \n function cleanUrl(url) {\n try {\n var u = new URL(url, window.location.origin);\n var changed = false;\n trackingParams.forEach(function(p) {\n if (u.searchParams.has(p)) {\n u.searchParams.delete(p);\n changed = true;\n }\n });\n return changed ? u.toString() : url;\n } catch (e) {\n return url;\n }\n }\n \n function cleanLinks() {\n document.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n \n cleanLinks();\n \n var observer = new MutationObserver(function(mutations) {\n mutations.forEach(function(m) {\n m.addedNodes.forEach(function(node) {\n if (node.nodeType === 1) {\n if (node.tagName === 'A') cleanLinks();\n node.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n });\n });\n });\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Remove Tracking Parameters from Links");
}
} catch(__e) { console.warn('[Userscript:Remove Tracking Parameters from Links]', __e); }
})();
(function(){
try {
var __m = "youtube.com";
var __re = new RegExp('^' + "youtube\\.com" + '

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[experiment] x64: custom calling convention for WB helpers - #128807
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Custom calling convention for CORINFO_HELP_ASSIGN_REF / CORINFO_HELP_CHECKED_ASSIGN_REF on x64: dst is passed in R11 instead of REG_ARG_0, and the helpers preserve REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep this-style values alive across the call.
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Pull request overview
Experimental change introducing a custom Win-x64 calling convention for the JIT write-barrier helpers: the destination address is passed in R11 instead of RCX, and RCX is preserved across JIT_WriteBarrier / JIT_CheckedWriteBarrier. This lets the JIT keep this-style values live across the call, yielding SPMI asmdiffs of −42,489 bytes / −2.36% PerfScore on benchmarks.run_pgo. SysV-x64 keeps the standard ABI for now.
Changes:
  • targetamd64.h: on Win-x64, set REG_WRITE_BARRIER_DST = R11 and exclude RBM_RCX from both RBM_CALLEE_TRASH_WRITEBARRIER and RBM_CALLEE_GCTRASH_WRITEBARRIER; SysV unchanged.
  • All Win-x64 CoreCLR VM write-barrier helpers (JIT_WriteBarrier_*, JIT_CheckedWriteBarrier, JIT_WriteBarrier_Debug) rewritten to use R11; Bit_Region64 replaces the mov dl,1; shl dl,cl sequence with xor edx,edx; bts edx,r10d to avoid touching CL/RCX; extra NOP_* padding inserted to keep patchable movabs immediates 8-byte-aligned after REX.B-induced growth; a buffer-tail NOP block widens the generic JIT_WriteBarrier buffer to cover the now-larger specific templates.
  • NativeAOT runtime/amd64/WriteBarriers.asm: the DEFINE_*WRITE_BARRIER* macros are parameterized over DESTREG; RhpAssignRefEDX / RhpCheckedAssignRefEDX are instantiated with r11, the interlocked helpers keep rcx, and the g_write_watch_table scratch in the core macro moves from r11 (now potentially live as dst) to r9.
Reviewed changes
Copilot reviewed 6 out of 6 changed files in this pull request and generated no comments.
Show a summary per file
FileDescription
src/coreclr/jit/targetamd64.hDefines the new Win-x64 WB ABI: dst in R11 and RCX preserved (kept out of WB kill sets); SysV unchanged.
src/coreclr/vm/amd64/JitHelpers_Fast.asmJIT_CheckedWriteBarrier reads/writes dst via R11.
src/coreclr/vm/amd64/JitHelpers_FastWriteBarriers.asmAll JIT_WriteBarrier_* specific templates switched to R11; bit-region helpers use bts to avoid CL; alignment NOPs added for every patch label that shifted.
src/coreclr/vm/amd64/JitHelpers_Slow.asmJIT_WriteBarrier_Debug switched to R11; shadow-check scratch moves from R11 to R8 to free R11 as dst.
src/coreclr/vm/amd64/patchedcode.asmNon-patched JIT_WriteBarrier paths updated to R11; tail NOP block widens the generic buffer to accommodate the larger specific templates.
src/coreclr/runtime/amd64/WriteBarriers.asmNativeAOT write-barrier macros parameterized over DESTREG; assignment helpers use R11 to match the JIT convention, interlocked helpers keep RCX, and the WWT scratch moves to R9.
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changed the title
[experiment] Win-x64: custom calling convention for WB helpers[experiment] x64: custom calling convention for WB helpersMay 31, 2026
@EgorBo
[experiment] x64: custom calling convention for WB helpers
c253152
Pass the WB dst register in R11 instead of REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep `this`-style values live across the call. Both x64 ABIs covered: Win-x64 .asm helpers + SysV .S helpers (CoreCLR) and NativeAOT WriteBarriers.asm.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Pull request overview
Copilot reviewed 10 out of 10 changed files in this pull request and generated 1 comment.
Comment threadsrc/coreclr/jit/targetamd64.h
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Quite big diffs implying there is a benefit in having a custom calling convention e.g. the one preserving this. r11 register is tricky as all loads/stores with it require +1 byte and it led to additional NOPs to keep alignment.
I'm closing this for now as it's too risky
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, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Auto-enable theater mode on YouTube\n(function() {\n function tryTheater() {\n var btn = document.querySelector('button[aria-label=\"Theater mode\"], ytd-player #player button[title=\"Theater mode\"]');\n if (btn && !btn.classList.contains('activated')) {\n btn.click();\n }\n }\n \n // Try immediately\n tryTheater();\n \n // Try after navigation (SPA)\n var lastUrl = location.href;\n setInterval(function() {\n if (location.href !== lastUrl) {\n lastUrl = location.href;\n setTimeout(tryTheater, 500);\n }\n }, 1000);\n \n // Also try on player load\n var observer = new MutationObserver(tryTheater);\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "YouTube Theater Mode Default");
}
} catch(__e) { console.warn('[Userscript:YouTube Theater Mode Default]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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[experiment] x64: custom calling convention for WB helpers - #128807
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Custom calling convention for CORINFO_HELP_ASSIGN_REF / CORINFO_HELP_CHECKED_ASSIGN_REF on x64: dst is passed in R11 instead of REG_ARG_0, and the helpers preserve REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep this-style values alive across the call.
Big diffs
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Pull request overview
Experimental change introducing a custom Win-x64 calling convention for the JIT write-barrier helpers: the destination address is passed in R11 instead of RCX, and RCX is preserved across JIT_WriteBarrier / JIT_CheckedWriteBarrier. This lets the JIT keep this-style values live across the call, yielding SPMI asmdiffs of −42,489 bytes / −2.36% PerfScore on benchmarks.run_pgo. SysV-x64 keeps the standard ABI for now.
Changes:
  • targetamd64.h: on Win-x64, set REG_WRITE_BARRIER_DST = R11 and exclude RBM_RCX from both RBM_CALLEE_TRASH_WRITEBARRIER and RBM_CALLEE_GCTRASH_WRITEBARRIER; SysV unchanged.
  • All Win-x64 CoreCLR VM write-barrier helpers (JIT_WriteBarrier_*, JIT_CheckedWriteBarrier, JIT_WriteBarrier_Debug) rewritten to use R11; Bit_Region64 replaces the mov dl,1; shl dl,cl sequence with xor edx,edx; bts edx,r10d to avoid touching CL/RCX; extra NOP_* padding inserted to keep patchable movabs immediates 8-byte-aligned after REX.B-induced growth; a buffer-tail NOP block widens the generic JIT_WriteBarrier buffer to cover the now-larger specific templates.
  • NativeAOT runtime/amd64/WriteBarriers.asm: the DEFINE_*WRITE_BARRIER* macros are parameterized over DESTREG; RhpAssignRefEDX / RhpCheckedAssignRefEDX are instantiated with r11, the interlocked helpers keep rcx, and the g_write_watch_table scratch in the core macro moves from r11 (now potentially live as dst) to r9.
Reviewed changes
Copilot reviewed 6 out of 6 changed files in this pull request and generated no comments.
Show a summary per file
FileDescription
src/coreclr/jit/targetamd64.hDefines the new Win-x64 WB ABI: dst in R11 and RCX preserved (kept out of WB kill sets); SysV unchanged.
src/coreclr/vm/amd64/JitHelpers_Fast.asmJIT_CheckedWriteBarrier reads/writes dst via R11.
src/coreclr/vm/amd64/JitHelpers_FastWriteBarriers.asmAll JIT_WriteBarrier_* specific templates switched to R11; bit-region helpers use bts to avoid CL; alignment NOPs added for every patch label that shifted.
src/coreclr/vm/amd64/JitHelpers_Slow.asmJIT_WriteBarrier_Debug switched to R11; shadow-check scratch moves from R11 to R8 to free R11 as dst.
src/coreclr/vm/amd64/patchedcode.asmNon-patched JIT_WriteBarrier paths updated to R11; tail NOP block widens the generic buffer to accommodate the larger specific templates.
src/coreclr/runtime/amd64/WriteBarriers.asmNativeAOT write-barrier macros parameterized over DESTREG; assignment helpers use R11 to match the JIT convention, interlocked helpers keep RCX, and the WWT scratch moves to R9.
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[experiment] Win-x64: custom calling convention for WB helpers[experiment] x64: custom calling convention for WB helpersMay 31, 2026
@EgorBo
[experiment] x64: custom calling convention for WB helpers
c253152
Pass the WB dst register in R11 instead of REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep `this`-style values live across the call. Both x64 ABIs covered: Win-x64 .asm helpers + SysV .S helpers (CoreCLR) and NativeAOT WriteBarriers.asm.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Pull request overview
Copilot reviewed 10 out of 10 changed files in this pull request and generated 1 comment.
Comment threadsrc/coreclr/jit/targetamd64.h
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Quite big diffs implying there is a benefit in having a custom calling convention e.g. the one preserving this. r11 register is tricky as all loads/stores with it require +1 byte and it led to additional NOPs to keep alignment.
I'm closing this for now as it's too risky
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, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Remove or un-stick sticky/fixed headers that block content\n(function() {\n function unstick() {\n document.querySelectorAll('header, nav, [role=\"banner\"], .header, .navbar, .sticky, .fixed-top, [style*=\"position: fixed\"], [style*=\"position:sticky\"]').forEach(function(el) {\n if (el.style.position === 'fixed' || el.style.position === 'sticky' || \n getComputedStyle(el).position === 'fixed' || getComputedStyle(el).position === 'sticky') {\n el.style.position = 'static';\n el.style.top = 'auto';\n el.style.zIndex = 'auto';\n }\n });\n }\n \n unstick();\n \n var observer = new MutationObserver(unstick);\n observer.observe(document.body, { childList: true, subtree: true, attributes: true, attributeFilter: ['style', 'class'] });\n})();", "Kill Sticky Headers");
}
} catch(__e) { console.warn('[Userscript:Kill Sticky Headers]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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[experiment] x64: custom calling convention for WB helpers - #128807
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Custom calling convention for CORINFO_HELP_ASSIGN_REF / CORINFO_HELP_CHECKED_ASSIGN_REF on x64: dst is passed in R11 instead of REG_ARG_0, and the helpers preserve REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep this-style values alive across the call.
Big diffs
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Pull request overview
Experimental change introducing a custom Win-x64 calling convention for the JIT write-barrier helpers: the destination address is passed in R11 instead of RCX, and RCX is preserved across JIT_WriteBarrier / JIT_CheckedWriteBarrier. This lets the JIT keep this-style values live across the call, yielding SPMI asmdiffs of −42,489 bytes / −2.36% PerfScore on benchmarks.run_pgo. SysV-x64 keeps the standard ABI for now.
Changes:
  • targetamd64.h: on Win-x64, set REG_WRITE_BARRIER_DST = R11 and exclude RBM_RCX from both RBM_CALLEE_TRASH_WRITEBARRIER and RBM_CALLEE_GCTRASH_WRITEBARRIER; SysV unchanged.
  • All Win-x64 CoreCLR VM write-barrier helpers (JIT_WriteBarrier_*, JIT_CheckedWriteBarrier, JIT_WriteBarrier_Debug) rewritten to use R11; Bit_Region64 replaces the mov dl,1; shl dl,cl sequence with xor edx,edx; bts edx,r10d to avoid touching CL/RCX; extra NOP_* padding inserted to keep patchable movabs immediates 8-byte-aligned after REX.B-induced growth; a buffer-tail NOP block widens the generic JIT_WriteBarrier buffer to cover the now-larger specific templates.
  • NativeAOT runtime/amd64/WriteBarriers.asm: the DEFINE_*WRITE_BARRIER* macros are parameterized over DESTREG; RhpAssignRefEDX / RhpCheckedAssignRefEDX are instantiated with r11, the interlocked helpers keep rcx, and the g_write_watch_table scratch in the core macro moves from r11 (now potentially live as dst) to r9.
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src/coreclr/jit/targetamd64.hDefines the new Win-x64 WB ABI: dst in R11 and RCX preserved (kept out of WB kill sets); SysV unchanged.
src/coreclr/vm/amd64/JitHelpers_Fast.asmJIT_CheckedWriteBarrier reads/writes dst via R11.
src/coreclr/vm/amd64/JitHelpers_FastWriteBarriers.asmAll JIT_WriteBarrier_* specific templates switched to R11; bit-region helpers use bts to avoid CL; alignment NOPs added for every patch label that shifted.
src/coreclr/vm/amd64/JitHelpers_Slow.asmJIT_WriteBarrier_Debug switched to R11; shadow-check scratch moves from R11 to R8 to free R11 as dst.
src/coreclr/vm/amd64/patchedcode.asmNon-patched JIT_WriteBarrier paths updated to R11; tail NOP block widens the generic buffer to accommodate the larger specific templates.
src/coreclr/runtime/amd64/WriteBarriers.asmNativeAOT write-barrier macros parameterized over DESTREG; assignment helpers use R11 to match the JIT convention, interlocked helpers keep RCX, and the WWT scratch moves to R9.
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[experiment] Win-x64: custom calling convention for WB helpers[experiment] x64: custom calling convention for WB helpersMay 31, 2026
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[experiment] x64: custom calling convention for WB helpers
c253152
Pass the WB dst register in R11 instead of REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep `this`-style values live across the call. Both x64 ABIs covered: Win-x64 .asm helpers + SysV .S helpers (CoreCLR) and NativeAOT WriteBarriers.asm.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Pull request overview
Copilot reviewed 10 out of 10 changed files in this pull request and generated 1 comment.
Comment threadsrc/coreclr/jit/targetamd64.h
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Quite big diffs implying there is a benefit in having a custom calling convention e.g. the one preserving this. r11 register is tricky as all loads/stores with it require +1 byte and it led to additional NOPs to keep alignment.
I'm closing this for now as it's too risky
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} catch(__e) { console.warn('[Userscript:Universal Dark Mode]', __e); }
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[experiment] x64: custom calling convention for WB helpers - #128807
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Custom calling convention for CORINFO_HELP_ASSIGN_REF / CORINFO_HELP_CHECKED_ASSIGN_REF on x64: dst is passed in R11 instead of REG_ARG_0, and the helpers preserve REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep this-style values alive across the call.
Big diffs
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Pull request overview
Experimental change introducing a custom Win-x64 calling convention for the JIT write-barrier helpers: the destination address is passed in R11 instead of RCX, and RCX is preserved across JIT_WriteBarrier / JIT_CheckedWriteBarrier. This lets the JIT keep this-style values live across the call, yielding SPMI asmdiffs of −42,489 bytes / −2.36% PerfScore on benchmarks.run_pgo. SysV-x64 keeps the standard ABI for now.
Changes:
  • targetamd64.h: on Win-x64, set REG_WRITE_BARRIER_DST = R11 and exclude RBM_RCX from both RBM_CALLEE_TRASH_WRITEBARRIER and RBM_CALLEE_GCTRASH_WRITEBARRIER; SysV unchanged.
  • All Win-x64 CoreCLR VM write-barrier helpers (JIT_WriteBarrier_*, JIT_CheckedWriteBarrier, JIT_WriteBarrier_Debug) rewritten to use R11; Bit_Region64 replaces the mov dl,1; shl dl,cl sequence with xor edx,edx; bts edx,r10d to avoid touching CL/RCX; extra NOP_* padding inserted to keep patchable movabs immediates 8-byte-aligned after REX.B-induced growth; a buffer-tail NOP block widens the generic JIT_WriteBarrier buffer to cover the now-larger specific templates.
  • NativeAOT runtime/amd64/WriteBarriers.asm: the DEFINE_*WRITE_BARRIER* macros are parameterized over DESTREG; RhpAssignRefEDX / RhpCheckedAssignRefEDX are instantiated with r11, the interlocked helpers keep rcx, and the g_write_watch_table scratch in the core macro moves from r11 (now potentially live as dst) to r9.
Reviewed changes
Copilot reviewed 6 out of 6 changed files in this pull request and generated no comments.
Show a summary per file
FileDescription
src/coreclr/jit/targetamd64.hDefines the new Win-x64 WB ABI: dst in R11 and RCX preserved (kept out of WB kill sets); SysV unchanged.
src/coreclr/vm/amd64/JitHelpers_Fast.asmJIT_CheckedWriteBarrier reads/writes dst via R11.
src/coreclr/vm/amd64/JitHelpers_FastWriteBarriers.asmAll JIT_WriteBarrier_* specific templates switched to R11; bit-region helpers use bts to avoid CL; alignment NOPs added for every patch label that shifted.
src/coreclr/vm/amd64/JitHelpers_Slow.asmJIT_WriteBarrier_Debug switched to R11; shadow-check scratch moves from R11 to R8 to free R11 as dst.
src/coreclr/vm/amd64/patchedcode.asmNon-patched JIT_WriteBarrier paths updated to R11; tail NOP block widens the generic buffer to accommodate the larger specific templates.
src/coreclr/runtime/amd64/WriteBarriers.asmNativeAOT write-barrier macros parameterized over DESTREG; assignment helpers use R11 to match the JIT convention, interlocked helpers keep RCX, and the WWT scratch moves to R9.
@EgorBo
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@EgorBo
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changed the title
[experiment] Win-x64: custom calling convention for WB helpers[experiment] x64: custom calling convention for WB helpersMay 31, 2026
@EgorBo
[experiment] x64: custom calling convention for WB helpers
c253152
Pass the WB dst register in R11 instead of REG_ARG_0 (RCX on Win-x64, RDI on SysV) so the JIT can keep `this`-style values live across the call. Both x64 ABIs covered: Win-x64 .asm helpers + SysV .S helpers (CoreCLR) and NativeAOT WriteBarriers.asm.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Pull request overview
Copilot reviewed 10 out of 10 changed files in this pull request and generated 1 comment.
Comment threadsrc/coreclr/jit/targetamd64.h
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Quite big diffs implying there is a benefit in having a custom calling convention e.g. the one preserving this. r11 register is tricky as all loads/stores with it require +1 byte and it led to additional NOPs to keep alignment.
I'm closing this for now as it's too risky
@EgorBoEgorBo
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May 31, 2026
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