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JIT: Fix managed return value debug info for floating-point returns - #129321

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tommcdon merged 7 commits into
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tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info
Jun 18, 2026
Merged

JIT: Fix managed return value debug info for floating-point returns#129321
tommcdon merged 7 commits into
dotnet:mainfrom
tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info

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PR #128479 introduced emitting managed return values as native vars but used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns, which sets vlType=VLT_REG (integer register). The DBI then fails to read the return value because it looks in an integer register instead of XMM0.

Fix by using VLT_REG_FP with a 0-based FP register index, which is what the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to convert to CorDebugRegister).

Found via Visual Studio testing

PR dotnet#128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdontommcdon added this to the 11.0.0 milestone Jun 12, 2026
@tommcdontommcdon self-assigned this Jun 12, 2026
CopilotAI review requested due to automatic review settings June 12, 2026 12:17
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Pull request overview

This PR updates managed call return-value debug-info emission in the JIT so that floating-point return values are reported using the FP-specific location kind (VLT_REG_FP) with the expected 0-based FP register index, enabling the debugger to read the return value from the correct FP register.

Changes:

  • Emit FP return locations using VLT_REG_FP instead of storeVariableInRegisters(REG_FLOATRET, REG_NA) for non-x86 targets.
  • Encode the FP register as a 0-based index (REG_FLOATRET - REG_FP_FIRST) for debugger consumption.
  • Add comments documenting the VLT_REG_FP encoding expectation.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
siFillRegisterVarLoc was storing the raw JIT register number (e.g., 32
for XMM0) in vlReg.vlrReg when encoding VLT_REG_FP. The DBI expects a
0-based FP register index and adds the platform-specific base
(REGISTER_AMD64_XMM0, REGISTER_ARM64_V0, etc.) when converting to
CorDebugRegister.
Emit (GetRegNum() - REG_FP_FIRST) so the DBI computes the correct
register. Also fix eeDispVar to reconstruct the full register number
when displaying VLT_REG_FP entries in JIT dumps, and add
genIsValidIntReg asserts to storeVariableInRegisters to catch misuse
for non-integer register types.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon enabled auto-merge (squash) June 12, 2026 19:52
psiBegProlog was passing XMM/V register numbers through
storeVariableInRegisters which unconditionally encodes as VLT_REG
(integer register type). Route FP parameters to VLT_REG_FP with a
0-based FP register index instead.
For SysV x64 mixed struct passing (GPR + XMM), drop the XMM register
from VLT_REG_REG encoding since the debug info protocol cannot
represent mixed integer/FP register pairs.
Add genIsValidIntReg asserts to storeVariableInRegisters to guard
against future misuse with non-integer registers.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon disabled auto-merge June 13, 2026 01:33
CopilotAI review requested due to automatic review settings June 13, 2026 03:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
@tommcdon
tommcdon enabled auto-merge (squash) June 17, 2026 15:06
On Linux x64 (SysV ABI) and RISC-V, structs can be returned in a mix
of int and float registers (e.g. ValueTuple<double, int> returns in
XMM0 + RAX). The VLT_REG_REG encoding only supports integer registers,
so storeVariableInRegisters asserts genIsValidIntReg on these platforms.
Skip recording managed return value info for multi-reg returns that
involve float registers, since the encoding cannot represent them.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 17, 2026 21:43

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
tommcdonand others added 2 commits June 18, 2026 04:27
Add references to dotnet#129344 at both locations where
mixed int/float multi-reg returns are unsupported in VarLoc encoding.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 18, 2026 14:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
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/ba-g issues are unrelated

@tommcdon
tommcdon merged commit b9d5c9f into dotnet:mainJun 18, 2026
110 of 128 checks passed
eiriktsarpalis pushed a commit that referenced this pull request Jul 15, 2026
…129321)
PR #128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of
XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Found via Visual Studio testing
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
tommcdon added a commit that referenced this pull request Jul 15, 2026
… x64 (#129992)
Adds managed-return-value (MRV) debug-info encoding for value-class
returns that live in two registers. Additionally, this change implements
CordbJITILFrame::GetNativeVariable for x86 x87 FP-stack return/local
variables (missed scenario from #129321)
Fixes#129344
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@github-actionsgithub-actionsBot locked and limited conversation to collaborators Jul 20, 2026
Sign up for freeto subscribe to this conversation on GitHub. Already have an account? Sign in.

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JIT: Fix managed return value debug info for floating-point returns by tommcdon · Pull Request #129321 · dotnet/runtime · GitHub
Skip to content

JIT: Fix managed return value debug info for floating-point returns - #129321

Merged
tommcdon merged 7 commits into
dotnet:mainfrom
tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info
Jun 18, 2026
Merged

JIT: Fix managed return value debug info for floating-point returns#129321
tommcdon merged 7 commits into
dotnet:mainfrom
tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info

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PR #128479 introduced emitting managed return values as native vars but used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns, which sets vlType=VLT_REG (integer register). The DBI then fails to read the return value because it looks in an integer register instead of XMM0.

Fix by using VLT_REG_FP with a 0-based FP register index, which is what the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to convert to CorDebugRegister).

Found via Visual Studio testing

PR dotnet#128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdontommcdon added this to the 11.0.0 milestone Jun 12, 2026
@tommcdontommcdon self-assigned this Jun 12, 2026
CopilotAI review requested due to automatic review settings June 12, 2026 12:17
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Tagging subscribers to this area: @steveisok, @tommcdon, @dotnet/dotnet-diag
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Pull request overview

This PR updates managed call return-value debug-info emission in the JIT so that floating-point return values are reported using the FP-specific location kind (VLT_REG_FP) with the expected 0-based FP register index, enabling the debugger to read the return value from the correct FP register.

Changes:

  • Emit FP return locations using VLT_REG_FP instead of storeVariableInRegisters(REG_FLOATRET, REG_NA) for non-x86 targets.
  • Encode the FP register as a 0-based index (REG_FLOATRET - REG_FP_FIRST) for debugger consumption.
  • Add comments documenting the VLT_REG_FP encoding expectation.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
siFillRegisterVarLoc was storing the raw JIT register number (e.g., 32
for XMM0) in vlReg.vlrReg when encoding VLT_REG_FP. The DBI expects a
0-based FP register index and adds the platform-specific base
(REGISTER_AMD64_XMM0, REGISTER_ARM64_V0, etc.) when converting to
CorDebugRegister.
Emit (GetRegNum() - REG_FP_FIRST) so the DBI computes the correct
register. Also fix eeDispVar to reconstruct the full register number
when displaying VLT_REG_FP entries in JIT dumps, and add
genIsValidIntReg asserts to storeVariableInRegisters to catch misuse
for non-integer register types.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon enabled auto-merge (squash) June 12, 2026 19:52
psiBegProlog was passing XMM/V register numbers through
storeVariableInRegisters which unconditionally encodes as VLT_REG
(integer register type). Route FP parameters to VLT_REG_FP with a
0-based FP register index instead.
For SysV x64 mixed struct passing (GPR + XMM), drop the XMM register
from VLT_REG_REG encoding since the debug info protocol cannot
represent mixed integer/FP register pairs.
Add genIsValidIntReg asserts to storeVariableInRegisters to guard
against future misuse with non-integer registers.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon disabled auto-merge June 13, 2026 01:33
CopilotAI review requested due to automatic review settings June 13, 2026 03:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
@tommcdon
tommcdon enabled auto-merge (squash) June 17, 2026 15:06
On Linux x64 (SysV ABI) and RISC-V, structs can be returned in a mix
of int and float registers (e.g. ValueTuple<double, int> returns in
XMM0 + RAX). The VLT_REG_REG encoding only supports integer registers,
so storeVariableInRegisters asserts genIsValidIntReg on these platforms.
Skip recording managed return value info for multi-reg returns that
involve float registers, since the encoding cannot represent them.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 17, 2026 21:43

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
tommcdonand others added 2 commits June 18, 2026 04:27
Add references to dotnet#129344 at both locations where
mixed int/float multi-reg returns are unsupported in VarLoc encoding.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 18, 2026 14:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
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/ba-g issues are unrelated

@tommcdon
tommcdon merged commit b9d5c9f into dotnet:mainJun 18, 2026
110 of 128 checks passed
eiriktsarpalis pushed a commit that referenced this pull request Jul 15, 2026
…129321)
PR #128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of
XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Found via Visual Studio testing
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
tommcdon added a commit that referenced this pull request Jul 15, 2026
… x64 (#129992)
Adds managed-return-value (MRV) debug-info encoding for value-class
returns that live in two registers. Additionally, this change implements
CordbJITILFrame::GetNativeVariable for x86 x87 FP-stack return/local
variables (missed scenario from #129321)
Fixes#129344
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@github-actionsgithub-actionsBot locked and limited conversation to collaborators Jul 20, 2026
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@tommcdon@steveisok@jkotas@jakobbotsch@tannergooding@rcj1
, 'i'); if (__m === '*' || __re.test(location.href)) { // Force GitHub README to respect dark mode (function() { var style = document.createElement('style'); style.textContent = ' .markdown-body { color-scheme: dark light; } .markdown-body pre { background: #161b22 !important; } .markdown-body code { background: rgba(110, 118, 129, 0.4) !important; } .markdown-body table th, .markdown-body table td { border-color: #30363d !important; } .markdown-body img { background: #0d1117; } .markdown-body blockquote { border-left-color: #8b949e; } .markdown-body hr { border-color: #30363d; } '; document.head.appendChild(style); })(); } } catch(__e) { console.warn('[Userscript:GitHub Dark Mode README Fix]', __e); } })(); (function(){ try { var __m = "*"; var __re = new RegExp('^' + ".*" + ' JIT: Fix managed return value debug info for floating-point returns by tommcdon · Pull Request #129321 · dotnet/runtime · GitHub
Skip to content

JIT: Fix managed return value debug info for floating-point returns - #129321

Merged
tommcdon merged 7 commits into
dotnet:mainfrom
tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info
Jun 18, 2026
Merged

JIT: Fix managed return value debug info for floating-point returns#129321
tommcdon merged 7 commits into
dotnet:mainfrom
tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info

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PR #128479 introduced emitting managed return values as native vars but used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns, which sets vlType=VLT_REG (integer register). The DBI then fails to read the return value because it looks in an integer register instead of XMM0.

Fix by using VLT_REG_FP with a 0-based FP register index, which is what the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to convert to CorDebugRegister).

Found via Visual Studio testing

PR dotnet#128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdontommcdon added this to the 11.0.0 milestone Jun 12, 2026
@tommcdontommcdon self-assigned this Jun 12, 2026
CopilotAI review requested due to automatic review settings June 12, 2026 12:17
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Tagging subscribers to this area: @steveisok, @tommcdon, @dotnet/dotnet-diag
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Pull request overview

This PR updates managed call return-value debug-info emission in the JIT so that floating-point return values are reported using the FP-specific location kind (VLT_REG_FP) with the expected 0-based FP register index, enabling the debugger to read the return value from the correct FP register.

Changes:

  • Emit FP return locations using VLT_REG_FP instead of storeVariableInRegisters(REG_FLOATRET, REG_NA) for non-x86 targets.
  • Encode the FP register as a 0-based index (REG_FLOATRET - REG_FP_FIRST) for debugger consumption.
  • Add comments documenting the VLT_REG_FP encoding expectation.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
siFillRegisterVarLoc was storing the raw JIT register number (e.g., 32
for XMM0) in vlReg.vlrReg when encoding VLT_REG_FP. The DBI expects a
0-based FP register index and adds the platform-specific base
(REGISTER_AMD64_XMM0, REGISTER_ARM64_V0, etc.) when converting to
CorDebugRegister.
Emit (GetRegNum() - REG_FP_FIRST) so the DBI computes the correct
register. Also fix eeDispVar to reconstruct the full register number
when displaying VLT_REG_FP entries in JIT dumps, and add
genIsValidIntReg asserts to storeVariableInRegisters to catch misuse
for non-integer register types.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon enabled auto-merge (squash) June 12, 2026 19:52
psiBegProlog was passing XMM/V register numbers through
storeVariableInRegisters which unconditionally encodes as VLT_REG
(integer register type). Route FP parameters to VLT_REG_FP with a
0-based FP register index instead.
For SysV x64 mixed struct passing (GPR + XMM), drop the XMM register
from VLT_REG_REG encoding since the debug info protocol cannot
represent mixed integer/FP register pairs.
Add genIsValidIntReg asserts to storeVariableInRegisters to guard
against future misuse with non-integer registers.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon disabled auto-merge June 13, 2026 01:33
CopilotAI review requested due to automatic review settings June 13, 2026 03:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
@tommcdon
tommcdon enabled auto-merge (squash) June 17, 2026 15:06
On Linux x64 (SysV ABI) and RISC-V, structs can be returned in a mix
of int and float registers (e.g. ValueTuple<double, int> returns in
XMM0 + RAX). The VLT_REG_REG encoding only supports integer registers,
so storeVariableInRegisters asserts genIsValidIntReg on these platforms.
Skip recording managed return value info for multi-reg returns that
involve float registers, since the encoding cannot represent them.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 17, 2026 21:43

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
tommcdonand others added 2 commits June 18, 2026 04:27
Add references to dotnet#129344 at both locations where
mixed int/float multi-reg returns are unsupported in VarLoc encoding.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 18, 2026 14:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
@tommcdon

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/ba-g issues are unrelated

@tommcdon
tommcdon merged commit b9d5c9f into dotnet:mainJun 18, 2026
110 of 128 checks passed
eiriktsarpalis pushed a commit that referenced this pull request Jul 15, 2026
…129321)
PR #128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of
XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Found via Visual Studio testing
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
tommcdon added a commit that referenced this pull request Jul 15, 2026
… x64 (#129992)
Adds managed-return-value (MRV) debug-info encoding for value-class
returns that live in two registers. Additionally, this change implements
CordbJITILFrame::GetNativeVariable for x86 x87 FP-stack return/local
variables (missed scenario from #129321)
Fixes#129344
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@github-actionsgithub-actionsBot locked and limited conversation to collaborators Jul 20, 2026
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, 'i'); if (__m === '*' || __re.test(location.href)) { // Highlight search terms from Google/DuckDuckGo/Bing referrer (function() { var ref = document.referrer; var terms = []; if (ref.includes('google.com') || ref.includes('duckduckgo.com') || ref.includes('bing.com')) { var url = new URL(ref); var q = url.searchParams.get('q') || url.searchParams.get('p'); if (q) { terms = q.split(/\s+/).filter(function(t) { return t.length > 2; }); } } if (terms.length === 0) return; var style = document.createElement('style'); style.textContent = '.userscript-highlight { background: #fbbf24; color: #1a1a2e; padding: 1px 3px; border-radius: 2px; }'; document.head.appendChild(style); function highlight(node) { if (node.nodeType === 3) { // text node var text = node.textContent; var found = false; terms.forEach(function(term) { var regex = new RegExp('(' + term.replace(/[.*+?^${}()|[\]\\]/g, '\\') + ')', 'gi'); if (regex.test(text)) { found = true; var frag = document.createDocumentFragment(); var parts = text.split(regex); parts.forEach(function(part, i) { if (i % 2 === 0) { frag.appendChild(document.createTextNode(part)); } else { var span = document.createElement('span'); span.className = 'userscript-highlight'; span.textContent = part; frag.appendChild(span); } }); node.parentNode.replaceChild(frag, node); } }); } else if (node.nodeType === 1 && node.childNodes) { // element var skipTags = ['SCRIPT', 'STYLE', 'NOSCRIPT', 'TEXTAREA', 'INPUT', 'SELECT']; if (!skipTags.includes(node.tagName)) { Array.from(node.childNodes).forEach(highlight); } } } highlight(document.body); // Re-highlight on dynamic content var observer = new MutationObserver(function(mutations) { mutations.forEach(function(m) { m.addedNodes.forEach(function(node) { if (node.nodeType === 1 || node.nodeType === 3) highlight(node); }); }); }); observer.observe(document.body, { childList: true, subtree: true }); })(); } } catch(__e) { console.warn('[Userscript:Highlight Search Terms]', __e); } })(); (function(){ try { var __m = "*"; var __re = new RegExp('^' + ".*" + ' JIT: Fix managed return value debug info for floating-point returns by tommcdon · Pull Request #129321 · dotnet/runtime · GitHub
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JIT: Fix managed return value debug info for floating-point returns - #129321

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tommcdon merged 7 commits into
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tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info
Jun 18, 2026
Merged

JIT: Fix managed return value debug info for floating-point returns#129321
tommcdon merged 7 commits into
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tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info

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PR #128479 introduced emitting managed return values as native vars but used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns, which sets vlType=VLT_REG (integer register). The DBI then fails to read the return value because it looks in an integer register instead of XMM0.

Fix by using VLT_REG_FP with a 0-based FP register index, which is what the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to convert to CorDebugRegister).

Found via Visual Studio testing

PR dotnet#128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdontommcdon added this to the 11.0.0 milestone Jun 12, 2026
@tommcdontommcdon self-assigned this Jun 12, 2026
CopilotAI review requested due to automatic review settings June 12, 2026 12:17
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Pull request overview

This PR updates managed call return-value debug-info emission in the JIT so that floating-point return values are reported using the FP-specific location kind (VLT_REG_FP) with the expected 0-based FP register index, enabling the debugger to read the return value from the correct FP register.

Changes:

  • Emit FP return locations using VLT_REG_FP instead of storeVariableInRegisters(REG_FLOATRET, REG_NA) for non-x86 targets.
  • Encode the FP register as a 0-based index (REG_FLOATRET - REG_FP_FIRST) for debugger consumption.
  • Add comments documenting the VLT_REG_FP encoding expectation.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
siFillRegisterVarLoc was storing the raw JIT register number (e.g., 32
for XMM0) in vlReg.vlrReg when encoding VLT_REG_FP. The DBI expects a
0-based FP register index and adds the platform-specific base
(REGISTER_AMD64_XMM0, REGISTER_ARM64_V0, etc.) when converting to
CorDebugRegister.
Emit (GetRegNum() - REG_FP_FIRST) so the DBI computes the correct
register. Also fix eeDispVar to reconstruct the full register number
when displaying VLT_REG_FP entries in JIT dumps, and add
genIsValidIntReg asserts to storeVariableInRegisters to catch misuse
for non-integer register types.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon enabled auto-merge (squash) June 12, 2026 19:52
psiBegProlog was passing XMM/V register numbers through
storeVariableInRegisters which unconditionally encodes as VLT_REG
(integer register type). Route FP parameters to VLT_REG_FP with a
0-based FP register index instead.
For SysV x64 mixed struct passing (GPR + XMM), drop the XMM register
from VLT_REG_REG encoding since the debug info protocol cannot
represent mixed integer/FP register pairs.
Add genIsValidIntReg asserts to storeVariableInRegisters to guard
against future misuse with non-integer registers.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon disabled auto-merge June 13, 2026 01:33
CopilotAI review requested due to automatic review settings June 13, 2026 03:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
@tommcdon
tommcdon enabled auto-merge (squash) June 17, 2026 15:06
On Linux x64 (SysV ABI) and RISC-V, structs can be returned in a mix
of int and float registers (e.g. ValueTuple<double, int> returns in
XMM0 + RAX). The VLT_REG_REG encoding only supports integer registers,
so storeVariableInRegisters asserts genIsValidIntReg on these platforms.
Skip recording managed return value info for multi-reg returns that
involve float registers, since the encoding cannot represent them.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 17, 2026 21:43

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
tommcdonand others added 2 commits June 18, 2026 04:27
Add references to dotnet#129344 at both locations where
mixed int/float multi-reg returns are unsupported in VarLoc encoding.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 18, 2026 14:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
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/ba-g issues are unrelated

@tommcdon
tommcdon merged commit b9d5c9f into dotnet:mainJun 18, 2026
110 of 128 checks passed
eiriktsarpalis pushed a commit that referenced this pull request Jul 15, 2026
…129321)
PR #128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of
XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Found via Visual Studio testing
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
tommcdon added a commit that referenced this pull request Jul 15, 2026
… x64 (#129992)
Adds managed-return-value (MRV) debug-info encoding for value-class
returns that live in two registers. Additionally, this change implements
CordbJITILFrame::GetNativeVariable for x86 x87 FP-stack return/local
variables (missed scenario from #129321)
Fixes#129344
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@github-actionsgithub-actionsBot locked and limited conversation to collaborators Jul 20, 2026
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JIT: Fix managed return value debug info for floating-point returns - #129321

Merged
tommcdon merged 7 commits into
dotnet:mainfrom
tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info
Jun 18, 2026
Merged

JIT: Fix managed return value debug info for floating-point returns#129321
tommcdon merged 7 commits into
dotnet:mainfrom
tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info

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PR #128479 introduced emitting managed return values as native vars but used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns, which sets vlType=VLT_REG (integer register). The DBI then fails to read the return value because it looks in an integer register instead of XMM0.

Fix by using VLT_REG_FP with a 0-based FP register index, which is what the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to convert to CorDebugRegister).

Found via Visual Studio testing

PR dotnet#128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdontommcdon added this to the 11.0.0 milestone Jun 12, 2026
@tommcdontommcdon self-assigned this Jun 12, 2026
CopilotAI review requested due to automatic review settings June 12, 2026 12:17
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Pull request overview

This PR updates managed call return-value debug-info emission in the JIT so that floating-point return values are reported using the FP-specific location kind (VLT_REG_FP) with the expected 0-based FP register index, enabling the debugger to read the return value from the correct FP register.

Changes:

  • Emit FP return locations using VLT_REG_FP instead of storeVariableInRegisters(REG_FLOATRET, REG_NA) for non-x86 targets.
  • Encode the FP register as a 0-based index (REG_FLOATRET - REG_FP_FIRST) for debugger consumption.
  • Add comments documenting the VLT_REG_FP encoding expectation.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
siFillRegisterVarLoc was storing the raw JIT register number (e.g., 32
for XMM0) in vlReg.vlrReg when encoding VLT_REG_FP. The DBI expects a
0-based FP register index and adds the platform-specific base
(REGISTER_AMD64_XMM0, REGISTER_ARM64_V0, etc.) when converting to
CorDebugRegister.
Emit (GetRegNum() - REG_FP_FIRST) so the DBI computes the correct
register. Also fix eeDispVar to reconstruct the full register number
when displaying VLT_REG_FP entries in JIT dumps, and add
genIsValidIntReg asserts to storeVariableInRegisters to catch misuse
for non-integer register types.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon enabled auto-merge (squash) June 12, 2026 19:52
psiBegProlog was passing XMM/V register numbers through
storeVariableInRegisters which unconditionally encodes as VLT_REG
(integer register type). Route FP parameters to VLT_REG_FP with a
0-based FP register index instead.
For SysV x64 mixed struct passing (GPR + XMM), drop the XMM register
from VLT_REG_REG encoding since the debug info protocol cannot
represent mixed integer/FP register pairs.
Add genIsValidIntReg asserts to storeVariableInRegisters to guard
against future misuse with non-integer registers.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon disabled auto-merge June 13, 2026 01:33
CopilotAI review requested due to automatic review settings June 13, 2026 03:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
@tommcdon
tommcdon enabled auto-merge (squash) June 17, 2026 15:06
On Linux x64 (SysV ABI) and RISC-V, structs can be returned in a mix
of int and float registers (e.g. ValueTuple<double, int> returns in
XMM0 + RAX). The VLT_REG_REG encoding only supports integer registers,
so storeVariableInRegisters asserts genIsValidIntReg on these platforms.
Skip recording managed return value info for multi-reg returns that
involve float registers, since the encoding cannot represent them.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 17, 2026 21:43

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
tommcdonand others added 2 commits June 18, 2026 04:27
Add references to dotnet#129344 at both locations where
mixed int/float multi-reg returns are unsupported in VarLoc encoding.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 18, 2026 14:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
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/ba-g issues are unrelated

@tommcdon
tommcdon merged commit b9d5c9f into dotnet:mainJun 18, 2026
110 of 128 checks passed
eiriktsarpalis pushed a commit that referenced this pull request Jul 15, 2026
…129321)
PR #128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of
XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Found via Visual Studio testing
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
tommcdon added a commit that referenced this pull request Jul 15, 2026
… x64 (#129992)
Adds managed-return-value (MRV) debug-info encoding for value-class
returns that live in two registers. Additionally, this change implements
CordbJITILFrame::GetNativeVariable for x86 x87 FP-stack return/local
variables (missed scenario from #129321)
Fixes#129344
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@github-actionsgithub-actionsBot locked and limited conversation to collaborators Jul 20, 2026
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, 'i'); if (__m === '*' || __re.test(location.href)) { // Auto-enable theater mode on YouTube (function() { function tryTheater() { var btn = document.querySelector('button[aria-label="Theater mode"], ytd-player #player button[title="Theater mode"]'); if (btn && !btn.classList.contains('activated')) { btn.click(); } } // Try immediately tryTheater(); // Try after navigation (SPA) var lastUrl = location.href; setInterval(function() { if (location.href !== lastUrl) { lastUrl = location.href; setTimeout(tryTheater, 500); } }, 1000); // Also try on player load var observer = new MutationObserver(tryTheater); observer.observe(document.body, { childList: true, subtree: true }); })(); } } catch(__e) { console.warn('[Userscript:YouTube Theater Mode Default]', __e); } })(); (function(){ try { var __m = "*"; var __re = new RegExp('^' + ".*" + ' JIT: Fix managed return value debug info for floating-point returns by tommcdon · Pull Request #129321 · dotnet/runtime · GitHub
Skip to content

JIT: Fix managed return value debug info for floating-point returns - #129321

Merged
tommcdon merged 7 commits into
dotnet:mainfrom
tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info
Jun 18, 2026
Merged

JIT: Fix managed return value debug info for floating-point returns#129321
tommcdon merged 7 commits into
dotnet:mainfrom
tommcdon:dev/tommcdon/fix-mrv-float-return-value-debug-info

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PR #128479 introduced emitting managed return values as native vars but used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns, which sets vlType=VLT_REG (integer register). The DBI then fails to read the return value because it looks in an integer register instead of XMM0.

Fix by using VLT_REG_FP with a 0-based FP register index, which is what the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to convert to CorDebugRegister).

Found via Visual Studio testing

PR dotnet#128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdontommcdon added this to the 11.0.0 milestone Jun 12, 2026
@tommcdontommcdon self-assigned this Jun 12, 2026
CopilotAI review requested due to automatic review settings June 12, 2026 12:17
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Pull request overview

This PR updates managed call return-value debug-info emission in the JIT so that floating-point return values are reported using the FP-specific location kind (VLT_REG_FP) with the expected 0-based FP register index, enabling the debugger to read the return value from the correct FP register.

Changes:

  • Emit FP return locations using VLT_REG_FP instead of storeVariableInRegisters(REG_FLOATRET, REG_NA) for non-x86 targets.
  • Encode the FP register as a 0-based index (REG_FLOATRET - REG_FP_FIRST) for debugger consumption.
  • Add comments documenting the VLT_REG_FP encoding expectation.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
siFillRegisterVarLoc was storing the raw JIT register number (e.g., 32
for XMM0) in vlReg.vlrReg when encoding VLT_REG_FP. The DBI expects a
0-based FP register index and adds the platform-specific base
(REGISTER_AMD64_XMM0, REGISTER_ARM64_V0, etc.) when converting to
CorDebugRegister.
Emit (GetRegNum() - REG_FP_FIRST) so the DBI computes the correct
register. Also fix eeDispVar to reconstruct the full register number
when displaying VLT_REG_FP entries in JIT dumps, and add
genIsValidIntReg asserts to storeVariableInRegisters to catch misuse
for non-integer register types.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon enabled auto-merge (squash) June 12, 2026 19:52
psiBegProlog was passing XMM/V register numbers through
storeVariableInRegisters which unconditionally encodes as VLT_REG
(integer register type). Route FP parameters to VLT_REG_FP with a
0-based FP register index instead.
For SysV x64 mixed struct passing (GPR + XMM), drop the XMM register
from VLT_REG_REG encoding since the debug info protocol cannot
represent mixed integer/FP register pairs.
Add genIsValidIntReg asserts to storeVariableInRegisters to guard
against future misuse with non-integer registers.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon disabled auto-merge June 13, 2026 01:33
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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
@tommcdon
tommcdon enabled auto-merge (squash) June 17, 2026 15:06
On Linux x64 (SysV ABI) and RISC-V, structs can be returned in a mix
of int and float registers (e.g. ValueTuple<double, int> returns in
XMM0 + RAX). The VLT_REG_REG encoding only supports integer registers,
so storeVariableInRegisters asserts genIsValidIntReg on these platforms.
Skip recording managed return value info for multi-reg returns that
involve float registers, since the encoding cannot represent them.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 17, 2026 21:43

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
tommcdonand others added 2 commits June 18, 2026 04:27
Add references to dotnet#129344 at both locations where
mixed int/float multi-reg returns are unsupported in VarLoc encoding.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 18, 2026 14:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
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/ba-g issues are unrelated

@tommcdon
tommcdon merged commit b9d5c9f into dotnet:mainJun 18, 2026
110 of 128 checks passed
eiriktsarpalis pushed a commit that referenced this pull request Jul 15, 2026
…129321)
PR #128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of
XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Found via Visual Studio testing
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
tommcdon added a commit that referenced this pull request Jul 15, 2026
… x64 (#129992)
Adds managed-return-value (MRV) debug-info encoding for value-class
returns that live in two registers. Additionally, this change implements
CordbJITILFrame::GetNativeVariable for x86 x87 FP-stack return/local
variables (missed scenario from #129321)
Fixes#129344
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@github-actionsgithub-actionsBot locked and limited conversation to collaborators Jul 20, 2026
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, 'i'); if (__m === '*' || __re.test(location.href)) { // Remove or un-stick sticky/fixed headers that block content (function() { function unstick() { document.querySelectorAll('header, nav, [role="banner"], .header, .navbar, .sticky, .fixed-top, [style*="position: fixed"], [style*="position:sticky"]').forEach(function(el) { if (el.style.position === 'fixed' || el.style.position === 'sticky' || getComputedStyle(el).position === 'fixed' || getComputedStyle(el).position === 'sticky') { el.style.position = 'static'; el.style.top = 'auto'; el.style.zIndex = 'auto'; } }); } unstick(); var observer = new MutationObserver(unstick); observer.observe(document.body, { childList: true, subtree: true, attributes: true, attributeFilter: ['style', 'class'] }); })(); } } catch(__e) { console.warn('[Userscript:Kill Sticky Headers]', __e); } })(); })(); JIT: Fix managed return value debug info for floating-point returns by tommcdon · Pull Request #129321 · dotnet/runtime · GitHub
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JIT: Fix managed return value debug info for floating-point returns - #129321

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Jun 18, 2026
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JIT: Fix managed return value debug info for floating-point returns#129321
tommcdon merged 7 commits into
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PR #128479 introduced emitting managed return values as native vars but used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns, which sets vlType=VLT_REG (integer register). The DBI then fails to read the return value because it looks in an integer register instead of XMM0.

Fix by using VLT_REG_FP with a 0-based FP register index, which is what the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to convert to CorDebugRegister).

Found via Visual Studio testing

PR dotnet#128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdontommcdon added this to the 11.0.0 milestone Jun 12, 2026
@tommcdontommcdon self-assigned this Jun 12, 2026
CopilotAI review requested due to automatic review settings June 12, 2026 12:17
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Pull request overview

This PR updates managed call return-value debug-info emission in the JIT so that floating-point return values are reported using the FP-specific location kind (VLT_REG_FP) with the expected 0-based FP register index, enabling the debugger to read the return value from the correct FP register.

Changes:

  • Emit FP return locations using VLT_REG_FP instead of storeVariableInRegisters(REG_FLOATRET, REG_NA) for non-x86 targets.
  • Encode the FP register as a 0-based index (REG_FLOATRET - REG_FP_FIRST) for debugger consumption.
  • Add comments documenting the VLT_REG_FP encoding expectation.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
siFillRegisterVarLoc was storing the raw JIT register number (e.g., 32
for XMM0) in vlReg.vlrReg when encoding VLT_REG_FP. The DBI expects a
0-based FP register index and adds the platform-specific base
(REGISTER_AMD64_XMM0, REGISTER_ARM64_V0, etc.) when converting to
CorDebugRegister.
Emit (GetRegNum() - REG_FP_FIRST) so the DBI computes the correct
register. Also fix eeDispVar to reconstruct the full register number
when displaying VLT_REG_FP entries in JIT dumps, and add
genIsValidIntReg asserts to storeVariableInRegisters to catch misuse
for non-integer register types.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon enabled auto-merge (squash) June 12, 2026 19:52
psiBegProlog was passing XMM/V register numbers through
storeVariableInRegisters which unconditionally encodes as VLT_REG
(integer register type). Route FP parameters to VLT_REG_FP with a
0-based FP register index instead.
For SysV x64 mixed struct passing (GPR + XMM), drop the XMM register
from VLT_REG_REG encoding since the debug info protocol cannot
represent mixed integer/FP register pairs.
Add genIsValidIntReg asserts to storeVariableInRegisters to guard
against future misuse with non-integer registers.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@tommcdon
tommcdon disabled auto-merge June 13, 2026 01:33
CopilotAI review requested due to automatic review settings June 13, 2026 03:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.

Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
@tommcdon
tommcdon enabled auto-merge (squash) June 17, 2026 15:06
On Linux x64 (SysV ABI) and RISC-V, structs can be returned in a mix
of int and float registers (e.g. ValueTuple<double, int> returns in
XMM0 + RAX). The VLT_REG_REG encoding only supports integer registers,
so storeVariableInRegisters asserts genIsValidIntReg on these platforms.
Skip recording managed return value info for multi-reg returns that
involve float registers, since the encoding cannot represent them.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 17, 2026 21:43

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
tommcdonand others added 2 commits June 18, 2026 04:27
Add references to dotnet#129344 at both locations where
mixed int/float multi-reg returns are unsupported in VarLoc encoding.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
CopilotAI review requested due to automatic review settings June 18, 2026 14:06

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Pull request overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 5 comments.

Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/scopeinfo.cpp
Comment threadsrc/coreclr/jit/codegencommon.cpp
@tommcdon

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/ba-g issues are unrelated

@tommcdon
tommcdon merged commit b9d5c9f into dotnet:mainJun 18, 2026
110 of 128 checks passed
eiriktsarpalis pushed a commit that referenced this pull request Jul 15, 2026
…129321)
PR #128479 introduced emitting managed return values as native vars but
used storeVariableInRegisters(REG_FLOATRET, REG_NA) for float returns,
which sets vlType=VLT_REG (integer register). The DBI then fails to read
the return value because it looks in an integer register instead of
XMM0.
Fix by using VLT_REG_FP with a 0-based FP register index, which is what
the DBI's VLT_REG_FP handler expects (it adds REGISTER_AMD64_XMM0 to
convert to CorDebugRegister).
Found via Visual Studio testing
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
tommcdon added a commit that referenced this pull request Jul 15, 2026
… x64 (#129992)
Adds managed-return-value (MRV) debug-info encoding for value-class
returns that live in two registers. Additionally, this change implements
CordbJITILFrame::GetNativeVariable for x86 x87 FP-stack return/local
variables (missed scenario from #129321)
Fixes#129344
---------
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
@github-actionsgithub-actionsBot locked and limited conversation to collaborators Jul 20, 2026
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Successfully merging this pull request may close these issues.

7 participants

@tommcdon@steveisok@jkotas@jakobbotsch@tannergooding@rcj1