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JIT: fold wasm local address frame offsets into store memargs - #132100
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Stores to locals that are not register candidates are rewritten into STOREIND(GT_LCL_ADDR, value) by the wasm register allocator. Flag these during lowering when the indirection can handle the offset, so codegen emits just the frame pointer and the store adds the offset. SPC R2R code section: 15,820,359 -> 14,953,402 bytes (-5.48%). Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
AndyAyersMS
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Aug 10, 2026
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@adamperlin PTAL |
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Pull request overview
Optimizes WebAssembly JIT codegen for stack-local stores/loads by allowing frame offsets from GT_LCL_ADDR to be encoded directly in the indirection’s memarg, reducing emitted instruction count and improving code size.
Changes:
- Introduces a WASM-only
LIR::Flags::FoldedAddrto markGT_LCL_ADDRnodes whose frame offset is folded into an indirection memarg. - Updates WASM lowering to set
FoldedAddrfor eligibleGT_IND/GT_STOREINDnodes that use a single-use, invariantGT_LCL_ADDR. - Updates WASM codegen to (1) emit only the frame pointer for folded
GT_LCL_ADDRand (2) centralize memarg offset selection viagenWasmMemargOffset.
Reviewed changes
Copilot reviewed 6 out of 6 changed files in this pull request and generated no comments.
Show a summary per file
| File | Description |
|---|---|
| src/coreclr/jit/regallocwasm.cpp | Removes outdated TODO now that address offset folding is implemented in lowering/codegen. |
| src/coreclr/jit/lowerwasm.cpp | Adds TryFoldLclAddrOffset and wires it into indirection containment to mark foldable GT_LCL_ADDR. |
| src/coreclr/jit/lower.h | Declares Lowering::TryFoldLclAddrOffset under TARGET_WASM. |
| src/coreclr/jit/lir.h | Adds WASM-only LIR::Flags::FoldedAddr bit for folded local addresses. |
| src/coreclr/jit/codegenwasm.cpp | Implements folded GT_LCL_ADDR emission and shared memarg-offset computation for loads/stores. |
| src/coreclr/jit/codegen.h | Declares CodeGen::genWasmMemargOffset under TARGET_WASM. |
This was referenced Aug 11, 2026
adamperlin
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Aug 11, 2026
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adamperlin
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Aug 11, 2026
adamperlin
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I think this looks good to me overall. I don't mind the use of the LIR flag here; it seems like an ok tradeoff to make this a less expansive change.
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Stores to locals that are not register candidates are rewritten into STOREIND(GT_LCL_ADDR, value) by the wasm register allocator. Flag these during lowering when the indirection can handle the offset, so codegen emits just the frame pointer and the store adds the offset.
SPC R2R code section: 15,820,359 -> 14,953,402 bytes (-5.48%).