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Fixes an issue with FeatureSIMD=0 and ArmBase.Yield - #62351

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echesakov merged 3 commits into
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echesakov:Runtime_62117
Dec 4, 2021
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Fixes an issue with FeatureSIMD=0 and ArmBase.Yield#62351
echesakov merged 3 commits into
dotnet:mainfrom
echesakov:Runtime_62117

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@echesakov

@echesakovechesakov commented Dec 3, 2021

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The issue is that ArmBase.Yield is not expanding as intrinsic when FeatureSIMD=0.
This shouldn't be a case.

In addition, this marks the intrinsic with HW_Flag_NoFloatingPointUsed.

Fixes#62117

…nsic and simplify the remaining logic in src/coreclr/jit/hwintrinsicarm64.cpp
@ghostghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Dec 3, 2021
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ghost commented Dec 3, 2021

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Fixes #62117

Author:echesakovMSFT
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area-CodeGen-coreclr

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@dotnet/jit-contrib @tannergooding PTAL

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/azp run runtime-coreclr jitstress-isas-arm

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Comment threadsrc/coreclr/jit/hwintrinsicarm64.cpp
@echesakov
echesakov merged commit 03b2885 into dotnet:mainDec 4, 2021
@echesakov
echesakov deleted the Runtime_62117 branch December 4, 2021 23:11
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arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI

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Successfully merging this pull request may close these issues.

Test failure: JIT/HardwareIntrinsics/Arm/ArmBase/Yield_r* on Arm64

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@echesakov@tannergooding@BruceForstall