Ensure that InstructionSetFlags are correctly fixed up for unmatched VM

[tannergooding]

This resolves#41518 by ensuring that the JIT correctly fixes up the instruction set flags for unmatched VMs in both directions.

This allows developers to use an altJIT to debug, diagnose, and get generally accurate disassembly when working on a different architecture (such as more easily diagnosing ARM64 codegen on an x64 machine). This should be technically extensible to altJIT on the same architecture as well (i.e. we should be able to extend this so that you could use a x64 altJit to get AVX2 codegen on a machine without AVX support).

This should also allow tooling, such as @EgorBo's https://github.com/EgorBo/Disasmo, to provide disassembly for other architectures or even SxS views of different ISAs/architectures.

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Issue Details

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This resolves #41518 by ensuring that the JIT correctly fixes up the instruction set flags for unmatched VMs in both directions.

This allows developers to use an altJIT to debug, diagnose, and get generally accurate disassembly when working on a different architecture (such as more easily diagnosing ARM64 codegen on an x64 machine). This should be technically extensible to altJIT on the same architecture as well (i.e. we should be able to extend this so that you could use a x64 altJit to get AVX2 codegen on a machine without AVX support).

This should also allow tooling, such as @EgorBo's https://github.com/EgorBo/Disasmo, to provide disassembly for other architectures or even SxS views of different ISAs/architectures.

Author:	tannergooding
Assignees:	-
Labels:	area-CodeGen-coreclr
Milestone:	-

[tannergooding]

CC. @davidwrighton; would be good if you could review this since it modifies the logic you originally added.

I'd expect this is never hit for Crossgen/Crossgen2/R2R or NativeAOT as they should all have matching VMs and so I'd expect this is largely just hit for AltJit, is that correct?

Is there a different or better check we could do to ensure this covers "any altJit" (such as x64 on x64 even) and still ensure we don't impact the scenarios we shouldn't?

Should we add a comment explicitly clarifying this consideration (that this shouldn't impact CG2/R2R/NAOT)?

[tannergooding]

This is done and ready for review. It's going to need @davidwrighton to take a look when he has time.

[danmoseley]

Is this still waiting on @davidwrighton ?

[tannergooding]

Yes. It needs review/sign-off that there are no missed corner/edge cases around the logic and CG2

[davidwrighton]

LGTM, Sorry about the delay, I didn't realize that this was waiting on me. I assume you've validated that crossgen2 is never affected by this?

[tannergooding]

I assume you've validated that crossgen2 is never affected by this?

As best as I can tell, that's correct. I'm not 100% however hence why I tagged you on #64158 (comment)

[tannergooding]

Pushed a merge commit with dotnet/main. CI needs to rerun since its been over a month.