JIT ARM32: Force tailcall nullchecks with LR - #68107

Merged
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck
Apr 18, 2022
Merged

JIT ARM32: Force tailcall nullchecks with LR#68107
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck

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@jakobbotsch

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For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix#66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Apr 16, 2022
@ghost

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Tagging subscribers to this area: @JulieLeeMSFT
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Issue Details

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix #66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

Author:jakobbotsch
Assignees:-
Labels:

area-CodeGen-coreclr

Milestone:-

Comment threadsrc/coreclr/jit/lsraarmarch.cpp

@kunalspathakkunalspathak left a comment

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LGTM

@kunalspathak
kunalspathak merged commit 928bd97 into dotnet:mainApr 18, 2022
directhex pushed a commit to directhex/runtime that referenced this pull request Apr 21, 2022
For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost locked as resolved and limited conversation to collaborators May 18, 2022
Sign up for freeto subscribe to this conversation on GitHub. Already have an account? Sign in.

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Test failure JIT/Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.sh

2 participants

@jakobbotsch@kunalspathak
, 'i'); if (__m === '*' || __re.test(location.href)) { injectUserscript("// Add copy buttons to all
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}
} catch(__e) { console.warn('[Userscript:Add Copy Buttons to Code Blocks]', __e); }
})();
(function(){
try {
var __m = "github.com";
var __re = new RegExp('^' + "github\\.com" + '
Skip to content

JIT ARM32: Force tailcall nullchecks with LR - #68107

Merged
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck
Apr 18, 2022
Merged

JIT ARM32: Force tailcall nullchecks with LR#68107
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck

Conversation

@jakobbotsch

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For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix#66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Apr 16, 2022
@ghost

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Tagging subscribers to this area: @JulieLeeMSFT
See info in area-owners.md if you want to be subscribed.

Issue Details

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix #66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

Author:jakobbotsch
Assignees:-
Labels:

area-CodeGen-coreclr

Milestone:-

Comment threadsrc/coreclr/jit/lsraarmarch.cpp

@kunalspathakkunalspathak left a comment

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LGTM

@kunalspathak
kunalspathak merged commit 928bd97 into dotnet:mainApr 18, 2022
directhex pushed a commit to directhex/runtime that referenced this pull request Apr 21, 2022
For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost locked as resolved and limited conversation to collaborators May 18, 2022
Sign up for freeto subscribe to this conversation on GitHub. Already have an account? Sign in.

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area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI

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Development

Successfully merging this pull request may close these issues.

Test failure JIT/Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.sh

2 participants

@jakobbotsch@kunalspathak
, 'i'); if (__m === '*' || __re.test(location.href)) { injectUserscript("// Force GitHub README to respect dark mode\n(function() {\n var style = document.createElement('style');\n style.textContent = '\n .markdown-body {\n color-scheme: dark light;\n }\n .markdown-body pre { background: #161b22 !important; }\n .markdown-body code { background: rgba(110, 118, 129, 0.4) !important; }\n .markdown-body table th, .markdown-body table td { border-color: #30363d !important; }\n .markdown-body img { background: #0d1117; }\n .markdown-body blockquote { border-left-color: #8b949e; }\n .markdown-body hr { border-color: #30363d; }\n ';\n document.head.appendChild(style);\n})();", "GitHub Dark Mode README Fix"); } } catch(__e) { console.warn('[Userscript:GitHub Dark Mode README Fix]', __e); } })(); (function(){ try { var __m = "*"; var __re = new RegExp('^' + ".*" + '
Skip to content

JIT ARM32: Force tailcall nullchecks with LR - #68107

Merged
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck
Apr 18, 2022
Merged

JIT ARM32: Force tailcall nullchecks with LR#68107
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck

Conversation

@jakobbotsch

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Member

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix#66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Apr 16, 2022
@ghost

Copy link
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Tagging subscribers to this area: @JulieLeeMSFT
See info in area-owners.md if you want to be subscribed.

Issue Details

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix #66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

Author:jakobbotsch
Assignees:-
Labels:

area-CodeGen-coreclr

Milestone:-

Comment threadsrc/coreclr/jit/lsraarmarch.cpp

@kunalspathakkunalspathak left a comment

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LGTM

@kunalspathak
kunalspathak merged commit 928bd97 into dotnet:mainApr 18, 2022
directhex pushed a commit to directhex/runtime that referenced this pull request Apr 21, 2022
For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost locked as resolved and limited conversation to collaborators May 18, 2022
Sign up for freeto subscribe to this conversation on GitHub. Already have an account? Sign in.

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Successfully merging this pull request may close these issues.

Test failure JIT/Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.sh

2 participants

@jakobbotsch@kunalspathak
, 'i'); if (__m === '*' || __re.test(location.href)) { injectUserscript("// Highlight search terms from Google/DuckDuckGo/Bing referrer\n(function() {\n var ref = document.referrer;\n var terms = [];\n \n if (ref.includes('google.com') || ref.includes('duckduckgo.com') || ref.includes('bing.com')) {\n var url = new URL(ref);\n var q = url.searchParams.get('q') || url.searchParams.get('p');\n if (q) {\n terms = q.split(/\\s+/).filter(function(t) { return t.length > 2; });\n }\n }\n \n if (terms.length === 0) return;\n \n var style = document.createElement('style');\n style.textContent = '.userscript-highlight { background: #fbbf24; color: #1a1a2e; padding: 1px 3px; border-radius: 2px; }';\n document.head.appendChild(style);\n \n function highlight(node) {\n if (node.nodeType === 3) { // text node\n var text = node.textContent;\n var found = false;\n terms.forEach(function(term) {\n var regex = new RegExp('(' + term.replace(/[.*+?^${}()|[\\]\\\\]/g, '\\\\') + ')', 'gi');\n if (regex.test(text)) {\n found = true;\n var frag = document.createDocumentFragment();\n var parts = text.split(regex);\n parts.forEach(function(part, i) {\n if (i % 2 === 0) {\n frag.appendChild(document.createTextNode(part));\n } else {\n var span = document.createElement('span');\n span.className = 'userscript-highlight';\n span.textContent = part;\n frag.appendChild(span);\n }\n });\n node.parentNode.replaceChild(frag, node);\n }\n });\n } else if (node.nodeType === 1 && node.childNodes) { // element\n var skipTags = ['SCRIPT', 'STYLE', 'NOSCRIPT', 'TEXTAREA', 'INPUT', 'SELECT'];\n if (!skipTags.includes(node.tagName)) {\n Array.from(node.childNodes).forEach(highlight);\n }\n }\n }\n \n highlight(document.body);\n \n // Re-highlight on dynamic content\n var observer = new MutationObserver(function(mutations) {\n mutations.forEach(function(m) {\n m.addedNodes.forEach(function(node) {\n if (node.nodeType === 1 || node.nodeType === 3) highlight(node);\n });\n });\n });\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Highlight Search Terms"); } } catch(__e) { console.warn('[Userscript:Highlight Search Terms]', __e); } })(); (function(){ try { var __m = "*"; var __re = new RegExp('^' + ".*" + '
Skip to content

JIT ARM32: Force tailcall nullchecks with LR - #68107

Merged
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck
Apr 18, 2022
Merged

JIT ARM32: Force tailcall nullchecks with LR#68107
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck

Conversation

@jakobbotsch

Copy link
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Member

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix#66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Apr 16, 2022
@ghost

Copy link
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Tagging subscribers to this area: @JulieLeeMSFT
See info in area-owners.md if you want to be subscribed.

Issue Details

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix #66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

Author:jakobbotsch
Assignees:-
Labels:

area-CodeGen-coreclr

Milestone:-

Comment threadsrc/coreclr/jit/lsraarmarch.cpp

@kunalspathakkunalspathak left a comment

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LGTM

@kunalspathak
kunalspathak merged commit 928bd97 into dotnet:mainApr 18, 2022
directhex pushed a commit to directhex/runtime that referenced this pull request Apr 21, 2022
For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost locked as resolved and limited conversation to collaborators May 18, 2022
Sign up for freeto subscribe to this conversation on GitHub. Already have an account? Sign in.

Labels

area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI

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Development

Successfully merging this pull request may close these issues.

Test failure JIT/Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.sh

2 participants

@jakobbotsch@kunalspathak
, 'i'); if (__m === '*' || __re.test(location.href)) { injectUserscript("// Strip utm_, fbclid, gclid, etc. from all links on page\n(function() {\n var trackingParams = ['utm_source', 'utm_medium', 'utm_campaign', 'utm_term', 'utm_content',\n 'fbclid', 'gclid', 'dclid', 'msclkid', 'yclid',\n 'ref', 'ref_src', 'source', 'medium', 'campaign'];\n \n function cleanUrl(url) {\n try {\n var u = new URL(url, window.location.origin);\n var changed = false;\n trackingParams.forEach(function(p) {\n if (u.searchParams.has(p)) {\n u.searchParams.delete(p);\n changed = true;\n }\n });\n return changed ? u.toString() : url;\n } catch (e) {\n return url;\n }\n }\n \n function cleanLinks() {\n document.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n \n cleanLinks();\n \n var observer = new MutationObserver(function(mutations) {\n mutations.forEach(function(m) {\n m.addedNodes.forEach(function(node) {\n if (node.nodeType === 1) {\n if (node.tagName === 'A') cleanLinks();\n node.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n });\n });\n });\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Remove Tracking Parameters from Links"); } } catch(__e) { console.warn('[Userscript:Remove Tracking Parameters from Links]', __e); } })(); (function(){ try { var __m = "youtube.com"; var __re = new RegExp('^' + "youtube\\.com" + '
Skip to content

JIT ARM32: Force tailcall nullchecks with LR - #68107

Merged
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck
Apr 18, 2022
Merged

JIT ARM32: Force tailcall nullchecks with LR#68107
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck

Conversation

@jakobbotsch

Copy link
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Member

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix#66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Apr 16, 2022
@ghost

Copy link
Copy Markdown

Tagging subscribers to this area: @JulieLeeMSFT
See info in area-owners.md if you want to be subscribed.

Issue Details

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix #66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

Author:jakobbotsch
Assignees:-
Labels:

area-CodeGen-coreclr

Milestone:-

Comment threadsrc/coreclr/jit/lsraarmarch.cpp

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LGTM

@kunalspathak
kunalspathak merged commit 928bd97 into dotnet:mainApr 18, 2022
directhex pushed a commit to directhex/runtime that referenced this pull request Apr 21, 2022
For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost locked as resolved and limited conversation to collaborators May 18, 2022
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Test failure JIT/Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.sh

2 participants

@jakobbotsch@kunalspathak
, 'i'); if (__m === '*' || __re.test(location.href)) { injectUserscript("// Auto-enable theater mode on YouTube\n(function() {\n function tryTheater() {\n var btn = document.querySelector('button[aria-label=\"Theater mode\"], ytd-player #player button[title=\"Theater mode\"]');\n if (btn && !btn.classList.contains('activated')) {\n btn.click();\n }\n }\n \n // Try immediately\n tryTheater();\n \n // Try after navigation (SPA)\n var lastUrl = location.href;\n setInterval(function() {\n if (location.href !== lastUrl) {\n lastUrl = location.href;\n setTimeout(tryTheater, 500);\n }\n }, 1000);\n \n // Also try on player load\n var observer = new MutationObserver(tryTheater);\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "YouTube Theater Mode Default"); } } catch(__e) { console.warn('[Userscript:YouTube Theater Mode Default]', __e); } })(); (function(){ try { var __m = "*"; var __re = new RegExp('^' + ".*" + '
Skip to content

JIT ARM32: Force tailcall nullchecks with LR - #68107

Merged
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck
Apr 18, 2022
Merged

JIT ARM32: Force tailcall nullchecks with LR#68107
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck

Conversation

@jakobbotsch

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For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix#66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Apr 16, 2022
@ghost

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Tagging subscribers to this area: @JulieLeeMSFT
See info in area-owners.md if you want to be subscribed.

Issue Details

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix #66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

Author:jakobbotsch
Assignees:-
Labels:

area-CodeGen-coreclr

Milestone:-

Comment threadsrc/coreclr/jit/lsraarmarch.cpp

@kunalspathakkunalspathak left a comment

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LGTM

@kunalspathak
kunalspathak merged commit 928bd97 into dotnet:mainApr 18, 2022
directhex pushed a commit to directhex/runtime that referenced this pull request Apr 21, 2022
For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost locked as resolved and limited conversation to collaborators May 18, 2022
Sign up for freeto subscribe to this conversation on GitHub. Already have an account? Sign in.

Labels

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Successfully merging this pull request may close these issues.

Test failure JIT/Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.sh

2 participants

@jakobbotsch@kunalspathak
, 'i'); if (__m === '*' || __re.test(location.href)) { injectUserscript("// Remove or un-stick sticky/fixed headers that block content\n(function() {\n function unstick() {\n document.querySelectorAll('header, nav, [role=\"banner\"], .header, .navbar, .sticky, .fixed-top, [style*=\"position: fixed\"], [style*=\"position:sticky\"]').forEach(function(el) {\n if (el.style.position === 'fixed' || el.style.position === 'sticky' || \n getComputedStyle(el).position === 'fixed' || getComputedStyle(el).position === 'sticky') {\n el.style.position = 'static';\n el.style.top = 'auto';\n el.style.zIndex = 'auto';\n }\n });\n }\n \n unstick();\n \n var observer = new MutationObserver(unstick);\n observer.observe(document.body, { childList: true, subtree: true, attributes: true, attributeFilter: ['style', 'class'] });\n})();", "Kill Sticky Headers"); } } catch(__e) { console.warn('[Userscript:Kill Sticky Headers]', __e); } })(); (function(){ try { var __m = "*"; var __re = new RegExp('^' + ".*" + '
Skip to content

JIT ARM32: Force tailcall nullchecks with LR - #68107

Merged
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck
Apr 18, 2022
Merged

JIT ARM32: Force tailcall nullchecks with LR#68107
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck

Conversation

@jakobbotsch

Copy link
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Member

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix#66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Apr 16, 2022
@ghost

Copy link
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Tagging subscribers to this area: @JulieLeeMSFT
See info in area-owners.md if you want to be subscribed.

Issue Details

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix #66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

Author:jakobbotsch
Assignees:-
Labels:

area-CodeGen-coreclr

Milestone:-

Comment threadsrc/coreclr/jit/lsraarmarch.cpp

@kunalspathakkunalspathak left a comment

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LGTM

@kunalspathak
kunalspathak merged commit 928bd97 into dotnet:mainApr 18, 2022
directhex pushed a commit to directhex/runtime that referenced this pull request Apr 21, 2022
For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost locked as resolved and limited conversation to collaborators May 18, 2022
Sign up for freeto subscribe to this conversation on GitHub. Already have an account? Sign in.

Labels

area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI

Projects

None yet

Development

Successfully merging this pull request may close these issues.

Test failure JIT/Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.sh

2 participants

@jakobbotsch@kunalspathak
, 'i'); if (__m === '*' || __re.test(location.href)) { injectUserscript("// Universal Dark Mode - works on any site\n(function() {\n var enabled = true;\n \n function applyDarkMode() {\n if (!enabled) return;\n \n // Create style element if it doesn't exist\n var style = document.getElementById('universal-dark-mode-style');\n if (!style) {\n style = document.createElement('style');\n style.id = 'universal-dark-mode-style';\n document.head.appendChild(style);\n }\n \n // Dark mode CSS - inverts colors but preserves images/video\n style.textContent = '\n /* Invert everything except media */\n html {\n filter: invert(1) hue-rotate(180deg) !important;\n background: #1a1a2e !important;\n }\n \n /* Restore images, videos, iframes, canvas */\n img, video, iframe, canvas, svg, picture, [style*=\"background-image\"] {\n filter: invert(1) hue-rotate(180deg) !important;\n }\n \n /* Preserve specific elements that should not be inverted */\n .no-dark-mode, .no-dark-mode *,\n [data-theme=\"light\"], [data-theme=\"light\"],\n .ace_editor, .ace_editor *,\n .CodeMirror, .CodeMirror *,\n .monaco-editor, .monaco-editor *,\n .markdown-body pre, .markdown-body pre *,\n .highlight, .highlight *,\n pre code, pre code * {\n filter: none !important;\n }\n \n /* Fix common UI elements */\n .modal, .popup, .dropdown-menu, .tooltip, .popover {\n filter: invert(1) hue-rotate(180deg) !important;\n background: #2d2d44 !important;\n border-color: #444 !important;\n }\n \n /* Scrollbars */\n ::-webkit-scrollbar { background: #1a1a2e !important; }\n ::-webkit-scrollbar-thumb { background: #444 !important; }\n ::-webkit-scrollbar-thumb:hover { background: #555 !important; }\n \n /* Selection */\n ::selection { background: #4ecdc4 !important; color: #1a1a2e !important; }\n ::-moz-selection { background: #4ecdc4 !important; color: #1a1a2e !important; }\n ';\n }\n \n function removeDarkMode() {\n var style = document.getElementById('universal-dark-mode-style');\n if (style) style.remove();\n }\n \n // Toggle with Alt+Shift+D\n document.addEventListener('keydown', function(e) {\n if (e.altKey && e.shiftKey && e.key === 'D') {\n e.preventDefault();\n enabled = !enabled;\n if (enabled) {\n applyDarkMode();\n console.log('[Universal Dark Mode] Enabled');\n } else {\n removeDarkMode();\n console.log('[Universal Dark Mode] Disabled');\n }\n }\n });\n \n // Apply on load\n applyDarkMode();\n \n // Re-apply on dynamic content\n var observer = new MutationObserver(function(mutations) {\n if (enabled && !document.getElementById('universal-dark-mode-style')) {\n applyDarkMode();\n }\n });\n observer.observe(document.head, { childList: true });\n \n console.log('[Universal Dark Mode] Loaded - Press Alt+Shift+D to toggle');\n})();", "Universal Dark Mode"); } } catch(__e) { console.warn('[Userscript:Universal Dark Mode]', __e); } })(); })();
Skip to content

JIT ARM32: Force tailcall nullchecks with LR - #68107

Merged
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck
Apr 18, 2022
Merged

JIT ARM32: Force tailcall nullchecks with LR#68107
kunalspathak merged 1 commit into
dotnet:mainfrom
jakobbotsch:arm32-constrain-tailcall-nullcheck

Conversation

@jakobbotsch

Copy link
Copy Markdown
Member

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix#66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Apr 16, 2022
@ghost

Copy link
Copy Markdown

Tagging subscribers to this area: @JulieLeeMSFT
See info in area-owners.md if you want to be subscribed.

Issue Details

For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just LR left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).

To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.

Fix #66563

cc @dotnet/jit-contrib @kunalspathak, this is the alternative fix

Author:jakobbotsch
Assignees:-
Labels:

area-CodeGen-coreclr

Milestone:-

Comment threadsrc/coreclr/jit/lsraarmarch.cpp

@kunalspathakkunalspathak left a comment

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LGTM

@kunalspathak
kunalspathak merged commit 928bd97 into dotnet:mainApr 18, 2022
directhex pushed a commit to directhex/runtime that referenced this pull request Apr 21, 2022
For interface tail calls we need to allocate registers for both the
target and a null-check. The register that can be used for the target is
highly constrained: it essentially only go into r12 as the arg registers
may be busy and that is the only volatile register left that will not be
overridden by the epilog. This leaves
just `LR` left for the null check, and LSRA does not seem to handle the
low amount of freedom too well (these are all allocated at the same
location, which might have something to do with it).
To help LSRA just force the null-check to happen with LR for fast
tailcalls, which is going to be killed going into the epilog anyway.
Fixdotnet#66563
@ghostghost locked as resolved and limited conversation to collaborators May 18, 2022
Sign up for freeto subscribe to this conversation on GitHub. Already have an account? Sign in.

Labels

area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI

Projects

None yet

Development

Successfully merging this pull request may close these issues.

Test failure JIT/Regression/JitBlue/DevDiv_461649/DevDiv_461649/DevDiv_461649.sh

2 participants

@jakobbotsch@kunalspathak