Enable fake hot/cold splitting on ARM64 by amanasifkhalid · Pull Request #70708 · dotnet/runtime

amanasifkhalid · 2022-06-14T02:00:48Z

This PR enables fake hot/cold splitting on ARM64 via COMPlus_JitFakeProcedureSplitting, and fixes various bugs exposed by testing with fake-splitting:

Branches between hot/cold sections are now always long.
The pseudoinstruction for loading a constant from the cold section did not support loading 16-byte data into vector registers, as it temporarily loaded the constant into an 8-byte integer register. Now, 16-byte constants are loaded directly into vector registers via an ld1 instruction.
Tests involving loading 16-byte constants exposed the data section is not always aligned to its largest constant. Now, the data section is always aligned to emitConsDsc.alignment when calling eeAllocMem.
Asserts/NYIs blocking hot/cold splitting on ARM64 have been removed.

Fake hot/cold splitting requires we fake unwind info by treating each split function as one hot section. A more architecture-agnostic approach for this has been applied. However, unwind info generated for cold sections has yet to be tested, as this depends on VM support for hot/cold splitting.

- Remove NYIs/control flow preventing code splitting on ARM64. - Update emitter::emitIns_J() to keep jumps between hot/cold sections long. - Update emitter::emitOutputLJ() to emit long jumps for both conditional and unconditional branches between hot/cold sections, and report relocations to the runtime. - Update long ldr pseudoinstruction to instead use ld1 instruction when loading 16-byte constants into vector registers; ldr implementation temporarily loads the constant into a general integer register, which does not support 16-byte values.

ghost · 2022-06-14T02:01:05Z

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Issue Details

This PR enables fake hot/cold splitting on ARM64 via COMPlus_JitFakeProcedureSplitting, and fixes various bugs exposed by testing with fake-splitting:

Branches between hot/cold sections are now always long.
The pseudoinstruction for loading a constant from the cold section did not support loading 16-byte data into vector registers, as it temporarily loaded the constant into an 8-byte integer register. Now, 16-byte constants are loaded directly into vector registers via an ld1 instruction.
Tests involving loading 16-byte constants exposed the data section is not always aligned to its largest constant. Now, the data section is always aligned to emitConsDsc.alignment when calling eeAllocMem.
Asserts/NYIs blocking hot/cold splitting on ARM64 have been removed.

Fake hot/cold splitting requires we fake unwind info by treating each split function as one hot section. A more architecture-agnostic approach for this has been applied. However, unwind info generated for cold sections has yet to be tested, as this depends on VM support for hot/cold splitting.

Author:	amanasifkhalid
Assignees:	amanasifkhalid
Labels:	`area-CodeGen-coreclr`
Milestone:	-

amanasifkhalid · 2022-06-14T02:13:27Z

/azp run runtime-jit-experimental

azure-pipelines · 2022-06-14T02:13:36Z

Azure Pipelines successfully started running 1 pipeline(s).

This commit contains fixes for various bugs exposed by enabling fake hot/cold splitting on ARM64: - Branches between hot/cold sections are now always long. - The pseudoinstruction for loading a constant from the cold section did not support loading 16-byte data into vector registers, as it temporarily loaded the constant into an 8-byte integer register. Now, 16-byte constants are loaded directly into vector registers via an `ld1` instruction. - Tests involving loading 16-byte constants exposed the data section is not always aligned to its largest constant. Now, the data section is always aligned to `emitConsDsc.alignment` when calling `eeAllocMem`. - Asserts/NYIs blocking hot/cold splitting on ARM64 have been removed. Fake hot/cold splitting requires we fake unwind info by treating each split function as one hot section. A more architecture-agnostic approach for this has been applied.

amanasifkhalid · 2022-06-14T03:27:21Z

/azp run runtime-jit-experimental

azure-pipelines · 2022-06-14T03:27:35Z

Azure Pipelines successfully started running 1 pipeline(s).

amanasifkhalid · 2022-06-14T17:19:49Z

Closing to prevent re-running checks.

This commit contains fixes for various bugs exposed by enabling fake hot/cold splitting on ARM64: - Branches between hot/cold sections are now always long. - The pseudoinstruction for loading a constant from the cold section did not support loading 16-byte data into vector registers, as it temporarily loaded the constant into an 8-byte integer register. Now, 16-byte constants are loaded directly into vector registers via an `ld1` instruction. - Tests involving loading 16-byte constants exposed the data section is not always aligned to its largest constant. Now, the data section is always aligned to `emitConsDsc.alignment` when calling `eeAllocMem`. - Asserts/NYIs blocking hot/cold splitting on ARM64 have been removed. Fake hot/cold splitting requires we fake unwind info by treating each split function as one hot section. A more architecture-agnostic approach for this has been applied.

…d/runtime into code-splitting-arm

The newly-introduced `emitRemoveJumpToNextInst` optimization caused a regression when hot/cold-splitting, where jumps from the last hot instruction to the first cold instruction were erroneously removed. This is fixed by disabling the `isRemovableJmpCandidate` flag for branches between hot/cold sections. On an unrelated note, a JIT dump message has been added to indicate stress-splitting is occurring.

…d/runtime into code-splitting-arm

amanasifkhalid · 2022-06-20T18:12:49Z

I've added commits that update the fake-splitting implementation to place the read-only data section after the cold section on ARM64. This allows the hot/cold sections to be truly contiguous -- previously, the read-only data section was placed after the hot section. This placement should better facilitate generating fake unwind info, thus fixing stack walks when fake-splitting.

amanasifkhalid · 2022-06-20T18:12:57Z

/azp run runtime-jit-experimental

azure-pipelines · 2022-06-20T18:13:08Z

Azure Pipelines successfully started running 1 pipeline(s).

amanasifkhalid · 2022-06-20T21:47:06Z

I realized my implementation for aligning the data section when fake-splitting is overzealous, and simply tweaking the current implementation to align to TARGET_POINTER_SIZE when emitConsDsc.alignment >= TARGET_POINTER_SIZE (rather than ==) fixes the asserts hit when loading 16-byte constants.

@BruceForstall PTAL. I noticed runtime-jit-experimental is failing due to some odd concurrency issue (at least that's what it looks like). Hopefully this was just a fluke.

amanasifkhalid · 2022-06-20T21:48:53Z

/azp run runtime-jit-experimental

Edit: Checks didn't trigger for some reason... I'll wait to restart them after addressing feedback.

BruceForstall · 2022-06-20T22:05:37Z

I noticed runtime-jit-experimental is failing due to some odd concurrency issue (at least that's what it looks like). Hopefully this was just a fluke.

Looks like a (bad) recent regression. I opened #71023.

BruceForstall · 2022-06-20T22:21:23Z

/azp run runtime

azure-pipelines · 2022-06-20T22:24:17Z

No pipelines are associated with this pull request.

azure-pipelines · 2022-06-20T22:35:17Z

Azure Pipelines successfully started running 1 pipeline(s).

azure-pipelines · 2022-06-20T22:38:19Z

Azure Pipelines successfully started running 1 pipeline(s).

To facilitate generating unwind info, fake-splitting now places the read-only data section after the cold section. This allows the hot/cold code sections to be truly contiguous.

amanasifkhalid · 2022-06-21T18:13:17Z

@BruceForstall PTAL at eeAllocMem. I incorporated your suggestions to simplify the caller logic and improve the method's abstraction: eeAllocMem now takes emitConsDsc.alignment as an additional argument since it's already calculated, and handles the ARM64-specific fix-ups. The caller no longer handles anything ARM64- or fake-splitting-specific.

BruceForstall · 2022-06-21T18:24:54Z

@BruceForstall PTAL at eeAllocMem. I incorporated your suggestions to simplify the caller logic and improve the method's abstraction: eeAllocMem now takes emitConsDsc.alignment as an additional argument since it's already calculated, and handles the ARM64-specific fix-ups. The caller no longer handles anything ARM64- or fake-splitting-specific.

I like this direction. Unfortunately, and I apologize, this change is going to clash with my change #71044. Can we wait until that is merged (today), and then review this? You'll need to pick up its changes into this.

amanasifkhalid · 2022-06-21T19:04:37Z

I like this direction. Unfortunately, and I apologize, this change is going to clash with my change #71044. Can we wait until that is merged (today), and then review this? You'll need to pick up its changes into this.

No worries!

amanasifkhalid · 2022-06-22T00:31:16Z

@BruceForstall I merged your changes from #71044 in, and added a guard to disable splitting on LoongArch64. Thanks for the ARM64 alignment work -- I recall hitting some related asserts when trying to load 16-byte constants a few weeks ago...

amanasifkhalid · 2022-06-22T14:46:29Z

/azp run runtime-jit-experimental

azure-pipelines · 2022-06-22T14:46:46Z

Azure Pipelines successfully started running 1 pipeline(s).

BruceForstall

LGTM

amanasifkhalid · 2022-06-22T20:51:04Z

Merging this PR for now. Will submit a follow-up PR disabling hot/cold splitting when generateCFIUnwindCodes() is true.

Aman Khalid added 3 commits May 27, 2022 14:11

Add hot/cold splitting test job to jit-runtime-experimental
671c81a

ghost added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Jun 14, 2022

ghost assigned amanasifkhalid Jun 14, 2022

amanasifkhalid force-pushed the code-splitting-arm branch from de27dac to d2bbed8Compare June 14, 2022 02:44

Merge branch 'dotnet:main' into code-splitting-arm
17b8c48

amanasifkhalid closed this Jun 14, 2022

Aman Khalid added 4 commits June 14, 2022 10:22

Merge branch 'code-splitting-arm' ofhttps://github.com/amanasifkhali…
0e7018e
…d/runtime into code-splitting-arm

Merge branch 'hot-cold-splitting' ofhttps://github.com/amanasifkhali…
d208b3a
…d/runtime into code-splitting-arm

amanasifkhalid reopened this Jun 20, 2022

amanasifkhalid force-pushed the code-splitting-arm branch from c793739 to eae7ee5Compare June 20, 2022 21:46

amanasifkhalid marked this pull request as ready for review June 20, 2022 21:47

BruceForstall self-requested a review June 20, 2022 21:52

Update fake-splitting implementation on ARM64
8ed9046
To facilitate generating unwind info, fake-splitting now places the read-only data section after the cold section. This allows the hot/cold code sections to be truly contiguous.

amanasifkhalid force-pushed the code-splitting-arm branch from 7be19a6 to 8ed9046Compare June 21, 2022 18:06

Merge branch 'dotnet:main' into code-splitting-arm
0493057

Aman Khalid added 2 commits June 21, 2022 16:57

merge
59dc5ed

Disable hot/cold splitting on LoongArch64
548b9a5

amanasifkhalid mentioned this pull request Jun 22, 2022
Fix #70849: Print LARGEJMP instruction on ARM64 #71094
Merged

BruceForstall approved these changes Jun 22, 2022
View reviewed changes

Comment threadsrc/coreclr/jit/unwind.cpp Outdated

amanasifkhalid merged commit bc1a872 into dotnet:mainJun 22, 2022

amanasifkhalid mentioned this pull request Jun 22, 2022
Disable hot/cold splitting on Unix NativeAOT #71168
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AndyAyersMS mentioned this pull request Jun 29, 2022
Dynamic PGO #43618
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JulieLeeMSFT mentioned this pull request Jul 7, 2022
What's new in .NET 7 Preview 6 [WIP] dotnet/core#7454
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AndyAyersMS mentioned this pull request Jul 8, 2022
Dynamic PGO work planned for .NET 7 #64659
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