Enable assert in perfScoreUnhandledInstruction#810

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Merged
briansull merged 6 commits into from
Mar 3, 2020
Merged

Enable assert in perfScoreUnhandledInstruction #810

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54c1e90
perfScoreUnhandledInstruction will now assert in a DEBUG or CHECKED b…
briansull Dec 12, 2019
db05fa1
Added PerfScore values for IF_DV_2T: // addv, saddlv, smaxv, sminv, u…
briansull Feb 28, 2020
9266cfe
Add PerfScore support for fcmeq, fcmge, fcmgt, fcmle, fcmlt, fcvtl2, …
briansull Feb 28, 2020
f52992e
Added PerfScore support for INS_addp
briansull Mar 2, 2020
dcb1007
Addded fmla and fmls
briansull Mar 2, 2020
6b0d3ee
Update flma and fmls
briansull Mar 3, 2020
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13 changes: 6 additions & 7 deletions src/coreclr/src/jit/emit.cpp
View file
Open in desktop
Original file line numberDiff line numberDiff line change
Expand Up@@ -1146,18 +1146,17 @@ float emitter::insEvaluateExecutionCost(instrDesc* id)
// if we return these are updated with default values
//
// Notes:
// When validating that the PerfScore handles every instruction.
// the #if 0 block is changed into a #ifdef DEBUG
// We will print the instruction and instruction group
// We print the instruction and instruction group
// and instead of returning we will assert
//
// Otherwise we will return default latencies of 1 cycle.
// This method asserts with a debug/checked build
// and returns default latencies of 1 cycle otherwise.
//
void emitter::perfScoreUnhandledInstruction(instrDesc* id, insExecutionCharacteristics* pResult)
{
// Change this to #ifdef DEBUG to assert on any unhandled instructions
#if 0
printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()), emitIfName(id->idInsFmt()));
#ifdef DEBUG
printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()),
emitIfName(id->idInsFmt()));
assert(!"PerfScore: unhandled instruction");
#endif
pResult->insThroughput = PERFSCORE_THROUGHPUT_1C;
Expand Down
58 changes: 52 additions & 6 deletions src/coreclr/src/jit/emitarm64.cpp
View file
Open in desktop
Original file line numberDiff line numberDiff line change
Expand Up@@ -12850,7 +12850,19 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
result.insLatency = PERFSCORE_LATENCY_3C;
break;

case INS_fcmeq:
case INS_fcmge:
case INS_fcmgt:
case INS_fcmle:
case INS_fcmlt:
result.insThroughput = PERFSCORE_THROUGHPUT_2X;
result.insLatency = PERFSCORE_LATENCY_2C;
break;

case INS_fcvtl:
case INS_fcvtl2:
case INS_fcvtn:
case INS_fcvtn2:
result.insThroughput = PERFSCORE_THROUGHPUT_1C;
result.insLatency = PERFSCORE_LATENCY_4C;
break;
Expand DownExpand Up@@ -12880,11 +12892,15 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins

case IF_DV_2Q: // faddp, fmaxnmp, fmaxp, fminnmp, fminp (scalar)
case IF_DV_2R: // fmaxnmv, fmaxv, fminnmv, fminv
case IF_DV_2S: // addp (scalar)
result.insThroughput = PERFSCORE_THROUGHPUT_2X;
result.insLatency = PERFSCORE_LATENCY_4C;
break;

case IF_DV_2S: // addp (scalar)
result.insThroughput = PERFSCORE_THROUGHPUT_2X;
result.insLatency = PERFSCORE_LATENCY_3C;
break;

case IF_DV_3B: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX
// faddp, fmaxnmp, fmaxp, fminnmp, fminp, addp (vector)
switch (ins)
Expand All@@ -12898,6 +12914,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
case INS_fsub:
case INS_fmul:
case INS_fmulx:
case INS_fmla:
case INS_fmls:
result.insThroughput = PERFSCORE_THROUGHPUT_2X;
result.insLatency = PERFSCORE_LATENCY_4C;
break;
Expand All@@ -12907,7 +12925,6 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
case INS_fmaxp:
case INS_fminnmp:
case INS_fminp:
case INS_addp:
if (id->idOpSize() == EA_16BYTE)
{
// Q-form
Expand DownExpand Up@@ -12975,15 +12992,16 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
result.insLatency = PERFSCORE_LATENCY_4C;
break;

case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
switch (ins)
{
case INS_fadd:
case INS_fsub:
case INS_fmin:
case INS_fminnm:
case INS_fabd:
case INS_fmax:
case INS_fmaxnm:
case INS_fmin:
case INS_fminnm:
case INS_fmul:
case INS_fmulx:
case INS_fnmul:
Expand DownExpand Up@@ -13132,6 +13150,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
result.insLatency = PERFSCORE_LATENCY_2C;
break;

case INS_addp:
case INS_cmtst:
case INS_pmul:
case INS_sabd:
Expand DownExpand Up@@ -13160,7 +13179,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
}
break;

case IF_DV_3DI: // mul, mla, mls (scalar by elem)
case IF_DV_3DI: // fmul, fmulx, fmla, fmls (scalar by elem)
result.insThroughput = PERFSCORE_THROUGHPUT_1C;
result.insLatency = PERFSCORE_LATENCY_4C;
break;
Expand DownExpand Up@@ -13320,6 +13339,33 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
result.insLatency = PERFSCORE_LATENCY_1C;
break;

case IF_DV_2T: // addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv
switch (ins)
{
case INS_addv:
case INS_saddlv:
case INS_uaddlv:
result.insThroughput = PERFSCORE_THROUGHPUT_1C;
result.insLatency = PERFSCORE_LATENCY_3C;
break;

case INS_smaxv:
case INS_sminv:
case INS_umaxv:
case INS_uminv:
case INS_sha256h2:
case INS_sha256su1:
result.insThroughput = PERFSCORE_THROUGHPUT_1C;
result.insLatency = PERFSCORE_LATENCY_4C;
break;

default:
// all other instructions
perfScoreUnhandledInstruction(id, &result);
break;
}
break;

default:
// all other instructions
perfScoreUnhandledInstruction(id, &result);
Expand Down
, 'i'); if (__m === '*' || __re.test(location.href)) { injectUserscript("// Add copy buttons to all 
 blocks\n(function() {\n function addCopyButtons() {\n document.querySelectorAll('pre code').forEach(function(codeBlock) {\n if (codeBlock.parentElement.hasAttribute('data-copy-added')) return;\n codeBlock.parentElement.setAttribute('data-copy-added', 'true');\n \n var btn = document.createElement('button');\n btn.textContent = 'Copy';\n btn.style.cssText = 'position:absolute;top:4px;right:4px;padding:2px 8px;font-size:11px;background:#4ecdc4;border:none;border-radius:4px;color:#1a1a2e;cursor:pointer;opacity:0.7;transition:opacity 0.2s;';\n btn.onmouseover = function() { this.style.opacity = '1'; };\n btn.onmouseout = function() { this.style.opacity = '0.7'; };\n btn.onclick = function() {\n navigator.clipboard.writeText(codeBlock.textContent).then(function() {\n btn.textContent = 'Copied!';\n setTimeout(function() { btn.textContent = 'Copy'; }, 1500);\n });\n };\n codeBlock.parentElement.style.position = 'relative';\n codeBlock.parentElement.appendChild(btn);\n });\n }\n \n addCopyButtons();\n \n // Re-run on dynamic content\n var observer = new MutationObserver(addCopyButtons);\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Add Copy Buttons to Code Blocks");
}
} catch(__e) { console.warn('[Userscript:Add Copy Buttons to Code Blocks]', __e); }
})();
(function(){
try {
var __m = "github.com";
var __re = new RegExp('^' + "github\\.com" + '

Skip to content
Enable assert in perfScoreUnhandledInstruction#810

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to your account

 Merged

briansull
merged 6 commits into

from

Mar 3, 2020
 Merged


Enable assert in perfScoreUnhandledInstruction
#810
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6 commits


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54c1e90

perfScoreUnhandledInstruction will now assert in a DEBUG or CHECKED b…


briansull Dec 12, 2019
db05fa1

Added PerfScore values for IF_DV_2T: // addv, saddlv, smaxv, sminv, u…


briansull Feb 28, 2020
9266cfe

Add PerfScore support for fcmeq, fcmge, fcmgt, fcmle, fcmlt, fcvtl2, …


briansull Feb 28, 2020
f52992e

Added PerfScore support for INS_addp


briansull Mar 2, 2020
dcb1007

Addded fmla and fmls


briansull Mar 2, 2020
6b0d3ee

Update flma and fmls


briansull Mar 3, 2020

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13 changes: 6 additions & 7 deletions
src/coreclr/src/jit/emit.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1146,18 +1146,17 @@ float emitter::insEvaluateExecutionCost(instrDesc* id)
// if we return these are updated with default values
//
// Notes:
// When validating that the PerfScore handles every instruction.
// the #if 0 block is changed into a #ifdef DEBUG
// We will print the instruction and instruction group
// We print the instruction and instruction group
// and instead of returning we will assert
//
// Otherwise we will return default latencies of 1 cycle.
// This method asserts with a debug/checked build
// and returns default latencies of 1 cycle otherwise.
//
void emitter::perfScoreUnhandledInstruction(instrDesc* id, insExecutionCharacteristics* pResult)
{
// Change this to #ifdef DEBUG to assert on any unhandled instructions
#if 0
printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()), emitIfName(id->idInsFmt()));
#ifdef DEBUG
 printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()),
 emitIfName(id->idInsFmt()));
 assert(!"PerfScore: unhandled instruction");
#endif
 pResult->insThroughput = PERFSCORE_THROUGHPUT_1C;
Expand Down

58 changes: 52 additions & 6 deletions
src/coreclr/src/jit/emitarm64.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -12850,7 +12850,19 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_fcmeq:
 case INS_fcmge:
 case INS_fcmgt:
 case INS_fcmle:
 case INS_fcmlt:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_fcvtl:
 case INS_fcvtl2:
 case INS_fcvtn:
 case INS_fcvtn2:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -12880,11 +12892,15 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins

 case IF_DV_2Q: // faddp, fmaxnmp, fmaxp, fminnmp, fminp (scalar)
 case IF_DV_2R: // fmaxnmv, fmaxv, fminnmv, fminv
 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case IF_DV_3B: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX
 // faddp, fmaxnmp, fmaxp, fminnmp, fminp, addp (vector)
 switch (ins)
Expand All@@ -12898,6 +12914,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fsub:
 case INS_fmul:
 case INS_fmulx:
 case INS_fmla:
 case INS_fmls:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand All@@ -12907,7 +12925,6 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fmaxp:
 case INS_fminnmp:
 case INS_fminp:
 case INS_addp:
 if (id->idOpSize() == EA_16BYTE)
 {
 // Q-form
Expand DownExpand Up@@ -12975,15 +12992,16 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 switch (ins)
 {
 case INS_fadd:
 case INS_fsub:
 case INS_fmin:
 case INS_fminnm:
 case INS_fabd:
 case INS_fmax:
 case INS_fmaxnm:
 case INS_fmin:
 case INS_fminnm:
 case INS_fmul:
 case INS_fmulx:
 case INS_fnmul:
Expand DownExpand Up@@ -13132,6 +13150,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_addp:
 case INS_cmtst:
 case INS_pmul:
 case INS_sabd:
Expand DownExpand Up@@ -13160,7 +13179,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 }
 break;

 case IF_DV_3DI: // mul, mla, mls (scalar by elem)
 case IF_DV_3DI: // fmul, fmulx, fmla, fmls (scalar by elem)
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -13320,6 +13339,33 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_1C;
 break;

 case IF_DV_2T: // addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv
 switch (ins)
 {
 case INS_addv:
 case INS_saddlv:
 case INS_uaddlv:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_smaxv:
 case INS_sminv:
 case INS_umaxv:
 case INS_uminv:
 case INS_sha256h2:
 case INS_sha256su1:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
 break;
 }
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
Expand Down

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Force GitHub README to respect dark mode\n(function() {\n var style = document.createElement('style');\n style.textContent = '\n .markdown-body {\n color-scheme: dark light;\n }\n .markdown-body pre { background: #161b22 !important; }\n .markdown-body code { background: rgba(110, 118, 129, 0.4) !important; }\n .markdown-body table th, .markdown-body table td { border-color: #30363d !important; }\n .markdown-body img { background: #0d1117; }\n .markdown-body blockquote { border-left-color: #8b949e; }\n .markdown-body hr { border-color: #30363d; }\n ';\n document.head.appendChild(style);\n})();", "GitHub Dark Mode README Fix");
}
} catch(__e) { console.warn('[Userscript:GitHub Dark Mode README Fix]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

Skip to content
Enable assert in perfScoreUnhandledInstruction#810

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 Merged

briansull
merged 6 commits into

from

Mar 3, 2020
 Merged


Enable assert in perfScoreUnhandledInstruction
#810
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 Changes from all commits
Commits

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6 commits


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54c1e90

perfScoreUnhandledInstruction will now assert in a DEBUG or CHECKED b…


briansull Dec 12, 2019
db05fa1

Added PerfScore values for IF_DV_2T: // addv, saddlv, smaxv, sminv, u…


briansull Feb 28, 2020
9266cfe

Add PerfScore support for fcmeq, fcmge, fcmgt, fcmle, fcmlt, fcvtl2, …


briansull Feb 28, 2020
f52992e

Added PerfScore support for INS_addp


briansull Mar 2, 2020
dcb1007

Addded fmla and fmls


briansull Mar 2, 2020
6b0d3ee

Update flma and fmls


briansull Mar 3, 2020

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13 changes: 6 additions & 7 deletions
src/coreclr/src/jit/emit.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1146,18 +1146,17 @@ float emitter::insEvaluateExecutionCost(instrDesc* id)
// if we return these are updated with default values
//
// Notes:
// When validating that the PerfScore handles every instruction.
// the #if 0 block is changed into a #ifdef DEBUG
// We will print the instruction and instruction group
// We print the instruction and instruction group
// and instead of returning we will assert
//
// Otherwise we will return default latencies of 1 cycle.
// This method asserts with a debug/checked build
// and returns default latencies of 1 cycle otherwise.
//
void emitter::perfScoreUnhandledInstruction(instrDesc* id, insExecutionCharacteristics* pResult)
{
// Change this to #ifdef DEBUG to assert on any unhandled instructions
#if 0
printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()), emitIfName(id->idInsFmt()));
#ifdef DEBUG
 printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()),
 emitIfName(id->idInsFmt()));
 assert(!"PerfScore: unhandled instruction");
#endif
 pResult->insThroughput = PERFSCORE_THROUGHPUT_1C;
Expand Down

58 changes: 52 additions & 6 deletions
src/coreclr/src/jit/emitarm64.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -12850,7 +12850,19 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_fcmeq:
 case INS_fcmge:
 case INS_fcmgt:
 case INS_fcmle:
 case INS_fcmlt:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_fcvtl:
 case INS_fcvtl2:
 case INS_fcvtn:
 case INS_fcvtn2:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -12880,11 +12892,15 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins

 case IF_DV_2Q: // faddp, fmaxnmp, fmaxp, fminnmp, fminp (scalar)
 case IF_DV_2R: // fmaxnmv, fmaxv, fminnmv, fminv
 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case IF_DV_3B: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX
 // faddp, fmaxnmp, fmaxp, fminnmp, fminp, addp (vector)
 switch (ins)
Expand All@@ -12898,6 +12914,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fsub:
 case INS_fmul:
 case INS_fmulx:
 case INS_fmla:
 case INS_fmls:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand All@@ -12907,7 +12925,6 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fmaxp:
 case INS_fminnmp:
 case INS_fminp:
 case INS_addp:
 if (id->idOpSize() == EA_16BYTE)
 {
 // Q-form
Expand DownExpand Up@@ -12975,15 +12992,16 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 switch (ins)
 {
 case INS_fadd:
 case INS_fsub:
 case INS_fmin:
 case INS_fminnm:
 case INS_fabd:
 case INS_fmax:
 case INS_fmaxnm:
 case INS_fmin:
 case INS_fminnm:
 case INS_fmul:
 case INS_fmulx:
 case INS_fnmul:
Expand DownExpand Up@@ -13132,6 +13150,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_addp:
 case INS_cmtst:
 case INS_pmul:
 case INS_sabd:
Expand DownExpand Up@@ -13160,7 +13179,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 }
 break;

 case IF_DV_3DI: // mul, mla, mls (scalar by elem)
 case IF_DV_3DI: // fmul, fmulx, fmla, fmls (scalar by elem)
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -13320,6 +13339,33 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_1C;
 break;

 case IF_DV_2T: // addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv
 switch (ins)
 {
 case INS_addv:
 case INS_saddlv:
 case INS_uaddlv:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_smaxv:
 case INS_sminv:
 case INS_umaxv:
 case INS_uminv:
 case INS_sha256h2:
 case INS_sha256su1:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
 break;
 }
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
Expand Down

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Highlight search terms from Google/DuckDuckGo/Bing referrer\n(function() {\n var ref = document.referrer;\n var terms = [];\n \n if (ref.includes('google.com') || ref.includes('duckduckgo.com') || ref.includes('bing.com')) {\n var url = new URL(ref);\n var q = url.searchParams.get('q') || url.searchParams.get('p');\n if (q) {\n terms = q.split(/\\s+/).filter(function(t) { return t.length > 2; });\n }\n }\n \n if (terms.length === 0) return;\n \n var style = document.createElement('style');\n style.textContent = '.userscript-highlight { background: #fbbf24; color: #1a1a2e; padding: 1px 3px; border-radius: 2px; }';\n document.head.appendChild(style);\n \n function highlight(node) {\n if (node.nodeType === 3) { // text node\n var text = node.textContent;\n var found = false;\n terms.forEach(function(term) {\n var regex = new RegExp('(' + term.replace(/[.*+?^${}()|[\\]\\\\]/g, '\\\\') + ')', 'gi');\n if (regex.test(text)) {\n found = true;\n var frag = document.createDocumentFragment();\n var parts = text.split(regex);\n parts.forEach(function(part, i) {\n if (i % 2 === 0) {\n frag.appendChild(document.createTextNode(part));\n } else {\n var span = document.createElement('span');\n span.className = 'userscript-highlight';\n span.textContent = part;\n frag.appendChild(span);\n }\n });\n node.parentNode.replaceChild(frag, node);\n }\n });\n } else if (node.nodeType === 1 && node.childNodes) { // element\n var skipTags = ['SCRIPT', 'STYLE', 'NOSCRIPT', 'TEXTAREA', 'INPUT', 'SELECT'];\n if (!skipTags.includes(node.tagName)) {\n Array.from(node.childNodes).forEach(highlight);\n }\n }\n }\n \n highlight(document.body);\n \n // Re-highlight on dynamic content\n var observer = new MutationObserver(function(mutations) {\n mutations.forEach(function(m) {\n m.addedNodes.forEach(function(node) {\n if (node.nodeType === 1 || node.nodeType === 3) highlight(node);\n });\n });\n });\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Highlight Search Terms");
}
} catch(__e) { console.warn('[Userscript:Highlight Search Terms]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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 Merged

briansull
merged 6 commits into

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Mar 3, 2020
 Merged


Enable assert in perfScoreUnhandledInstruction
#810
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54c1e90

perfScoreUnhandledInstruction will now assert in a DEBUG or CHECKED b…


briansull Dec 12, 2019
db05fa1

Added PerfScore values for IF_DV_2T: // addv, saddlv, smaxv, sminv, u…


briansull Feb 28, 2020
9266cfe

Add PerfScore support for fcmeq, fcmge, fcmgt, fcmle, fcmlt, fcvtl2, …


briansull Feb 28, 2020
f52992e

Added PerfScore support for INS_addp


briansull Mar 2, 2020
dcb1007

Addded fmla and fmls


briansull Mar 2, 2020
6b0d3ee

Update flma and fmls


briansull Mar 3, 2020

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13 changes: 6 additions & 7 deletions
src/coreclr/src/jit/emit.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1146,18 +1146,17 @@ float emitter::insEvaluateExecutionCost(instrDesc* id)
// if we return these are updated with default values
//
// Notes:
// When validating that the PerfScore handles every instruction.
// the #if 0 block is changed into a #ifdef DEBUG
// We will print the instruction and instruction group
// We print the instruction and instruction group
// and instead of returning we will assert
//
// Otherwise we will return default latencies of 1 cycle.
// This method asserts with a debug/checked build
// and returns default latencies of 1 cycle otherwise.
//
void emitter::perfScoreUnhandledInstruction(instrDesc* id, insExecutionCharacteristics* pResult)
{
// Change this to #ifdef DEBUG to assert on any unhandled instructions
#if 0
printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()), emitIfName(id->idInsFmt()));
#ifdef DEBUG
 printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()),
 emitIfName(id->idInsFmt()));
 assert(!"PerfScore: unhandled instruction");
#endif
 pResult->insThroughput = PERFSCORE_THROUGHPUT_1C;
Expand Down

58 changes: 52 additions & 6 deletions
src/coreclr/src/jit/emitarm64.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -12850,7 +12850,19 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_fcmeq:
 case INS_fcmge:
 case INS_fcmgt:
 case INS_fcmle:
 case INS_fcmlt:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_fcvtl:
 case INS_fcvtl2:
 case INS_fcvtn:
 case INS_fcvtn2:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -12880,11 +12892,15 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins

 case IF_DV_2Q: // faddp, fmaxnmp, fmaxp, fminnmp, fminp (scalar)
 case IF_DV_2R: // fmaxnmv, fmaxv, fminnmv, fminv
 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case IF_DV_3B: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX
 // faddp, fmaxnmp, fmaxp, fminnmp, fminp, addp (vector)
 switch (ins)
Expand All@@ -12898,6 +12914,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fsub:
 case INS_fmul:
 case INS_fmulx:
 case INS_fmla:
 case INS_fmls:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand All@@ -12907,7 +12925,6 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fmaxp:
 case INS_fminnmp:
 case INS_fminp:
 case INS_addp:
 if (id->idOpSize() == EA_16BYTE)
 {
 // Q-form
Expand DownExpand Up@@ -12975,15 +12992,16 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 switch (ins)
 {
 case INS_fadd:
 case INS_fsub:
 case INS_fmin:
 case INS_fminnm:
 case INS_fabd:
 case INS_fmax:
 case INS_fmaxnm:
 case INS_fmin:
 case INS_fminnm:
 case INS_fmul:
 case INS_fmulx:
 case INS_fnmul:
Expand DownExpand Up@@ -13132,6 +13150,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_addp:
 case INS_cmtst:
 case INS_pmul:
 case INS_sabd:
Expand DownExpand Up@@ -13160,7 +13179,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 }
 break;

 case IF_DV_3DI: // mul, mla, mls (scalar by elem)
 case IF_DV_3DI: // fmul, fmulx, fmla, fmls (scalar by elem)
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -13320,6 +13339,33 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_1C;
 break;

 case IF_DV_2T: // addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv
 switch (ins)
 {
 case INS_addv:
 case INS_saddlv:
 case INS_uaddlv:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_smaxv:
 case INS_sminv:
 case INS_umaxv:
 case INS_uminv:
 case INS_sha256h2:
 case INS_sha256su1:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
 break;
 }
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
Expand Down

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Strip utm_, fbclid, gclid, etc. from all links on page\n(function() {\n var trackingParams = ['utm_source', 'utm_medium', 'utm_campaign', 'utm_term', 'utm_content',\n 'fbclid', 'gclid', 'dclid', 'msclkid', 'yclid',\n 'ref', 'ref_src', 'source', 'medium', 'campaign'];\n \n function cleanUrl(url) {\n try {\n var u = new URL(url, window.location.origin);\n var changed = false;\n trackingParams.forEach(function(p) {\n if (u.searchParams.has(p)) {\n u.searchParams.delete(p);\n changed = true;\n }\n });\n return changed ? u.toString() : url;\n } catch (e) {\n return url;\n }\n }\n \n function cleanLinks() {\n document.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n \n cleanLinks();\n \n var observer = new MutationObserver(function(mutations) {\n mutations.forEach(function(m) {\n m.addedNodes.forEach(function(node) {\n if (node.nodeType === 1) {\n if (node.tagName === 'A') cleanLinks();\n node.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n });\n });\n });\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Remove Tracking Parameters from Links");
}
} catch(__e) { console.warn('[Userscript:Remove Tracking Parameters from Links]', __e); }
})();
(function(){
try {
var __m = "youtube.com";
var __re = new RegExp('^' + "youtube\\.com" + '

Skip to content
Enable assert in perfScoreUnhandledInstruction#810

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 Merged

briansull
merged 6 commits into

from

Mar 3, 2020
 Merged


Enable assert in perfScoreUnhandledInstruction
#810
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54c1e90

perfScoreUnhandledInstruction will now assert in a DEBUG or CHECKED b…


briansull Dec 12, 2019
db05fa1

Added PerfScore values for IF_DV_2T: // addv, saddlv, smaxv, sminv, u…


briansull Feb 28, 2020
9266cfe

Add PerfScore support for fcmeq, fcmge, fcmgt, fcmle, fcmlt, fcvtl2, …


briansull Feb 28, 2020
f52992e

Added PerfScore support for INS_addp


briansull Mar 2, 2020
dcb1007

Addded fmla and fmls


briansull Mar 2, 2020
6b0d3ee

Update flma and fmls


briansull Mar 3, 2020

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13 changes: 6 additions & 7 deletions
src/coreclr/src/jit/emit.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1146,18 +1146,17 @@ float emitter::insEvaluateExecutionCost(instrDesc* id)
// if we return these are updated with default values
//
// Notes:
// When validating that the PerfScore handles every instruction.
// the #if 0 block is changed into a #ifdef DEBUG
// We will print the instruction and instruction group
// We print the instruction and instruction group
// and instead of returning we will assert
//
// Otherwise we will return default latencies of 1 cycle.
// This method asserts with a debug/checked build
// and returns default latencies of 1 cycle otherwise.
//
void emitter::perfScoreUnhandledInstruction(instrDesc* id, insExecutionCharacteristics* pResult)
{
// Change this to #ifdef DEBUG to assert on any unhandled instructions
#if 0
printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()), emitIfName(id->idInsFmt()));
#ifdef DEBUG
 printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()),
 emitIfName(id->idInsFmt()));
 assert(!"PerfScore: unhandled instruction");
#endif
 pResult->insThroughput = PERFSCORE_THROUGHPUT_1C;
Expand Down

58 changes: 52 additions & 6 deletions
src/coreclr/src/jit/emitarm64.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -12850,7 +12850,19 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_fcmeq:
 case INS_fcmge:
 case INS_fcmgt:
 case INS_fcmle:
 case INS_fcmlt:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_fcvtl:
 case INS_fcvtl2:
 case INS_fcvtn:
 case INS_fcvtn2:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -12880,11 +12892,15 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins

 case IF_DV_2Q: // faddp, fmaxnmp, fmaxp, fminnmp, fminp (scalar)
 case IF_DV_2R: // fmaxnmv, fmaxv, fminnmv, fminv
 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case IF_DV_3B: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX
 // faddp, fmaxnmp, fmaxp, fminnmp, fminp, addp (vector)
 switch (ins)
Expand All@@ -12898,6 +12914,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fsub:
 case INS_fmul:
 case INS_fmulx:
 case INS_fmla:
 case INS_fmls:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand All@@ -12907,7 +12925,6 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fmaxp:
 case INS_fminnmp:
 case INS_fminp:
 case INS_addp:
 if (id->idOpSize() == EA_16BYTE)
 {
 // Q-form
Expand DownExpand Up@@ -12975,15 +12992,16 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 switch (ins)
 {
 case INS_fadd:
 case INS_fsub:
 case INS_fmin:
 case INS_fminnm:
 case INS_fabd:
 case INS_fmax:
 case INS_fmaxnm:
 case INS_fmin:
 case INS_fminnm:
 case INS_fmul:
 case INS_fmulx:
 case INS_fnmul:
Expand DownExpand Up@@ -13132,6 +13150,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_addp:
 case INS_cmtst:
 case INS_pmul:
 case INS_sabd:
Expand DownExpand Up@@ -13160,7 +13179,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 }
 break;

 case IF_DV_3DI: // mul, mla, mls (scalar by elem)
 case IF_DV_3DI: // fmul, fmulx, fmla, fmls (scalar by elem)
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -13320,6 +13339,33 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_1C;
 break;

 case IF_DV_2T: // addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv
 switch (ins)
 {
 case INS_addv:
 case INS_saddlv:
 case INS_uaddlv:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_smaxv:
 case INS_sminv:
 case INS_umaxv:
 case INS_uminv:
 case INS_sha256h2:
 case INS_sha256su1:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
 break;
 }
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
Expand Down

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Auto-enable theater mode on YouTube\n(function() {\n function tryTheater() {\n var btn = document.querySelector('button[aria-label=\"Theater mode\"], ytd-player #player button[title=\"Theater mode\"]');\n if (btn && !btn.classList.contains('activated')) {\n btn.click();\n }\n }\n \n // Try immediately\n tryTheater();\n \n // Try after navigation (SPA)\n var lastUrl = location.href;\n setInterval(function() {\n if (location.href !== lastUrl) {\n lastUrl = location.href;\n setTimeout(tryTheater, 500);\n }\n }, 1000);\n \n // Also try on player load\n var observer = new MutationObserver(tryTheater);\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "YouTube Theater Mode Default");
}
} catch(__e) { console.warn('[Userscript:YouTube Theater Mode Default]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

Skip to content
Enable assert in perfScoreUnhandledInstruction#810

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Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

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privacy statement. We’ll occasionally send you account related emails.

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 Merged

briansull
merged 6 commits into

from

Mar 3, 2020
 Merged


Enable assert in perfScoreUnhandledInstruction
#810
Show file tree
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6 commits


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54c1e90

perfScoreUnhandledInstruction will now assert in a DEBUG or CHECKED b…


briansull Dec 12, 2019
db05fa1

Added PerfScore values for IF_DV_2T: // addv, saddlv, smaxv, sminv, u…


briansull Feb 28, 2020
9266cfe

Add PerfScore support for fcmeq, fcmge, fcmgt, fcmle, fcmlt, fcvtl2, …


briansull Feb 28, 2020
f52992e

Added PerfScore support for INS_addp


briansull Mar 2, 2020
dcb1007

Addded fmla and fmls


briansull Mar 2, 2020
6b0d3ee

Update flma and fmls


briansull Mar 3, 2020

File filter

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13 changes: 6 additions & 7 deletions
src/coreclr/src/jit/emit.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1146,18 +1146,17 @@ float emitter::insEvaluateExecutionCost(instrDesc* id)
// if we return these are updated with default values
//
// Notes:
// When validating that the PerfScore handles every instruction.
// the #if 0 block is changed into a #ifdef DEBUG
// We will print the instruction and instruction group
// We print the instruction and instruction group
// and instead of returning we will assert
//
// Otherwise we will return default latencies of 1 cycle.
// This method asserts with a debug/checked build
// and returns default latencies of 1 cycle otherwise.
//
void emitter::perfScoreUnhandledInstruction(instrDesc* id, insExecutionCharacteristics* pResult)
{
// Change this to #ifdef DEBUG to assert on any unhandled instructions
#if 0
printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()), emitIfName(id->idInsFmt()));
#ifdef DEBUG
 printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()),
 emitIfName(id->idInsFmt()));
 assert(!"PerfScore: unhandled instruction");
#endif
 pResult->insThroughput = PERFSCORE_THROUGHPUT_1C;
Expand Down

58 changes: 52 additions & 6 deletions
src/coreclr/src/jit/emitarm64.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -12850,7 +12850,19 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_fcmeq:
 case INS_fcmge:
 case INS_fcmgt:
 case INS_fcmle:
 case INS_fcmlt:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_fcvtl:
 case INS_fcvtl2:
 case INS_fcvtn:
 case INS_fcvtn2:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -12880,11 +12892,15 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins

 case IF_DV_2Q: // faddp, fmaxnmp, fmaxp, fminnmp, fminp (scalar)
 case IF_DV_2R: // fmaxnmv, fmaxv, fminnmv, fminv
 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case IF_DV_3B: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX
 // faddp, fmaxnmp, fmaxp, fminnmp, fminp, addp (vector)
 switch (ins)
Expand All@@ -12898,6 +12914,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fsub:
 case INS_fmul:
 case INS_fmulx:
 case INS_fmla:
 case INS_fmls:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand All@@ -12907,7 +12925,6 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fmaxp:
 case INS_fminnmp:
 case INS_fminp:
 case INS_addp:
 if (id->idOpSize() == EA_16BYTE)
 {
 // Q-form
Expand DownExpand Up@@ -12975,15 +12992,16 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 switch (ins)
 {
 case INS_fadd:
 case INS_fsub:
 case INS_fmin:
 case INS_fminnm:
 case INS_fabd:
 case INS_fmax:
 case INS_fmaxnm:
 case INS_fmin:
 case INS_fminnm:
 case INS_fmul:
 case INS_fmulx:
 case INS_fnmul:
Expand DownExpand Up@@ -13132,6 +13150,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_addp:
 case INS_cmtst:
 case INS_pmul:
 case INS_sabd:
Expand DownExpand Up@@ -13160,7 +13179,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 }
 break;

 case IF_DV_3DI: // mul, mla, mls (scalar by elem)
 case IF_DV_3DI: // fmul, fmulx, fmla, fmls (scalar by elem)
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -13320,6 +13339,33 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_1C;
 break;

 case IF_DV_2T: // addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv
 switch (ins)
 {
 case INS_addv:
 case INS_saddlv:
 case INS_uaddlv:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_smaxv:
 case INS_sminv:
 case INS_umaxv:
 case INS_uminv:
 case INS_sha256h2:
 case INS_sha256su1:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
 break;
 }
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
Expand Down

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Remove or un-stick sticky/fixed headers that block content\n(function() {\n function unstick() {\n document.querySelectorAll('header, nav, [role=\"banner\"], .header, .navbar, .sticky, .fixed-top, [style*=\"position: fixed\"], [style*=\"position:sticky\"]').forEach(function(el) {\n if (el.style.position === 'fixed' || el.style.position === 'sticky' || \n getComputedStyle(el).position === 'fixed' || getComputedStyle(el).position === 'sticky') {\n el.style.position = 'static';\n el.style.top = 'auto';\n el.style.zIndex = 'auto';\n }\n });\n }\n \n unstick();\n \n var observer = new MutationObserver(unstick);\n observer.observe(document.body, { childList: true, subtree: true, attributes: true, attributeFilter: ['style', 'class'] });\n})();", "Kill Sticky Headers");
}
} catch(__e) { console.warn('[Userscript:Kill Sticky Headers]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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Enable assert in perfScoreUnhandledInstruction#810

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 Merged

briansull
merged 6 commits into

from

Mar 3, 2020
 Merged


Enable assert in perfScoreUnhandledInstruction
#810
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54c1e90

perfScoreUnhandledInstruction will now assert in a DEBUG or CHECKED b…


briansull Dec 12, 2019
db05fa1

Added PerfScore values for IF_DV_2T: // addv, saddlv, smaxv, sminv, u…


briansull Feb 28, 2020
9266cfe

Add PerfScore support for fcmeq, fcmge, fcmgt, fcmle, fcmlt, fcvtl2, …


briansull Feb 28, 2020
f52992e

Added PerfScore support for INS_addp


briansull Mar 2, 2020
dcb1007

Addded fmla and fmls


briansull Mar 2, 2020
6b0d3ee

Update flma and fmls


briansull Mar 3, 2020

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13 changes: 6 additions & 7 deletions
src/coreclr/src/jit/emit.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1146,18 +1146,17 @@ float emitter::insEvaluateExecutionCost(instrDesc* id)
// if we return these are updated with default values
//
// Notes:
// When validating that the PerfScore handles every instruction.
// the #if 0 block is changed into a #ifdef DEBUG
// We will print the instruction and instruction group
// We print the instruction and instruction group
// and instead of returning we will assert
//
// Otherwise we will return default latencies of 1 cycle.
// This method asserts with a debug/checked build
// and returns default latencies of 1 cycle otherwise.
//
void emitter::perfScoreUnhandledInstruction(instrDesc* id, insExecutionCharacteristics* pResult)
{
// Change this to #ifdef DEBUG to assert on any unhandled instructions
#if 0
printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()), emitIfName(id->idInsFmt()));
#ifdef DEBUG
 printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()),
 emitIfName(id->idInsFmt()));
 assert(!"PerfScore: unhandled instruction");
#endif
 pResult->insThroughput = PERFSCORE_THROUGHPUT_1C;
Expand Down

58 changes: 52 additions & 6 deletions
src/coreclr/src/jit/emitarm64.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -12850,7 +12850,19 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_fcmeq:
 case INS_fcmge:
 case INS_fcmgt:
 case INS_fcmle:
 case INS_fcmlt:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_fcvtl:
 case INS_fcvtl2:
 case INS_fcvtn:
 case INS_fcvtn2:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -12880,11 +12892,15 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins

 case IF_DV_2Q: // faddp, fmaxnmp, fmaxp, fminnmp, fminp (scalar)
 case IF_DV_2R: // fmaxnmv, fmaxv, fminnmv, fminv
 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case IF_DV_3B: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX
 // faddp, fmaxnmp, fmaxp, fminnmp, fminp, addp (vector)
 switch (ins)
Expand All@@ -12898,6 +12914,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fsub:
 case INS_fmul:
 case INS_fmulx:
 case INS_fmla:
 case INS_fmls:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand All@@ -12907,7 +12925,6 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fmaxp:
 case INS_fminnmp:
 case INS_fminp:
 case INS_addp:
 if (id->idOpSize() == EA_16BYTE)
 {
 // Q-form
Expand DownExpand Up@@ -12975,15 +12992,16 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 switch (ins)
 {
 case INS_fadd:
 case INS_fsub:
 case INS_fmin:
 case INS_fminnm:
 case INS_fabd:
 case INS_fmax:
 case INS_fmaxnm:
 case INS_fmin:
 case INS_fminnm:
 case INS_fmul:
 case INS_fmulx:
 case INS_fnmul:
Expand DownExpand Up@@ -13132,6 +13150,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_addp:
 case INS_cmtst:
 case INS_pmul:
 case INS_sabd:
Expand DownExpand Up@@ -13160,7 +13179,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 }
 break;

 case IF_DV_3DI: // mul, mla, mls (scalar by elem)
 case IF_DV_3DI: // fmul, fmulx, fmla, fmls (scalar by elem)
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -13320,6 +13339,33 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_1C;
 break;

 case IF_DV_2T: // addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv
 switch (ins)
 {
 case INS_addv:
 case INS_saddlv:
 case INS_uaddlv:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_smaxv:
 case INS_sminv:
 case INS_umaxv:
 case INS_uminv:
 case INS_sha256h2:
 case INS_sha256su1:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
 break;
 }
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
Expand Down

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Universal Dark Mode - works on any site\n(function() {\n var enabled = true;\n \n function applyDarkMode() {\n if (!enabled) return;\n \n // Create style element if it doesn't exist\n var style = document.getElementById('universal-dark-mode-style');\n if (!style) {\n style = document.createElement('style');\n style.id = 'universal-dark-mode-style';\n document.head.appendChild(style);\n }\n \n // Dark mode CSS - inverts colors but preserves images/video\n style.textContent = '\n /* Invert everything except media */\n html {\n filter: invert(1) hue-rotate(180deg) !important;\n background: #1a1a2e !important;\n }\n \n /* Restore images, videos, iframes, canvas */\n img, video, iframe, canvas, svg, picture, [style*=\"background-image\"] {\n filter: invert(1) hue-rotate(180deg) !important;\n }\n \n /* Preserve specific elements that should not be inverted */\n .no-dark-mode, .no-dark-mode *,\n [data-theme=\"light\"], [data-theme=\"light\"],\n .ace_editor, .ace_editor *,\n .CodeMirror, .CodeMirror *,\n .monaco-editor, .monaco-editor *,\n .markdown-body pre, .markdown-body pre *,\n .highlight, .highlight *,\n pre code, pre code * {\n filter: none !important;\n }\n \n /* Fix common UI elements */\n .modal, .popup, .dropdown-menu, .tooltip, .popover {\n filter: invert(1) hue-rotate(180deg) !important;\n background: #2d2d44 !important;\n border-color: #444 !important;\n }\n \n /* Scrollbars */\n ::-webkit-scrollbar { background: #1a1a2e !important; }\n ::-webkit-scrollbar-thumb { background: #444 !important; }\n ::-webkit-scrollbar-thumb:hover { background: #555 !important; }\n \n /* Selection */\n ::selection { background: #4ecdc4 !important; color: #1a1a2e !important; }\n ::-moz-selection { background: #4ecdc4 !important; color: #1a1a2e !important; }\n ';\n }\n \n function removeDarkMode() {\n var style = document.getElementById('universal-dark-mode-style');\n if (style) style.remove();\n }\n \n // Toggle with Alt+Shift+D\n document.addEventListener('keydown', function(e) {\n if (e.altKey && e.shiftKey && e.key === 'D') {\n e.preventDefault();\n enabled = !enabled;\n if (enabled) {\n applyDarkMode();\n console.log('[Universal Dark Mode] Enabled');\n } else {\n removeDarkMode();\n console.log('[Universal Dark Mode] Disabled');\n }\n }\n });\n \n // Apply on load\n applyDarkMode();\n \n // Re-apply on dynamic content\n var observer = new MutationObserver(function(mutations) {\n if (enabled && !document.getElementById('universal-dark-mode-style')) {\n applyDarkMode();\n }\n });\n observer.observe(document.head, { childList: true });\n \n console.log('[Universal Dark Mode] Loaded - Press Alt+Shift+D to toggle');\n})();", "Universal Dark Mode");
}
} catch(__e) { console.warn('[Userscript:Universal Dark Mode]', __e); }
})();
})();

Skip to content
Enable assert in perfScoreUnhandledInstruction#810

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 Merged

briansull
merged 6 commits into

from

Mar 3, 2020
 Merged


Enable assert in perfScoreUnhandledInstruction
#810
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6 commits


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54c1e90

perfScoreUnhandledInstruction will now assert in a DEBUG or CHECKED b…


briansull Dec 12, 2019
db05fa1

Added PerfScore values for IF_DV_2T: // addv, saddlv, smaxv, sminv, u…


briansull Feb 28, 2020
9266cfe

Add PerfScore support for fcmeq, fcmge, fcmgt, fcmle, fcmlt, fcvtl2, …


briansull Feb 28, 2020
f52992e

Added PerfScore support for INS_addp


briansull Mar 2, 2020
dcb1007

Addded fmla and fmls


briansull Mar 2, 2020
6b0d3ee

Update flma and fmls


briansull Mar 3, 2020

File filter

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13 changes: 6 additions & 7 deletions
src/coreclr/src/jit/emit.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -1146,18 +1146,17 @@ float emitter::insEvaluateExecutionCost(instrDesc* id)
// if we return these are updated with default values
//
// Notes:
// When validating that the PerfScore handles every instruction.
// the #if 0 block is changed into a #ifdef DEBUG
// We will print the instruction and instruction group
// We print the instruction and instruction group
// and instead of returning we will assert
//
// Otherwise we will return default latencies of 1 cycle.
// This method asserts with a debug/checked build
// and returns default latencies of 1 cycle otherwise.
//
void emitter::perfScoreUnhandledInstruction(instrDesc* id, insExecutionCharacteristics* pResult)
{
// Change this to #ifdef DEBUG to assert on any unhandled instructions
#if 0
printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()), emitIfName(id->idInsFmt()));
#ifdef DEBUG
 printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()),
 emitIfName(id->idInsFmt()));
 assert(!"PerfScore: unhandled instruction");
#endif
 pResult->insThroughput = PERFSCORE_THROUGHPUT_1C;
Expand Down

58 changes: 52 additions & 6 deletions
src/coreclr/src/jit/emitarm64.cpp

View file


Open in desktop

Original file line numberDiff line numberDiff line change
Expand Up@@ -12850,7 +12850,19 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_fcmeq:
 case INS_fcmge:
 case INS_fcmgt:
 case INS_fcmle:
 case INS_fcmlt:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_fcvtl:
 case INS_fcvtl2:
 case INS_fcvtn:
 case INS_fcvtn2:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -12880,11 +12892,15 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins

 case IF_DV_2Q: // faddp, fmaxnmp, fmaxp, fminnmp, fminp (scalar)
 case IF_DV_2R: // fmaxnmv, fmaxv, fminnmv, fminv
 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_2S: // addp (scalar)
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case IF_DV_3B: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX
 // faddp, fmaxnmp, fmaxp, fminnmp, fminp, addp (vector)
 switch (ins)
Expand All@@ -12898,6 +12914,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fsub:
 case INS_fmul:
 case INS_fmulx:
 case INS_fmla:
 case INS_fmls:
 result.insThroughput = PERFSCORE_THROUGHPUT_2X;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand All@@ -12907,7 +12925,6 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 case INS_fmaxp:
 case INS_fminnmp:
 case INS_fminp:
 case INS_addp:
 if (id->idOpSize() == EA_16BYTE)
 {
 // Q-form
Expand DownExpand Up@@ -12975,15 +12992,16 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar)
 switch (ins)
 {
 case INS_fadd:
 case INS_fsub:
 case INS_fmin:
 case INS_fminnm:
 case INS_fabd:
 case INS_fmax:
 case INS_fmaxnm:
 case INS_fmin:
 case INS_fminnm:
 case INS_fmul:
 case INS_fmulx:
 case INS_fnmul:
Expand DownExpand Up@@ -13132,6 +13150,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_2C;
 break;

 case INS_addp:
 case INS_cmtst:
 case INS_pmul:
 case INS_sabd:
Expand DownExpand Up@@ -13160,7 +13179,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 }
 break;

 case IF_DV_3DI: // mul, mla, mls (scalar by elem)
 case IF_DV_3DI: // fmul, fmulx, fmla, fmls (scalar by elem)
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;
Expand DownExpand Up@@ -13320,6 +13339,33 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
 result.insLatency = PERFSCORE_LATENCY_1C;
 break;

 case IF_DV_2T: // addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv
 switch (ins)
 {
 case INS_addv:
 case INS_saddlv:
 case INS_uaddlv:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_3C;
 break;

 case INS_smaxv:
 case INS_sminv:
 case INS_umaxv:
 case INS_uminv:
 case INS_sha256h2:
 case INS_sha256su1:
 result.insThroughput = PERFSCORE_THROUGHPUT_1C;
 result.insLatency = PERFSCORE_LATENCY_4C;
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
 break;
 }
 break;

 default:
 // all other instructions
 perfScoreUnhandledInstruction(id, &result);
Expand Down