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This repository has been archived. Please navigate to RedPitaya/OpenLabCtrl.

OpenLabCtrl

Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.

Features:

  • Real-time control (8ns resolution) of:

    • RF out (x2): amplitude, frequency, phase
    • RF in (x2): acquisition, decimation
    • Digital IOs (x16): direction, output value, input acquisition
    • Serial communication: SPI, UART (via Digital IOs)
    • LEDs (x8): output value
    • Analog out, PWM + LPF (x4): output value
    • Analog in, XADC (x4): acquisition, decimation

  • Experimental sequences with:

    • Independent and parameterizable sub-sequences (IoSyncFrames, ParameterizedIoSyncFrames) for modular coding and reduced compilation time
    • External triggering
    • Multi-device synchronization

  • Buffer size:

    • Instructions: 16MB, 2M instructions
    • Scope/Acquisition (x2): 8MB, 4M samples

Supported Devices

  • Redpitaya-125-14-z7010:
    • STEMlab 125-14 (Gen 1)
    • STEMlab 125-14 Low Noise (Gen 1)
    • STEMlab 125-14 (Gen 2)
    • STEMlab 125-14 Pro (Gen 2)
  • Redpitaya-125-14-z7020:
    • STEMlab 125-14 Z7020 Low Noise (Gen 1)
    • STEMlab 125-14 Pro Z7020 (Gen 2)

Installation

Dependencies

Please install the Zynq TCP Control library (TCP-based control utilities for ZYNQ FPGA boards, enabling remote bitstream loading and memory IO).

  • Clone the repository

    git clone https://github.com/dspsandbox/zynq_utils/tree/master/zynq_tcp_ctrl

  • Follow the remote & local installation instructions

This Library

  • Clone the Zynq TCP Control repository:

    git clone https://github.com/dspsandbox/OpenLabCtrl/tree/main

  • Navigate to the python lib and install via pip3 (-e for editable install):

    cd openlabctrl
python3 -m pip install --upgrade pip setuptools wheel
pip3 install -e .

Documentation

Examples

NotebookDescription
00_led_blink.ipynbTurn on/off LEDs with external triggering.
01_digital_in_out.ipynbConfigure digital IO direction and square wave generation
02_serial.ipynbExamples of UART and SPI transaction via digital IOs
03_analog_in_out.ipynbGeneration and acquisition of analog ramps via slow analog IOs
04_rf_in_out.ipynbRF synthesis and acquisition via high-speed analog IOs
05_param_io_frame.ipynbParameterizable IO frames and configurable sequences
06_multi_device_sync.ipynbMulti-device synchronization and scalability

IOs & Pin Mapping

IO Name (OpenLabCtrl library)Pin Name (see diagram above)Description
led[0-7]LED_0-7User LEDs
digital_io_0[0]DIO0_P (trig ext)Digital IO (3.3V)
digital_io_0[1]DIO0_NDigital IO (3.3V)
digital_io_0[2]DIO1_PDigital IO (3.3V)
digital_io_0[3]DIO1_NDigital IO (3.3V)
digital_io_1[0]DIO2_PDigital IO (3.3V)
digital_io_1[1]DIO2_NDigital IO (3.3V)
digital_io_1[2]DIO3_PDigital IO (3.3V)
digital_io_1[3]DIO3_NDigital IO (3.3V)
digital_io_2[0]DIO4_PDigital IO (3.3V)
digital_io_2[1]DIO4_NDigital IO (3.3V)
digital_io_2[2]DIO5_PDigital IO (3.3V)
digital_io_2[3]DIO5_NDigital IO (3.3V)
digital_io_3[0]DIO6_PDigital IO (3.3V)
digital_io_3[1]DIO6_NDigital IO (3.3V)
digital_io_3[2]DIO7_PDigital IO (3.3V)
digital_io_3[3]DIO7_NDigital IO (3.3V)
analog_in_0Analog input 0Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_1Analog input 1Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_2Analog input 2Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_3Analog input 3Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_out_0Analog Output 0Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_1Analog Output 1Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_2Analog Output 2Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_3Analog Output 3Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
rf_out_0OUT1Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_out_2OUT2Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_in_0IN1Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
rf_in_1IN2Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
daisy_0S1Synchronization connector (gen 1: SATA, gen 2: USB-C)
daisy_1S2Synchronization connector (gen 1: SATA, gen 2: USB-C)

About

Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.

dspsandbox.github.io/OpenLabCtrl/

Resources

Readme
MIT license
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Stars

3 stars

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0 watching

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0 forks
Report repository

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Packages

Contributors

Languages

, 'i'); if (__m === '*' || __re.test(location.href)) { injectUserscript("// Add copy buttons to all 
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})();
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try {
var __m = "github.com";
var __re = new RegExp('^' + "github\\.com" + '

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Repository files navigation
Warning
This repository has been archived. Please navigate to RedPitaya/OpenLabCtrl.
OpenLabCtrl
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
Features:
  • Real-time control (8ns resolution) of:
    • RF out (x2): amplitude, frequency, phase
    • RF in (x2): acquisition, decimation
    • Digital IOs (x16): direction, output value, input acquisition
    • Serial communication: SPI, UART (via Digital IOs)
    • LEDs (x8): output value
    • Analog out, PWM + LPF (x4): output value
    • Analog in, XADC (x4): acquisition, decimation
  • Experimental sequences with:
    • Independent and parameterizable sub-sequences (IoSyncFrames, ParameterizedIoSyncFrames) for modular coding and reduced compilation time
    • External triggering
    • Multi-device synchronization
  • Buffer size:
    • Instructions: 16MB, 2M instructions
    • Scope/Acquisition (x2): 8MB, 4M samples
Supported Devices
  • Redpitaya-125-14-z7010:

    • STEMlab 125-14 (Gen 1)
    • STEMlab 125-14 Low Noise (Gen 1)
    • STEMlab 125-14 (Gen 2)
    • STEMlab 125-14 Pro (Gen 2)
  • Redpitaya-125-14-z7020:

    • STEMlab 125-14 Z7020 Low Noise (Gen 1)
    • STEMlab 125-14 Pro Z7020 (Gen 2)
Installation
Dependencies
Please install the Zynq TCP Control library (TCP-based control utilities for ZYNQ FPGA boards, enabling remote bitstream loading and memory IO).
  • Clone the repository
    git clone https://github.com/dspsandbox/zynq_utils/tree/master/zynq_tcp_ctrl

  • Follow the remote & local installation instructions
This Library
  • Clone the Zynq TCP Control repository:
    git clone https://github.com/dspsandbox/OpenLabCtrl/tree/main

  • Navigate to the python lib and install via pip3 (-e for editable install):
    cd openlabctrl
python3 -m pip install --upgrade pip setuptools wheel
pip3 install -e .

Documentation
Examples
NotebookDescription
00_led_blink.ipynbTurn on/off LEDs with external triggering.
01_digital_in_out.ipynbConfigure digital IO direction and square wave generation
02_serial.ipynbExamples of UART and SPI transaction via digital IOs
03_analog_in_out.ipynbGeneration and acquisition of analog ramps via slow analog IOs
04_rf_in_out.ipynbRF synthesis and acquisition via high-speed analog IOs
05_param_io_frame.ipynbParameterizable IO frames and configurable sequences
06_multi_device_sync.ipynbMulti-device synchronization and scalability
IOs & Pin Mapping
IO Name (OpenLabCtrl library)Pin Name (see diagram above)Description
led[0-7]LED_0-7User LEDs
digital_io_0[0]DIO0_P (trig ext)Digital IO (3.3V)
digital_io_0[1]DIO0_NDigital IO (3.3V)
digital_io_0[2]DIO1_PDigital IO (3.3V)
digital_io_0[3]DIO1_NDigital IO (3.3V)
digital_io_1[0]DIO2_PDigital IO (3.3V)
digital_io_1[1]DIO2_NDigital IO (3.3V)
digital_io_1[2]DIO3_PDigital IO (3.3V)
digital_io_1[3]DIO3_NDigital IO (3.3V)
digital_io_2[0]DIO4_PDigital IO (3.3V)
digital_io_2[1]DIO4_NDigital IO (3.3V)
digital_io_2[2]DIO5_PDigital IO (3.3V)
digital_io_2[3]DIO5_NDigital IO (3.3V)
digital_io_3[0]DIO6_PDigital IO (3.3V)
digital_io_3[1]DIO6_NDigital IO (3.3V)
digital_io_3[2]DIO7_PDigital IO (3.3V)
digital_io_3[3]DIO7_NDigital IO (3.3V)
analog_in_0Analog input 0Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_1Analog input 1Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_2Analog input 2Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_3Analog input 3Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_out_0Analog Output 0Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_1Analog Output 1Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_2Analog Output 2Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_3Analog Output 3Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
rf_out_0OUT1Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_out_2OUT2Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_in_0IN1Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
rf_in_1IN2Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
daisy_0S1Synchronization connector (gen 1: SATA, gen 2: USB-C)
daisy_1S2Synchronization connector (gen 1: SATA, gen 2: USB-C)
About
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
dspsandbox.github.io/OpenLabCtrl/
Resources
Readme
MIT license
Activity
Stars
3 stars
Watchers
0 watching
Forks
0 forks
Report repository
Releases
Packages
Contributors
Languages

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Force GitHub README to respect dark mode\n(function() {\n var style = document.createElement('style');\n style.textContent = '\n .markdown-body {\n color-scheme: dark light;\n }\n .markdown-body pre { background: #161b22 !important; }\n .markdown-body code { background: rgba(110, 118, 129, 0.4) !important; }\n .markdown-body table th, .markdown-body table td { border-color: #30363d !important; }\n .markdown-body img { background: #0d1117; }\n .markdown-body blockquote { border-left-color: #8b949e; }\n .markdown-body hr { border-color: #30363d; }\n ';\n document.head.appendChild(style);\n})();", "GitHub Dark Mode README Fix");
}
} catch(__e) { console.warn('[Userscript:GitHub Dark Mode README Fix]', __e); }
})();
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try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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Repository files navigation
Warning
This repository has been archived. Please navigate to RedPitaya/OpenLabCtrl.
OpenLabCtrl
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
Features:
  • Real-time control (8ns resolution) of:
    • RF out (x2): amplitude, frequency, phase
    • RF in (x2): acquisition, decimation
    • Digital IOs (x16): direction, output value, input acquisition
    • Serial communication: SPI, UART (via Digital IOs)
    • LEDs (x8): output value
    • Analog out, PWM + LPF (x4): output value
    • Analog in, XADC (x4): acquisition, decimation
  • Experimental sequences with:
    • Independent and parameterizable sub-sequences (IoSyncFrames, ParameterizedIoSyncFrames) for modular coding and reduced compilation time
    • External triggering
    • Multi-device synchronization
  • Buffer size:
    • Instructions: 16MB, 2M instructions
    • Scope/Acquisition (x2): 8MB, 4M samples
Supported Devices
  • Redpitaya-125-14-z7010:

    • STEMlab 125-14 (Gen 1)
    • STEMlab 125-14 Low Noise (Gen 1)
    • STEMlab 125-14 (Gen 2)
    • STEMlab 125-14 Pro (Gen 2)
  • Redpitaya-125-14-z7020:

    • STEMlab 125-14 Z7020 Low Noise (Gen 1)
    • STEMlab 125-14 Pro Z7020 (Gen 2)
Installation
Dependencies
Please install the Zynq TCP Control library (TCP-based control utilities for ZYNQ FPGA boards, enabling remote bitstream loading and memory IO).
  • Clone the repository
    git clone https://github.com/dspsandbox/zynq_utils/tree/master/zynq_tcp_ctrl

  • Follow the remote & local installation instructions
This Library
  • Clone the Zynq TCP Control repository:
    git clone https://github.com/dspsandbox/OpenLabCtrl/tree/main

  • Navigate to the python lib and install via pip3 (-e for editable install):
    cd openlabctrl
python3 -m pip install --upgrade pip setuptools wheel
pip3 install -e .

Documentation
Examples
NotebookDescription
00_led_blink.ipynbTurn on/off LEDs with external triggering.
01_digital_in_out.ipynbConfigure digital IO direction and square wave generation
02_serial.ipynbExamples of UART and SPI transaction via digital IOs
03_analog_in_out.ipynbGeneration and acquisition of analog ramps via slow analog IOs
04_rf_in_out.ipynbRF synthesis and acquisition via high-speed analog IOs
05_param_io_frame.ipynbParameterizable IO frames and configurable sequences
06_multi_device_sync.ipynbMulti-device synchronization and scalability
IOs & Pin Mapping
IO Name (OpenLabCtrl library)Pin Name (see diagram above)Description
led[0-7]LED_0-7User LEDs
digital_io_0[0]DIO0_P (trig ext)Digital IO (3.3V)
digital_io_0[1]DIO0_NDigital IO (3.3V)
digital_io_0[2]DIO1_PDigital IO (3.3V)
digital_io_0[3]DIO1_NDigital IO (3.3V)
digital_io_1[0]DIO2_PDigital IO (3.3V)
digital_io_1[1]DIO2_NDigital IO (3.3V)
digital_io_1[2]DIO3_PDigital IO (3.3V)
digital_io_1[3]DIO3_NDigital IO (3.3V)
digital_io_2[0]DIO4_PDigital IO (3.3V)
digital_io_2[1]DIO4_NDigital IO (3.3V)
digital_io_2[2]DIO5_PDigital IO (3.3V)
digital_io_2[3]DIO5_NDigital IO (3.3V)
digital_io_3[0]DIO6_PDigital IO (3.3V)
digital_io_3[1]DIO6_NDigital IO (3.3V)
digital_io_3[2]DIO7_PDigital IO (3.3V)
digital_io_3[3]DIO7_NDigital IO (3.3V)
analog_in_0Analog input 0Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_1Analog input 1Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_2Analog input 2Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_3Analog input 3Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_out_0Analog Output 0Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_1Analog Output 1Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_2Analog Output 2Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_3Analog Output 3Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
rf_out_0OUT1Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_out_2OUT2Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_in_0IN1Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
rf_in_1IN2Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
daisy_0S1Synchronization connector (gen 1: SATA, gen 2: USB-C)
daisy_1S2Synchronization connector (gen 1: SATA, gen 2: USB-C)
About
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
dspsandbox.github.io/OpenLabCtrl/
Resources
Readme
MIT license
Activity
Stars
3 stars
Watchers
0 watching
Forks
0 forks
Report repository
Releases
Packages
Contributors
Languages

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Highlight search terms from Google/DuckDuckGo/Bing referrer\n(function() {\n var ref = document.referrer;\n var terms = [];\n \n if (ref.includes('google.com') || ref.includes('duckduckgo.com') || ref.includes('bing.com')) {\n var url = new URL(ref);\n var q = url.searchParams.get('q') || url.searchParams.get('p');\n if (q) {\n terms = q.split(/\\s+/).filter(function(t) { return t.length > 2; });\n }\n }\n \n if (terms.length === 0) return;\n \n var style = document.createElement('style');\n style.textContent = '.userscript-highlight { background: #fbbf24; color: #1a1a2e; padding: 1px 3px; border-radius: 2px; }';\n document.head.appendChild(style);\n \n function highlight(node) {\n if (node.nodeType === 3) { // text node\n var text = node.textContent;\n var found = false;\n terms.forEach(function(term) {\n var regex = new RegExp('(' + term.replace(/[.*+?^${}()|[\\]\\\\]/g, '\\\\') + ')', 'gi');\n if (regex.test(text)) {\n found = true;\n var frag = document.createDocumentFragment();\n var parts = text.split(regex);\n parts.forEach(function(part, i) {\n if (i % 2 === 0) {\n frag.appendChild(document.createTextNode(part));\n } else {\n var span = document.createElement('span');\n span.className = 'userscript-highlight';\n span.textContent = part;\n frag.appendChild(span);\n }\n });\n node.parentNode.replaceChild(frag, node);\n }\n });\n } else if (node.nodeType === 1 && node.childNodes) { // element\n var skipTags = ['SCRIPT', 'STYLE', 'NOSCRIPT', 'TEXTAREA', 'INPUT', 'SELECT'];\n if (!skipTags.includes(node.tagName)) {\n Array.from(node.childNodes).forEach(highlight);\n }\n }\n }\n \n highlight(document.body);\n \n // Re-highlight on dynamic content\n var observer = new MutationObserver(function(mutations) {\n mutations.forEach(function(m) {\n m.addedNodes.forEach(function(node) {\n if (node.nodeType === 1 || node.nodeType === 3) highlight(node);\n });\n });\n });\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Highlight Search Terms");
}
} catch(__e) { console.warn('[Userscript:Highlight Search Terms]', __e); }
})();
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try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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Repository files navigation
Warning
This repository has been archived. Please navigate to RedPitaya/OpenLabCtrl.
OpenLabCtrl
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
Features:
  • Real-time control (8ns resolution) of:
    • RF out (x2): amplitude, frequency, phase
    • RF in (x2): acquisition, decimation
    • Digital IOs (x16): direction, output value, input acquisition
    • Serial communication: SPI, UART (via Digital IOs)
    • LEDs (x8): output value
    • Analog out, PWM + LPF (x4): output value
    • Analog in, XADC (x4): acquisition, decimation
  • Experimental sequences with:
    • Independent and parameterizable sub-sequences (IoSyncFrames, ParameterizedIoSyncFrames) for modular coding and reduced compilation time
    • External triggering
    • Multi-device synchronization
  • Buffer size:
    • Instructions: 16MB, 2M instructions
    • Scope/Acquisition (x2): 8MB, 4M samples
Supported Devices
  • Redpitaya-125-14-z7010:

    • STEMlab 125-14 (Gen 1)
    • STEMlab 125-14 Low Noise (Gen 1)
    • STEMlab 125-14 (Gen 2)
    • STEMlab 125-14 Pro (Gen 2)
  • Redpitaya-125-14-z7020:

    • STEMlab 125-14 Z7020 Low Noise (Gen 1)
    • STEMlab 125-14 Pro Z7020 (Gen 2)
Installation
Dependencies
Please install the Zynq TCP Control library (TCP-based control utilities for ZYNQ FPGA boards, enabling remote bitstream loading and memory IO).
  • Clone the repository
    git clone https://github.com/dspsandbox/zynq_utils/tree/master/zynq_tcp_ctrl

  • Follow the remote & local installation instructions
This Library
  • Clone the Zynq TCP Control repository:
    git clone https://github.com/dspsandbox/OpenLabCtrl/tree/main

  • Navigate to the python lib and install via pip3 (-e for editable install):
    cd openlabctrl
python3 -m pip install --upgrade pip setuptools wheel
pip3 install -e .

Documentation
Examples
NotebookDescription
00_led_blink.ipynbTurn on/off LEDs with external triggering.
01_digital_in_out.ipynbConfigure digital IO direction and square wave generation
02_serial.ipynbExamples of UART and SPI transaction via digital IOs
03_analog_in_out.ipynbGeneration and acquisition of analog ramps via slow analog IOs
04_rf_in_out.ipynbRF synthesis and acquisition via high-speed analog IOs
05_param_io_frame.ipynbParameterizable IO frames and configurable sequences
06_multi_device_sync.ipynbMulti-device synchronization and scalability
IOs & Pin Mapping
IO Name (OpenLabCtrl library)Pin Name (see diagram above)Description
led[0-7]LED_0-7User LEDs
digital_io_0[0]DIO0_P (trig ext)Digital IO (3.3V)
digital_io_0[1]DIO0_NDigital IO (3.3V)
digital_io_0[2]DIO1_PDigital IO (3.3V)
digital_io_0[3]DIO1_NDigital IO (3.3V)
digital_io_1[0]DIO2_PDigital IO (3.3V)
digital_io_1[1]DIO2_NDigital IO (3.3V)
digital_io_1[2]DIO3_PDigital IO (3.3V)
digital_io_1[3]DIO3_NDigital IO (3.3V)
digital_io_2[0]DIO4_PDigital IO (3.3V)
digital_io_2[1]DIO4_NDigital IO (3.3V)
digital_io_2[2]DIO5_PDigital IO (3.3V)
digital_io_2[3]DIO5_NDigital IO (3.3V)
digital_io_3[0]DIO6_PDigital IO (3.3V)
digital_io_3[1]DIO6_NDigital IO (3.3V)
digital_io_3[2]DIO7_PDigital IO (3.3V)
digital_io_3[3]DIO7_NDigital IO (3.3V)
analog_in_0Analog input 0Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_1Analog input 1Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_2Analog input 2Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_3Analog input 3Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_out_0Analog Output 0Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_1Analog Output 1Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_2Analog Output 2Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_3Analog Output 3Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
rf_out_0OUT1Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_out_2OUT2Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_in_0IN1Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
rf_in_1IN2Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
daisy_0S1Synchronization connector (gen 1: SATA, gen 2: USB-C)
daisy_1S2Synchronization connector (gen 1: SATA, gen 2: USB-C)
About
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
dspsandbox.github.io/OpenLabCtrl/
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MIT license
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, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Strip utm_, fbclid, gclid, etc. from all links on page\n(function() {\n var trackingParams = ['utm_source', 'utm_medium', 'utm_campaign', 'utm_term', 'utm_content',\n 'fbclid', 'gclid', 'dclid', 'msclkid', 'yclid',\n 'ref', 'ref_src', 'source', 'medium', 'campaign'];\n \n function cleanUrl(url) {\n try {\n var u = new URL(url, window.location.origin);\n var changed = false;\n trackingParams.forEach(function(p) {\n if (u.searchParams.has(p)) {\n u.searchParams.delete(p);\n changed = true;\n }\n });\n return changed ? u.toString() : url;\n } catch (e) {\n return url;\n }\n }\n \n function cleanLinks() {\n document.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n \n cleanLinks();\n \n var observer = new MutationObserver(function(mutations) {\n mutations.forEach(function(m) {\n m.addedNodes.forEach(function(node) {\n if (node.nodeType === 1) {\n if (node.tagName === 'A') cleanLinks();\n node.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n });\n });\n });\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Remove Tracking Parameters from Links");
}
} catch(__e) { console.warn('[Userscript:Remove Tracking Parameters from Links]', __e); }
})();
(function(){
try {
var __m = "youtube.com";
var __re = new RegExp('^' + "youtube\\.com" + '

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This repository has been archived. Please navigate to RedPitaya/OpenLabCtrl.
OpenLabCtrl
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
Features:
  • Real-time control (8ns resolution) of:
    • RF out (x2): amplitude, frequency, phase
    • RF in (x2): acquisition, decimation
    • Digital IOs (x16): direction, output value, input acquisition
    • Serial communication: SPI, UART (via Digital IOs)
    • LEDs (x8): output value
    • Analog out, PWM + LPF (x4): output value
    • Analog in, XADC (x4): acquisition, decimation
  • Experimental sequences with:
    • Independent and parameterizable sub-sequences (IoSyncFrames, ParameterizedIoSyncFrames) for modular coding and reduced compilation time
    • External triggering
    • Multi-device synchronization
  • Buffer size:
    • Instructions: 16MB, 2M instructions
    • Scope/Acquisition (x2): 8MB, 4M samples
Supported Devices
  • Redpitaya-125-14-z7010:

    • STEMlab 125-14 (Gen 1)
    • STEMlab 125-14 Low Noise (Gen 1)
    • STEMlab 125-14 (Gen 2)
    • STEMlab 125-14 Pro (Gen 2)
  • Redpitaya-125-14-z7020:

    • STEMlab 125-14 Z7020 Low Noise (Gen 1)
    • STEMlab 125-14 Pro Z7020 (Gen 2)
Installation
Dependencies
Please install the Zynq TCP Control library (TCP-based control utilities for ZYNQ FPGA boards, enabling remote bitstream loading and memory IO).
  • Clone the repository
    git clone https://github.com/dspsandbox/zynq_utils/tree/master/zynq_tcp_ctrl

  • Follow the remote & local installation instructions
This Library
  • Clone the Zynq TCP Control repository:
    git clone https://github.com/dspsandbox/OpenLabCtrl/tree/main

  • Navigate to the python lib and install via pip3 (-e for editable install):
    cd openlabctrl
python3 -m pip install --upgrade pip setuptools wheel
pip3 install -e .

Documentation
Examples
NotebookDescription
00_led_blink.ipynbTurn on/off LEDs with external triggering.
01_digital_in_out.ipynbConfigure digital IO direction and square wave generation
02_serial.ipynbExamples of UART and SPI transaction via digital IOs
03_analog_in_out.ipynbGeneration and acquisition of analog ramps via slow analog IOs
04_rf_in_out.ipynbRF synthesis and acquisition via high-speed analog IOs
05_param_io_frame.ipynbParameterizable IO frames and configurable sequences
06_multi_device_sync.ipynbMulti-device synchronization and scalability
IOs & Pin Mapping
IO Name (OpenLabCtrl library)Pin Name (see diagram above)Description
led[0-7]LED_0-7User LEDs
digital_io_0[0]DIO0_P (trig ext)Digital IO (3.3V)
digital_io_0[1]DIO0_NDigital IO (3.3V)
digital_io_0[2]DIO1_PDigital IO (3.3V)
digital_io_0[3]DIO1_NDigital IO (3.3V)
digital_io_1[0]DIO2_PDigital IO (3.3V)
digital_io_1[1]DIO2_NDigital IO (3.3V)
digital_io_1[2]DIO3_PDigital IO (3.3V)
digital_io_1[3]DIO3_NDigital IO (3.3V)
digital_io_2[0]DIO4_PDigital IO (3.3V)
digital_io_2[1]DIO4_NDigital IO (3.3V)
digital_io_2[2]DIO5_PDigital IO (3.3V)
digital_io_2[3]DIO5_NDigital IO (3.3V)
digital_io_3[0]DIO6_PDigital IO (3.3V)
digital_io_3[1]DIO6_NDigital IO (3.3V)
digital_io_3[2]DIO7_PDigital IO (3.3V)
digital_io_3[3]DIO7_NDigital IO (3.3V)
analog_in_0Analog input 0Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_1Analog input 1Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_2Analog input 2Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_3Analog input 3Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_out_0Analog Output 0Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_1Analog Output 1Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_2Analog Output 2Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_3Analog Output 3Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
rf_out_0OUT1Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_out_2OUT2Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_in_0IN1Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
rf_in_1IN2Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
daisy_0S1Synchronization connector (gen 1: SATA, gen 2: USB-C)
daisy_1S2Synchronization connector (gen 1: SATA, gen 2: USB-C)
About
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
dspsandbox.github.io/OpenLabCtrl/
Resources
Readme
MIT license
Activity
Stars
3 stars
Watchers
0 watching
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0 forks
Report repository
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, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Auto-enable theater mode on YouTube\n(function() {\n function tryTheater() {\n var btn = document.querySelector('button[aria-label=\"Theater mode\"], ytd-player #player button[title=\"Theater mode\"]');\n if (btn && !btn.classList.contains('activated')) {\n btn.click();\n }\n }\n \n // Try immediately\n tryTheater();\n \n // Try after navigation (SPA)\n var lastUrl = location.href;\n setInterval(function() {\n if (location.href !== lastUrl) {\n lastUrl = location.href;\n setTimeout(tryTheater, 500);\n }\n }, 1000);\n \n // Also try on player load\n var observer = new MutationObserver(tryTheater);\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "YouTube Theater Mode Default");
}
} catch(__e) { console.warn('[Userscript:YouTube Theater Mode Default]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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Repository files navigation
Warning
This repository has been archived. Please navigate to RedPitaya/OpenLabCtrl.
OpenLabCtrl
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
Features:
  • Real-time control (8ns resolution) of:
    • RF out (x2): amplitude, frequency, phase
    • RF in (x2): acquisition, decimation
    • Digital IOs (x16): direction, output value, input acquisition
    • Serial communication: SPI, UART (via Digital IOs)
    • LEDs (x8): output value
    • Analog out, PWM + LPF (x4): output value
    • Analog in, XADC (x4): acquisition, decimation
  • Experimental sequences with:
    • Independent and parameterizable sub-sequences (IoSyncFrames, ParameterizedIoSyncFrames) for modular coding and reduced compilation time
    • External triggering
    • Multi-device synchronization
  • Buffer size:
    • Instructions: 16MB, 2M instructions
    • Scope/Acquisition (x2): 8MB, 4M samples
Supported Devices
  • Redpitaya-125-14-z7010:

    • STEMlab 125-14 (Gen 1)
    • STEMlab 125-14 Low Noise (Gen 1)
    • STEMlab 125-14 (Gen 2)
    • STEMlab 125-14 Pro (Gen 2)
  • Redpitaya-125-14-z7020:

    • STEMlab 125-14 Z7020 Low Noise (Gen 1)
    • STEMlab 125-14 Pro Z7020 (Gen 2)
Installation
Dependencies
Please install the Zynq TCP Control library (TCP-based control utilities for ZYNQ FPGA boards, enabling remote bitstream loading and memory IO).
  • Clone the repository
    git clone https://github.com/dspsandbox/zynq_utils/tree/master/zynq_tcp_ctrl

  • Follow the remote & local installation instructions
This Library
  • Clone the Zynq TCP Control repository:
    git clone https://github.com/dspsandbox/OpenLabCtrl/tree/main

  • Navigate to the python lib and install via pip3 (-e for editable install):
    cd openlabctrl
python3 -m pip install --upgrade pip setuptools wheel
pip3 install -e .

Documentation
Examples
NotebookDescription
00_led_blink.ipynbTurn on/off LEDs with external triggering.
01_digital_in_out.ipynbConfigure digital IO direction and square wave generation
02_serial.ipynbExamples of UART and SPI transaction via digital IOs
03_analog_in_out.ipynbGeneration and acquisition of analog ramps via slow analog IOs
04_rf_in_out.ipynbRF synthesis and acquisition via high-speed analog IOs
05_param_io_frame.ipynbParameterizable IO frames and configurable sequences
06_multi_device_sync.ipynbMulti-device synchronization and scalability
IOs & Pin Mapping
IO Name (OpenLabCtrl library)Pin Name (see diagram above)Description
led[0-7]LED_0-7User LEDs
digital_io_0[0]DIO0_P (trig ext)Digital IO (3.3V)
digital_io_0[1]DIO0_NDigital IO (3.3V)
digital_io_0[2]DIO1_PDigital IO (3.3V)
digital_io_0[3]DIO1_NDigital IO (3.3V)
digital_io_1[0]DIO2_PDigital IO (3.3V)
digital_io_1[1]DIO2_NDigital IO (3.3V)
digital_io_1[2]DIO3_PDigital IO (3.3V)
digital_io_1[3]DIO3_NDigital IO (3.3V)
digital_io_2[0]DIO4_PDigital IO (3.3V)
digital_io_2[1]DIO4_NDigital IO (3.3V)
digital_io_2[2]DIO5_PDigital IO (3.3V)
digital_io_2[3]DIO5_NDigital IO (3.3V)
digital_io_3[0]DIO6_PDigital IO (3.3V)
digital_io_3[1]DIO6_NDigital IO (3.3V)
digital_io_3[2]DIO7_PDigital IO (3.3V)
digital_io_3[3]DIO7_NDigital IO (3.3V)
analog_in_0Analog input 0Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_1Analog input 1Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_2Analog input 2Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_3Analog input 3Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_out_0Analog Output 0Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_1Analog Output 1Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_2Analog Output 2Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_3Analog Output 3Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
rf_out_0OUT1Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_out_2OUT2Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_in_0IN1Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
rf_in_1IN2Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
daisy_0S1Synchronization connector (gen 1: SATA, gen 2: USB-C)
daisy_1S2Synchronization connector (gen 1: SATA, gen 2: USB-C)
About
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
dspsandbox.github.io/OpenLabCtrl/
Resources
Readme
MIT license
Activity
Stars
3 stars
Watchers
0 watching
Forks
0 forks
Report repository
Releases
Packages
Contributors
Languages

, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Remove or un-stick sticky/fixed headers that block content\n(function() {\n function unstick() {\n document.querySelectorAll('header, nav, [role=\"banner\"], .header, .navbar, .sticky, .fixed-top, [style*=\"position: fixed\"], [style*=\"position:sticky\"]').forEach(function(el) {\n if (el.style.position === 'fixed' || el.style.position === 'sticky' || \n getComputedStyle(el).position === 'fixed' || getComputedStyle(el).position === 'sticky') {\n el.style.position = 'static';\n el.style.top = 'auto';\n el.style.zIndex = 'auto';\n }\n });\n }\n \n unstick();\n \n var observer = new MutationObserver(unstick);\n observer.observe(document.body, { childList: true, subtree: true, attributes: true, attributeFilter: ['style', 'class'] });\n})();", "Kill Sticky Headers");
}
} catch(__e) { console.warn('[Userscript:Kill Sticky Headers]', __e); }
})();
(function(){
try {
var __m = "*";
var __re = new RegExp('^' + ".*" + '

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Repository files navigation
Warning
This repository has been archived. Please navigate to RedPitaya/OpenLabCtrl.
OpenLabCtrl
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
Features:
  • Real-time control (8ns resolution) of:
    • RF out (x2): amplitude, frequency, phase
    • RF in (x2): acquisition, decimation
    • Digital IOs (x16): direction, output value, input acquisition
    • Serial communication: SPI, UART (via Digital IOs)
    • LEDs (x8): output value
    • Analog out, PWM + LPF (x4): output value
    • Analog in, XADC (x4): acquisition, decimation
  • Experimental sequences with:
    • Independent and parameterizable sub-sequences (IoSyncFrames, ParameterizedIoSyncFrames) for modular coding and reduced compilation time
    • External triggering
    • Multi-device synchronization
  • Buffer size:
    • Instructions: 16MB, 2M instructions
    • Scope/Acquisition (x2): 8MB, 4M samples
Supported Devices
  • Redpitaya-125-14-z7010:

    • STEMlab 125-14 (Gen 1)
    • STEMlab 125-14 Low Noise (Gen 1)
    • STEMlab 125-14 (Gen 2)
    • STEMlab 125-14 Pro (Gen 2)
  • Redpitaya-125-14-z7020:

    • STEMlab 125-14 Z7020 Low Noise (Gen 1)
    • STEMlab 125-14 Pro Z7020 (Gen 2)
Installation
Dependencies
Please install the Zynq TCP Control library (TCP-based control utilities for ZYNQ FPGA boards, enabling remote bitstream loading and memory IO).
  • Clone the repository
    git clone https://github.com/dspsandbox/zynq_utils/tree/master/zynq_tcp_ctrl

  • Follow the remote & local installation instructions
This Library
  • Clone the Zynq TCP Control repository:
    git clone https://github.com/dspsandbox/OpenLabCtrl/tree/main

  • Navigate to the python lib and install via pip3 (-e for editable install):
    cd openlabctrl
python3 -m pip install --upgrade pip setuptools wheel
pip3 install -e .

Documentation
Examples
NotebookDescription
00_led_blink.ipynbTurn on/off LEDs with external triggering.
01_digital_in_out.ipynbConfigure digital IO direction and square wave generation
02_serial.ipynbExamples of UART and SPI transaction via digital IOs
03_analog_in_out.ipynbGeneration and acquisition of analog ramps via slow analog IOs
04_rf_in_out.ipynbRF synthesis and acquisition via high-speed analog IOs
05_param_io_frame.ipynbParameterizable IO frames and configurable sequences
06_multi_device_sync.ipynbMulti-device synchronization and scalability
IOs & Pin Mapping
IO Name (OpenLabCtrl library)Pin Name (see diagram above)Description
led[0-7]LED_0-7User LEDs
digital_io_0[0]DIO0_P (trig ext)Digital IO (3.3V)
digital_io_0[1]DIO0_NDigital IO (3.3V)
digital_io_0[2]DIO1_PDigital IO (3.3V)
digital_io_0[3]DIO1_NDigital IO (3.3V)
digital_io_1[0]DIO2_PDigital IO (3.3V)
digital_io_1[1]DIO2_NDigital IO (3.3V)
digital_io_1[2]DIO3_PDigital IO (3.3V)
digital_io_1[3]DIO3_NDigital IO (3.3V)
digital_io_2[0]DIO4_PDigital IO (3.3V)
digital_io_2[1]DIO4_NDigital IO (3.3V)
digital_io_2[2]DIO5_PDigital IO (3.3V)
digital_io_2[3]DIO5_NDigital IO (3.3V)
digital_io_3[0]DIO6_PDigital IO (3.3V)
digital_io_3[1]DIO6_NDigital IO (3.3V)
digital_io_3[2]DIO7_PDigital IO (3.3V)
digital_io_3[3]DIO7_NDigital IO (3.3V)
analog_in_0Analog input 0Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_1Analog input 1Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_2Analog input 2Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_3Analog input 3Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_out_0Analog Output 0Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_1Analog Output 1Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_2Analog Output 2Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_3Analog Output 3Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
rf_out_0OUT1Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_out_2OUT2Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_in_0IN1Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
rf_in_1IN2Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
daisy_0S1Synchronization connector (gen 1: SATA, gen 2: USB-C)
daisy_1S2Synchronization connector (gen 1: SATA, gen 2: USB-C)
About
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
dspsandbox.github.io/OpenLabCtrl/
Resources
Readme
MIT license
Activity
Stars
3 stars
Watchers
0 watching
Forks
0 forks
Report repository
Releases
Packages
Contributors
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, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Universal Dark Mode - works on any site\n(function() {\n var enabled = true;\n \n function applyDarkMode() {\n if (!enabled) return;\n \n // Create style element if it doesn't exist\n var style = document.getElementById('universal-dark-mode-style');\n if (!style) {\n style = document.createElement('style');\n style.id = 'universal-dark-mode-style';\n document.head.appendChild(style);\n }\n \n // Dark mode CSS - inverts colors but preserves images/video\n style.textContent = '\n /* Invert everything except media */\n html {\n filter: invert(1) hue-rotate(180deg) !important;\n background: #1a1a2e !important;\n }\n \n /* Restore images, videos, iframes, canvas */\n img, video, iframe, canvas, svg, picture, [style*=\"background-image\"] {\n filter: invert(1) hue-rotate(180deg) !important;\n }\n \n /* Preserve specific elements that should not be inverted */\n .no-dark-mode, .no-dark-mode *,\n [data-theme=\"light\"], [data-theme=\"light\"],\n .ace_editor, .ace_editor *,\n .CodeMirror, .CodeMirror *,\n .monaco-editor, .monaco-editor *,\n .markdown-body pre, .markdown-body pre *,\n .highlight, .highlight *,\n pre code, pre code * {\n filter: none !important;\n }\n \n /* Fix common UI elements */\n .modal, .popup, .dropdown-menu, .tooltip, .popover {\n filter: invert(1) hue-rotate(180deg) !important;\n background: #2d2d44 !important;\n border-color: #444 !important;\n }\n \n /* Scrollbars */\n ::-webkit-scrollbar { background: #1a1a2e !important; }\n ::-webkit-scrollbar-thumb { background: #444 !important; }\n ::-webkit-scrollbar-thumb:hover { background: #555 !important; }\n \n /* Selection */\n ::selection { background: #4ecdc4 !important; color: #1a1a2e !important; }\n ::-moz-selection { background: #4ecdc4 !important; color: #1a1a2e !important; }\n ';\n }\n \n function removeDarkMode() {\n var style = document.getElementById('universal-dark-mode-style');\n if (style) style.remove();\n }\n \n // Toggle with Alt+Shift+D\n document.addEventListener('keydown', function(e) {\n if (e.altKey && e.shiftKey && e.key === 'D') {\n e.preventDefault();\n enabled = !enabled;\n if (enabled) {\n applyDarkMode();\n console.log('[Universal Dark Mode] Enabled');\n } else {\n removeDarkMode();\n console.log('[Universal Dark Mode] Disabled');\n }\n }\n });\n \n // Apply on load\n applyDarkMode();\n \n // Re-apply on dynamic content\n var observer = new MutationObserver(function(mutations) {\n if (enabled && !document.getElementById('universal-dark-mode-style')) {\n applyDarkMode();\n }\n });\n observer.observe(document.head, { childList: true });\n \n console.log('[Universal Dark Mode] Loaded - Press Alt+Shift+D to toggle');\n})();", "Universal Dark Mode");
}
} catch(__e) { console.warn('[Userscript:Universal Dark Mode]', __e); }
})();
})();

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OpenLabCtrl
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
Features:
  • Real-time control (8ns resolution) of:
    • RF out (x2): amplitude, frequency, phase
    • RF in (x2): acquisition, decimation
    • Digital IOs (x16): direction, output value, input acquisition
    • Serial communication: SPI, UART (via Digital IOs)
    • LEDs (x8): output value
    • Analog out, PWM + LPF (x4): output value
    • Analog in, XADC (x4): acquisition, decimation
  • Experimental sequences with:
    • Independent and parameterizable sub-sequences (IoSyncFrames, ParameterizedIoSyncFrames) for modular coding and reduced compilation time
    • External triggering
    • Multi-device synchronization
  • Buffer size:
    • Instructions: 16MB, 2M instructions
    • Scope/Acquisition (x2): 8MB, 4M samples
Supported Devices
  • Redpitaya-125-14-z7010:

    • STEMlab 125-14 (Gen 1)
    • STEMlab 125-14 Low Noise (Gen 1)
    • STEMlab 125-14 (Gen 2)
    • STEMlab 125-14 Pro (Gen 2)
  • Redpitaya-125-14-z7020:

    • STEMlab 125-14 Z7020 Low Noise (Gen 1)
    • STEMlab 125-14 Pro Z7020 (Gen 2)
Installation
Dependencies
Please install the Zynq TCP Control library (TCP-based control utilities for ZYNQ FPGA boards, enabling remote bitstream loading and memory IO).
  • Clone the repository
    git clone https://github.com/dspsandbox/zynq_utils/tree/master/zynq_tcp_ctrl

  • Follow the remote & local installation instructions
This Library
  • Clone the Zynq TCP Control repository:
    git clone https://github.com/dspsandbox/OpenLabCtrl/tree/main

  • Navigate to the python lib and install via pip3 (-e for editable install):
    cd openlabctrl
python3 -m pip install --upgrade pip setuptools wheel
pip3 install -e .

Documentation
Examples
NotebookDescription
00_led_blink.ipynbTurn on/off LEDs with external triggering.
01_digital_in_out.ipynbConfigure digital IO direction and square wave generation
02_serial.ipynbExamples of UART and SPI transaction via digital IOs
03_analog_in_out.ipynbGeneration and acquisition of analog ramps via slow analog IOs
04_rf_in_out.ipynbRF synthesis and acquisition via high-speed analog IOs
05_param_io_frame.ipynbParameterizable IO frames and configurable sequences
06_multi_device_sync.ipynbMulti-device synchronization and scalability
IOs & Pin Mapping
IO Name (OpenLabCtrl library)Pin Name (see diagram above)Description
led[0-7]LED_0-7User LEDs
digital_io_0[0]DIO0_P (trig ext)Digital IO (3.3V)
digital_io_0[1]DIO0_NDigital IO (3.3V)
digital_io_0[2]DIO1_PDigital IO (3.3V)
digital_io_0[3]DIO1_NDigital IO (3.3V)
digital_io_1[0]DIO2_PDigital IO (3.3V)
digital_io_1[1]DIO2_NDigital IO (3.3V)
digital_io_1[2]DIO3_PDigital IO (3.3V)
digital_io_1[3]DIO3_NDigital IO (3.3V)
digital_io_2[0]DIO4_PDigital IO (3.3V)
digital_io_2[1]DIO4_NDigital IO (3.3V)
digital_io_2[2]DIO5_PDigital IO (3.3V)
digital_io_2[3]DIO5_NDigital IO (3.3V)
digital_io_3[0]DIO6_PDigital IO (3.3V)
digital_io_3[1]DIO6_NDigital IO (3.3V)
digital_io_3[2]DIO7_PDigital IO (3.3V)
digital_io_3[3]DIO7_NDigital IO (3.3V)
analog_in_0Analog input 0Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_1Analog input 1Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_2Analog input 2Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_in_3Analog input 3Slow analog input (0V-3.5V, 12-bit, 250 KSa/s)
analog_out_0Analog Output 0Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_1Analog Output 1Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_2Analog Output 2Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
analog_out_3Analog Output 3Slow analog output (0V-1.8V, 12-bit, fc = 190kHz)
rf_out_0OUT1Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_out_2OUT2Fast analog output (+/-1V, 14-bit, 125 MSa/s)
rf_in_0IN1Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
rf_in_1IN2Fast analog input (+/-1V or +/-20V, 14-bit, 125 MSa/s)
daisy_0S1Synchronization connector (gen 1: SATA, gen 2: USB-C)
daisy_1S2Synchronization connector (gen 1: SATA, gen 2: USB-C)
About
Open source library for FPGA-timed laboratory/experiment control on Red Pitaya STEMlab 125-14 devices.
dspsandbox.github.io/OpenLabCtrl/
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