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STMicro Nucleo-F401re: implemented comprehensive ThreadX RTOS monitor and primitives showcase - #45
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fdesbiens merged 14 commits intoJul 20, 2026
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new file: STMicroelectronics/NUCLEO_F401RE/README.md new file: STMicroelectronics/NUCLEO_F401RE/app/CMakeLists.txt new file: STMicroelectronics/NUCLEO_F401RE/app/common/board_init.c new file: STMicroelectronics/NUCLEO_F401RE/app/common/board_init.h new file: STMicroelectronics/NUCLEO_F401RE/app/common/console.c new file: STMicroelectronics/NUCLEO_F401RE/app/common/sntp_client.c new file: STMicroelectronics/NUCLEO_F401RE/app/common/startup/NUCLEO_F401RE.ld new file: STMicroelectronics/NUCLEO_F401RE/app/common/startup/startup_stm32f401xe.s new file: STMicroelectronics/NUCLEO_F401RE/app/common/startup/tx_initialize_low_level.S new file: STMicroelectronics/NUCLEO_F401RE/app/common/stm32cubef4/stm32f4xx_hal_msp.c new file: STMicroelectronics/NUCLEO_F401RE/app/starter/cloud_config.h new file: STMicroelectronics/NUCLEO_F401RE/app/starter/main.c new file: STMicroelectronics/NUCLEO_F401RE/cmake/FindCMSIS.cmake new file: STMicroelectronics/NUCLEO_F401RE/cmake/FindSTM32HAL.cmake new file: STMicroelectronics/NUCLEO_F401RE/cmake/arm-gcc-cortex-m4.cmake new file: STMicroelectronics/NUCLEO_F401RE/cmake/arm-gcc-cortex-toolchain.cmake new file: STMicroelectronics/NUCLEO_F401RE/cmake/utilities.cmake new file: STMicroelectronics/NUCLEO_F401RE/lib/CMakeLists.txt new file: STMicroelectronics/NUCLEO_F401RE/lib/nucleo_bsp/CMakeLists.txt new file: STMicroelectronics/NUCLEO_F401RE/lib/nucleo_bsp/nucleo_bsp.c new file: STMicroelectronics/NUCLEO_F401RE/lib/nucleo_bsp/nucleo_bsp.h new file: STMicroelectronics/NUCLEO_F401RE/lib/stm32cubef4/CMakeLists.txt new file: STMicroelectronics/NUCLEO_F401RE/lib/stm32cubef4/config/stm32f4xx_hal_conf.h
…t board specs and ThreadX requirements
Booted ThreadX on NUCLEO-F401RE Validated scheduler operation Validated UART console output Validated LED thread Validated flashing and hardware execution
…UCLEO-F401RE (continued)
…and event flags. Modified demo README file to reflect changes.
…aphore functionality and 1 hz applicaion timer.
Co-authored-by: Codex <codex@openai.com>
Retained the PR implementation for overlapping NUCLEO-F401RE files.\n\nCo-authored-by: Codex <codex@openai.com>
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fdesbiens
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Jul 20, 2026
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I merged to dev; this will ship with the Q3 2026 release in September. Thank you for this contribution, @AmmarOkla12772. In the future, make sure your original files contain the full mandatory header as shown below. /* * Copyright (c) 2026 Eclipse ThreadX contributors * * This program and the accompanying materials are made available * under the terms of the MIT license which is available at * https://opensource.org/license/mit. * * SPDX-License-Identifier: MIT */Also, there were some minor merge conflicts. Always make sure you pull from upstream before creating a PR. Don't worry, I forget this from time to time myself... |
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Aug 31, 2026
_sbrk() bounded the heap at BSP_RAM_END (0x20018000), the end of physical SRAM. On this target that is not a guard at all. NUCLEO_F401RE.ld lays RAM out as: _end 0x20001170 heap base _end + _Min_Heap_Size 0x20001370 intended heap ceiling __RAM_segment_used_end__ 0x20001770 ThreadX byte pool starts here byte pool end 0x20017000 _estack / BSP_RAM_END 0x20018000 so malloc() could grow the break through the reserved main stack, through the entire ThreadX byte pool holding every thread stack and the queue buffer, and into the live MSP, all while _sbrk() reported success. Only an allocation past the top of SRAM returned ENOMEM. The linker script now exports _heap_limit at the end of the heap reservation and _sbrk() bounds against that, which keeps the heap inside the 0x200 the script already set aside for it. Both bounds checks are also computed in uintptr_t rather than by forming an out-of-bounds pointer first, and the negative branch derives its magnitude without negating PTRDIFF_MIN. BSP_RAM_END keeps documenting the memory map but now carries a note against reusing it as a heap bound. All newlib syscall overrides move into newlib_stubs.c, which the application compiles directly. _write() and _read() previously sat in bsp_console.c inside libbsp.a, where the linker extracted them only because bsp_board.o happened to reference bsp_console_init(); breaking that incidental chain would have silently handed printf to the libnosys stubs, and CI only checks that the ELF exists. Console input stays board specific behind nucleo_console.h, since the shared <bsp/console.h> contract is write-only. The BSP library is renamed nucleo_bsp, matching polarfire_bsp and freeing the bare "bsp" target name. The AI Disclosure header on newlib_stubs.c records the Codex-assisted origin of the syscall shims moved in from console.c. That work was done by Frederic Desbiens while editing PR eclipse-threadx#45, not by the PR author; the squash-merge in 1bddd17 assigned git authorship to the contributor and its Co-authored-by trailers are the accurate record.
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Aug 31, 2026
bsp_console_init() dropped the return value of HAL_UART_Init(). The code it replaced routed the failure to Error_Handler(); the migration left the call bare, so a UART that failed to initialise booted on silently with no console. MISRA C:2012 Rule 17.7. The status is checked again and a failure now halts, matching the previous behaviour. The UART handle was a non-static global named UartHandle, but the extern declaration that used to live in board_init.h went away with that header, leaving an object with external linkage that nothing declared (Rule 8.4 and 8.7). It is now file-scope static console_uart. The redundant GPIOA and USART2 clock enables are gone as well: HAL_UART_MspInit() already owns that configuration, which is what "single UART owner" should mean. The const cast required by HAL_UART_Transmit() is documented as a Rule 11.8 deviation. bsp_board.c, bsp_led.c and bsp_console.c carry the AI Disclosure header required by AGENTS.md for new files. They derive from board_init.c, nucleo_bsp.c and console.c, each of which carried "Some portions generated by Codex (GPT-5)"; the rename dropped the disclosure while keeping most of the content, and git scores bsp_board.c as an 80% similarity rename. That Codex work was Frederic Desbiens', done while editing another contributor's PR under the AGENTS.md exception permitting edits to incoming PRs. It reached the tree through 1bddd17, a GitHub squash-merge of PR eclipse-threadx#45 whose git author is the PR author but whose trailers name the real participants: Co-authored-by: Ammar Okla <ammargawkla@gmail.com> Co-authored-by: Frederic Desbiens <frederic.desbiens@eclipse-foundation.org> Co-authored-by: Codex <codex@openai.com> The disclosure is therefore not a statement about this PR's author.
fdesbiens added a commit
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Aug 31, 2026
_sbrk() bounded the heap at BSP_RAM_END (0x20018000), the end of physical SRAM. On this target that is not a guard at all. NUCLEO_F401RE.ld lays RAM out as: _end 0x20001170 heap base _end + _Min_Heap_Size 0x20001370 intended heap ceiling __RAM_segment_used_end__ 0x20001770 ThreadX byte pool starts here byte pool end 0x20017000 _estack / BSP_RAM_END 0x20018000 so malloc() could grow the break through the reserved main stack, through the entire ThreadX byte pool holding every thread stack and the queue buffer, and into the live MSP, all while _sbrk() reported success. Only an allocation past the top of SRAM returned ENOMEM. The linker script now exports _heap_limit at the end of the heap reservation and _sbrk() bounds against that, which keeps the heap inside the 0x200 the script already set aside for it. Both bounds checks are also computed in uintptr_t rather than by forming an out-of-bounds pointer first, and the negative branch derives its magnitude without negating PTRDIFF_MIN. BSP_RAM_END keeps documenting the memory map but now carries a note against reusing it as a heap bound. All newlib syscall overrides move into newlib_stubs.c, which the application compiles directly. _write() and _read() previously sat in bsp_console.c inside libbsp.a, where the linker extracted them only because bsp_board.o happened to reference bsp_console_init(); breaking that incidental chain would have silently handed printf to the libnosys stubs, and CI only checks that the ELF exists. Console input stays board specific behind nucleo_console.h, since the shared <bsp/console.h> contract is write-only. The BSP library is renamed nucleo_bsp, matching polarfire_bsp and freeing the bare "bsp" target name. The AI Disclosure header on newlib_stubs.c records the Codex-assisted origin of the syscall shims moved in from console.c. That work was done by Frederic Desbiens while editing PR eclipse-threadx#45, not by the PR author; the squash-merge in 1bddd17 assigned git authorship to the contributor and its Co-authored-by trailers are the accurate record.
fdesbiens added a commit
to AmmarOkla12772/samplexFork2
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Aug 31, 2026
bsp_console_init() dropped the return value of HAL_UART_Init(). The code it replaced routed the failure to Error_Handler(); the migration left the call bare, so a UART that failed to initialise booted on silently with no console. MISRA C:2012 Rule 17.7. The status is checked again and a failure now halts, matching the previous behaviour. The UART handle was a non-static global named UartHandle, but the extern declaration that used to live in board_init.h went away with that header, leaving an object with external linkage that nothing declared (Rule 8.4 and 8.7). It is now file-scope static console_uart. The redundant GPIOA and USART2 clock enables are gone as well: HAL_UART_MspInit() already owns that configuration, which is what "single UART owner" should mean. The const cast required by HAL_UART_Transmit() is documented as a Rule 11.8 deviation. bsp_board.c, bsp_led.c and bsp_console.c carry the AI Disclosure header required by AGENTS.md for new files. They derive from board_init.c, nucleo_bsp.c and console.c, each of which carried "Some portions generated by Codex (GPT-5)"; the rename dropped the disclosure while keeping most of the content, and git scores bsp_board.c as an 80% similarity rename. That Codex work was Frederic Desbiens', done while editing another contributor's PR under the AGENTS.md exception permitting edits to incoming PRs. It reached the tree through 1bddd17, a GitHub squash-merge of PR eclipse-threadx#45 whose git author is the PR author but whose trailers name the real participants: Co-authored-by: Ammar Okla <ammargawkla@gmail.com> Co-authored-by: Frederic Desbiens <frederic.desbiens@eclipse-foundation.org> Co-authored-by: Codex <codex@openai.com> The disclosure is therefore not a statement about this PR's author.
fdesbiens added a commit
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Aug 31, 2026
…50) * feat(nucleo): Relocate NUCLEO_F401RE into targets and migrate to generic BSP framework * Bounded the newlib heap to its linker reservation _sbrk() bounded the heap at BSP_RAM_END (0x20018000), the end of physical SRAM. On this target that is not a guard at all. NUCLEO_F401RE.ld lays RAM out as: _end 0x20001170 heap base _end + _Min_Heap_Size 0x20001370 intended heap ceiling __RAM_segment_used_end__ 0x20001770 ThreadX byte pool starts here byte pool end 0x20017000 _estack / BSP_RAM_END 0x20018000 so malloc() could grow the break through the reserved main stack, through the entire ThreadX byte pool holding every thread stack and the queue buffer, and into the live MSP, all while _sbrk() reported success. Only an allocation past the top of SRAM returned ENOMEM. The linker script now exports _heap_limit at the end of the heap reservation and _sbrk() bounds against that, which keeps the heap inside the 0x200 the script already set aside for it. Both bounds checks are also computed in uintptr_t rather than by forming an out-of-bounds pointer first, and the negative branch derives its magnitude without negating PTRDIFF_MIN. BSP_RAM_END keeps documenting the memory map but now carries a note against reusing it as a heap bound. All newlib syscall overrides move into newlib_stubs.c, which the application compiles directly. _write() and _read() previously sat in bsp_console.c inside libbsp.a, where the linker extracted them only because bsp_board.o happened to reference bsp_console_init(); breaking that incidental chain would have silently handed printf to the libnosys stubs, and CI only checks that the ELF exists. Console input stays board specific behind nucleo_console.h, since the shared <bsp/console.h> contract is write-only. The BSP library is renamed nucleo_bsp, matching polarfire_bsp and freeing the bare "bsp" target name. The AI Disclosure header on newlib_stubs.c records the Codex-assisted origin of the syscall shims moved in from console.c. That work was done by Frederic Desbiens while editing PR #45, not by the PR author; the squash-merge in 1bddd17 assigned git authorship to the contributor and its Co-authored-by trailers are the accurate record. * Restored console error handling and the AI disclosure headers bsp_console_init() dropped the return value of HAL_UART_Init(). The code it replaced routed the failure to Error_Handler(); the migration left the call bare, so a UART that failed to initialise booted on silently with no console. MISRA C:2012 Rule 17.7. The status is checked again and a failure now halts, matching the previous behaviour. The UART handle was a non-static global named UartHandle, but the extern declaration that used to live in board_init.h went away with that header, leaving an object with external linkage that nothing declared (Rule 8.4 and 8.7). It is now file-scope static console_uart. The redundant GPIOA and USART2 clock enables are gone as well: HAL_UART_MspInit() already owns that configuration, which is what "single UART owner" should mean. The const cast required by HAL_UART_Transmit() is documented as a Rule 11.8 deviation. bsp_board.c, bsp_led.c and bsp_console.c carry the AI Disclosure header required by AGENTS.md for new files. They derive from board_init.c, nucleo_bsp.c and console.c, each of which carried "Some portions generated by Codex (GPT-5)"; the rename dropped the disclosure while keeping most of the content, and git scores bsp_board.c as an 80% similarity rename. That Codex work was Frederic Desbiens', done while editing another contributor's PR under the AGENTS.md exception permitting edits to incoming PRs. It reached the tree through 1bddd17, a GitHub squash-merge of PR #45 whose git author is the PR author but whose trailers name the real participants: Co-authored-by: Ammar Okla <ammargawkla@gmail.com> Co-authored-by: Frederic Desbiens <frederic.desbiens@eclipse-foundation.org> Co-authored-by: Codex <codex@openai.com> The disclosure is therefore not a statement about this PR's author. * Pinned the ARM toolchain to GCC 14 and refreshed the target documentation The build-arm-nucleo job installed the distribution's gcc-arm-none-eabi, which is GCC 13.2 on ubuntu-24.04, so the compiler drifted with the runner image. AGENTS.md specifies GCC 14 and the sibling RISC-V job already pins xPack GCC 14.2.0 by URL; the ARM job now pins Arm GNU Toolchain 14.2.Rel1 the same way. The toolchain bundles its own newlib, so the separate newlib packages are no longer installed. CMAKE_C_STANDARD moves from 11 to 99 per the AGENTS.md C99 requirement. The target builds clean under both GCC 13.2.1 and the pinned GCC 14.2.1 with -Wall -Wshadow -Wdouble-promotion -Werror. README.md moved with git mv but still described the pre-migration layout: the build directory as STMicroelectronics/NUCLEO_F401RE, the HAL timebase overrides as living in board_init.c, and the BSP as lib/nucleo_bsp/. All three are corrected and the BSP entry now lists the four sources behind the generic interfaces. The Validation Record quoted 18244 B ROM and 5632 B RAM against a toolchain the CI pipeline does not use. Re-measured against the newly pinned GCC 14.2.1: 20120 B ROM and 6000 B RAM. The hardware verification checklist is left as the contributor recorded it. --------- Co-authored-by: Ammar Okla <ammargawkla@gmail.com> Co-authored-by: Frédéric Desbiens <frederic.desbiens@eclipse-foundation.org>
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Note: This PR supersedes the previous submission having addressed the review feedback. The AZ3166 refactoring has been undone, and the required MIT license header has been added to main.c.
Overview
This PR extends the validation demo for the STMicroelectronics NUCLEO-F401RE board under
STMicroelectronics/NUCLEO_F401RE/.The goal is to provide a comprehensive ThreadX RTOS demonstration showcasing dynamic memory management, runtime diagnostics, thread monitoring, and synchronization primitives using public ThreadX APIs.
Changes
TX_BYTE_POOLTX_BLOCK_POOLfor fixed-size deterministic memory allocationTX_QUEUETX_MUTEXsynchronization with two competing worker threads sharing a simulated SPI resourceTX_EVENT_FLAGS_GROUPsynchronization between the LED heartbeat thread and an event-processing threadTX_SEMAPHOREsynchronization with a dedicated consumer thread awakened by LED activityTX_TIMERperiodic callback executing once per second from the ThreadX system timer threadtx_thread_info_get()0xEFEFEFEF)Validation
Tested on physical NUCLEO-F401RE board:
79028bytes during operation, indicating no byte pool or block pool leaksToolchain
Notes
All runtime diagnostics are implemented using documented ThreadX public APIs. No private kernel structures or undocumented internal ThreadX data are accessed, maintaining portability across ThreadX targets.