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fix: bump impl submodule pin to the RLS broadcast-stride fix - #64
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Pulls in fastfields-cpu-impl#48, which forces the RLS weight-channel stride (wsc) to 0 in matvec/diag/relax_rls for absolute/membrane/ bending instead of deriving it from the wgt tensor's real (size-1) last-dim stride -- the latter let wgt[wsc*c] walk off the wc=1 buffer into the next spatial voxel's weight for field channels c>0, which is what run_2d_matvec_rls_unit_weight (added in #59, the regression test for kernels#40) was catching as 29 mismatched elements in test_reg_field. Verified: `make -C . test CXX=clang++` -- all 12 suites pass, 0 failures. test_reg_field: 8440 checks, 0 failures (was 29 failing). test_reg_flow: 11415 checks, 0 failures (flow's RLS path was never affected -- see fastfields-cpu-impl#48 for why). Closes#62
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balbasty
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Aug 2, 2026
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Review summary (triage, jitfields-to-fastfields): merged as squash.
Workstream: claude-jitfields-to-fastfields Generated by Claude Code |
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Aug 2, 2026
…ib#15) (#68) Adds the three pieces of fastfields-lib#15's automation to this repo: * submodule-staleness.yaml -- calls fastfields/.github's reusable cpp-submodule-staleness.yml on every push/PR, reporting how far the `impl` pin is behind fastfields-cpu-impl's main as a non-blocking ::warning:: + PR comment. Verified against this repo's OWN current state: the `impl` pin right now (f51a9b9, set by #64) references a fastfields-cpu-impl PR-branch commit that was later squash-merged as 1bfacc5 -- so it shows up as "diverged" (not an ancestor of main), not merely "behind". This is exactly the class of pin fastfields-lib#15's incident writeup describes: a pin captured off an unmerged branch before the real merge landed. * submodule-bump.yaml -- calls the reusable cpp-submodule-bump.yml, either by hand (workflow_dispatch) or automatically via a repository_dispatch ping from fastfields-cpu-impl's notify-parent.yaml (added separately). * notify-parent.yaml -- the producer-side half: pings fastfields-lib (which pins this repo as `cpu`) on push to main. Needs fastfields/.github#6 merged first for the `uses: fastfields/.github/...@main` references to resolve. SUBMODULE_DISPATCH_TOKEN still needs to be added as a secret on this repo (contents:write on fastfields-lib) for the automatic dispatch to fire; see notify-parent.yaml. No submodule pin values touched. part of fastfields-lib#15, fastfields-lib#10 _Workstream: claude-jitfields-to-fastfields_ Claude-Session: https://claude.ai/code/session_016AjQcY78NgbagPSbPJRr6Z Co-authored-by: Claude <noreply@anthropic.com>
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Summary
Bumps the
implsubmodule pin tofastfields-cpu-impl#48, whichfixes the bug reported in #62.
Root cause (precise):
field_matvec_rls/field_diag_rls/field_relax_rls'swc == 1broadcast path (single weight sharedacross all
ncfield channels, forabsolute/membrane/bending)computed the weight tensor's per-channel stride (
wsc) from itsreal, contiguous last-dim stride, then indexed
wgt[wsc*c]per fieldchannel inside the cpu-impl loop. That indexing is correct for the
genuine per-channel (JRLS,
wc == nc) path, but wrong for RLS: sincethe weight tensor genuinely has only one element in that dimension,
reading
wgt[wsc*c]forc > 0walks off thewc=1buffer into thenext spatial voxel's weight value (or out of bounds at the very
last voxel, landing on zero-initialized memory — the
-0the issue'sorder=1failure reported). This explains all three failing orders(
order=1absolute-only,order=2membrane,order=3bending) —it's independent of, and distinct from, kernels#40 (which only ever
touched the
order=3bending kernel table).Fixed by forcing
wsc = 0for the nine RLS functions (matvec/diag/relax_×absolute/membrane/bending), since they areonly ever dispatched to when
wc == 1— seefastfields-cpu-impl#48for the full writeup, the root-causingharness, and confirmation that
flow_matvec_rlsand friends arenot affected (flow's weight map is architecturally always
wc=1,enforced at the cpu-lib API boundary, and its kernels never index by
a per-component stride).
A second, distinct bug was found while tracing this (the
_jrlsfunctions silently ignore per-channel weight variation) — it's
real but untested by the current suite, needs kernel-level changes,
and is out of scope here; tracked as a follow-up issue.
Verified
All 12 suites green, 0 failures across 43,692 checks.
Closes#62
Workstream: claude-jitfields-to-fastfields
🤖 Generated with Claude Code
Generated by Claude Code