fix: force the RLS weight-channel stride to 0 for broadcast reads

[balbasty]

Summary

Structural mirror of fastfields-cpu-impl#48 (same bug, same fix, in
the CUDA host launchers for the same nine functions:
matvec/diag/relax_ × absolute/membrane/bending, all in
the wc == 1 RLS/broadcast path).

matvec_absolute_rls etc. computed the weight tensor's per-channel
stride (wsc) from its real, contiguous last-dim stride and indexed
wgt[wsc*c] per field channel — correct for the genuine per-channel
(JRLS, wc == nc) path, but wrong for RLS: the weight tensor has
only one element in that dimension, so for c > 0 the read walks off
the wc=1 buffer into the next voxel's weight.

Since these launchers are only ever invoked at wc == 1, the fix
forces wsc = 0 unconditionally instead of deriving it from
stride_wgt (grep -n "offset_t wsc = stride_wgt\[nall\];" reg_field.h
found the same 9 call sites as fastfields-cpu-impl, in the same 9
functions, confirmed by name before editing).

flow's RLS path is not affected by the analogous bug — see
fastfields-cpu-impl#48's description for why.

Verified

Compile+link gate (this repo has no GPU in CI, per this org's
CONTRIBUTING.md — compile+link is the real gate here):

nvcc -std=c++14 -O1 -x cu -DFF_STATIC_BOUNDS=0 -DFF_STATIC_BOUND_DCT2=1 \
-DFF_STATIC_BOUND_DST2=1 -c reg_field_rls.cpp -I. -o reg_field_rls.o

(matching the BOUNDFLAGS this repo's own fastfields-cuda-lib
Makefile uses by default — my first attempt omitted BOUNDFLAGS and
defaulted to FF_STATIC_BOUNDS=1, the heaviest all-8-bound-policies
static explosion, which is consistent with why this repo's own CI
needed -O1 + a 120-minute timeout for these modules; with the
correct default flags the compile finishes in a few minutes.)

Clean compile, zero errors/warnings, valid ELF relocatable object
produced (impl/kernels symlinked to this branch's checkout).

The change itself is a line-for-line mechanical mirror of
fastfields-cpu-impl#48, which was fully verified on the CPU side
(make -C fastfields-cpu-lib test CXX=clang++: all 12 suites green,
test_reg_field 8440/8440 checks passing, was 29 failing).

part of fastfields-cpu-lib#62

Workstream: claude-jitfields-to-fastfields

🤖 Generated with Claude Code

[balbasty]

Review summary (triage, jitfields-to-fastfields): merged as squash.

Same fix pattern as fastfields-cpu-impl#48 (wsc = 0 in the 9 RLS driver functions, found via grep for the identical structure in the CUDA impl), plus the stream-widening/forwarding work from #25. build-via-cuda-lib (real nvcc 12.0 compile) green — took ~50 min, consistent with this repo's documented nvcc build times for reg_field.

Workstream: claude-jitfields-to-fastfields

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