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deps: bump impl pin to the kernels RLS/JRLS correctness fixes - #46

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claude/bump-impl-pin-rls-kernel-fixes
Aug 9, 2026
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deps: bump impl pin to the kernels RLS/JRLS correctness fixes#46
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claude/bump-impl-pin-rls-kernel-fixes

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Propagates fastfields-cuda-impl#41. Found during an independent re-review of the fastfields-cpu-lib#65 RLS/JRLS fix chain — this is a separate, pre-existing gap that review turned up, not part of that chain.

What this picks up

fastfields-cuda-impl's kernels pin had fallen nine commits behind (last moved at d0f1605). Two of those are field/flow regulariser correctness fixes the CPU path has had for a while and the CUDA path did not:

fastfields-kernels#64 — membrane penalty at half strength

make_kernel_bending_rls rescaled its whole coefficient table by 0.25, running the membrane penalty at half strength whenever the bending-order RLS/JRLS kernel is built (bending != 0 alongside membrane != 0). The previously-pinned tree still had:

make_kernel_bending(kernel, absolute, membrane, bending, voxel_size, nc);
for (int k=0; k<get_kernelsize_bending_rls(nc); ++k)
{
if (k % 6 == 0) continue;
kernel[k] *= 0.25;
}

Upstream measured max |matvec_bending - matvec_bending_rls(w=1)| of 1.8e+00 (2D) / 1.7e+00 (3D) before the fix, ~1e-14 after. Note the existing self-adjointness tests are blind to this — a term at the wrong strength stays perfectly symmetric.

fastfields-kernels#52 — out-of-bounds weight-map reads

Guards the weight-map neighbour reads in the RLS/JRLS kernels. Touches regularisers/field/ and regularisers/flow/.

Why the rest of the range is inert

Neither fix changes a signature, and kernels#70 together with its revert kernels#73cancel out across the range — so the _jrls signatures do not move at all.

Verification

fastfields-cuda-impl#41's own build-via-cuda-lib job compiles this repo's MODULES against the new pin, and it passed in 51 minutes. So the bump is already known to compile end-to-end; CI here re-runs it as the formal gate.

As usual for the CUDA path there is no GPU in CI, so the gate is compile + link — runtime correctness of these two fixes is covered on the CPU side by fastfields-cpu-lib's suite.

Follow-up once this lands: bump fastfields-lib's cuda pin.

🤖 Generated with Claude Code

https://claude.ai/code/session_016AjQcY78NgbagPSbPJRr6Z


Generated by Claude Code

Picks up fastfields-cuda-impl#41, which moved that repo's kernels pin from
15295c2 to main (b09b284) after it had fallen nine commits behind. Two of
those are field/flow regulariser correctness fixes the CPU path has had for
a while and the CUDA path did not:
fastfields-kernels#64 make_kernel_bending_rls rescaled its whole
coefficient table by 0.25, running the membrane
penalty at half strength whenever the bending-order
RLS/JRLS kernel is built (bending != 0 alongside
membrane != 0). Upstream measured max |matvec_bending
- matvec_bending_rls(w=1)| of 1.8e+00 (2D) and
1.7e+00 (3D) before the fix, ~1e-14 after. The
existing self-adjointness tests cannot see this -- a
term at the wrong strength stays perfectly symmetric.
fastfields-kernels#52 guards the weight-map neighbour reads in the
RLS/JRLS kernels (out-of-bounds read at some
boundaries).
Neither changes a signature, and kernels#70 / its revert #73 cancel out
across the range, so the _jrls signatures do not move.
cuda-impl#41's own nvcc build (build-via-cuda-lib, which compiles this
repo's MODULES against the new pin) passed in 51 minutes, so this bump is
already known to compile; CI here re-runs it as the gate.
Found during an independent re-review of the fastfields-cpu-lib#65 fix chain.
Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_016AjQcY78NgbagPSbPJRr6Z
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Submodule staleness (non-blocking -- fastfields-lib#15)

submodulepinned committracksstatusbehind by
impla099a04fastfields/fastfields-cuda-impl@mainup to date0

@balbasty
balbasty merged commit 6ae52bd into mainAug 9, 2026
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@balbasty
balbasty deleted the claude/bump-impl-pin-rls-kernel-fixes branch August 9, 2026 17:43
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