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- Status: Open.#160In fastfields/fastfields-lib;
- Status: Open.#144In fastfields/fastfields-lib;
Half/bf16 CUDA atomics will need CAS fallbacks — and a 4-byte alignment precondition on user DLPack pointers
enhancementNew feature or requestNew feature or requestStatus: Open.#100In fastfields/fastfields-lib;Third-party attribution: PyTorch BSD-3 requires the licence text, not a URL
documentationImprovements or additions to documentationImprovements or additions to documentationStatus: Open.#99In fastfields/fastfields-lib;atomic.h: integer CAS specialisations retyped from upstream — signed
charcorrupts neighbouring bytes,unsigned longtruncates on Win64bugSomething isn't workingSomething isn't workingStatus: Open.#98In fastfields/fastfields-lib;CI never builds the default
maketarget — the configuration fastfields-dlpack actually usesenhancementNew feature or requestNew feature or requestStatus: Open.#96In fastfields/fastfields-lib;cuda_switch.h: NVRTC int64_t/uint64_t defined as
long, which is 32-bit on Windows (LLP64)bugSomething isn't workingSomething isn't workingStatus: Open.#93In fastfields/fastfields-lib;CUDA launchers rely on cudaFree's implicit device-wide sync for stream ordering
bugSomething isn't workingSomething isn't workingStatus: Open.#88In fastfields/fastfields-lib;Migration follow-up: transfer the 41 open issues, then archive the five absorbed repos
enhancementNew feature or requestNew feature or requestStatus: Open.#84In fastfields/fastfields-lib;- Status: Open.#121In fastfields/fastfields-lib;
- Status: Open.#62In fastfields/fastfields-lib;
[teeny] Phase B4+B5-cuda: regulariser boundary — reg_field/reg_flow import via from_dlpack<T, gpu_view>, reg_dispatch.h width leaf onto anyrank::reindex
enhancementNew feature or requestNew feature or requestStatus: Open.#138In fastfields/fastfields-lib;