Pinned Loading

1. Basic-Digital-Verification-Analyst-DiplomaBasic-Digital-Verification-Analyst-DiplomaPublic

   Under supervision of Eng. Sherif Hosny

   SystemVerilog 1

2. Radix-16-Modified-Booth-64-bit-MultiplierRadix-16-Modified-Booth-64-bit-MultiplierPublic

   It is a SystemVerilog design of 64-bit Multiplier based on Radix-16 Modified Booth Algorithm

   SystemVerilog

3. MuhammadMajiid/RV64IMACMuhammadMajiid/RV64IMACPublic

   RV64IMAC modelling using System Verilog HDL

   SystemVerilog 27 12

4. Digital-IC-Design-DiplomaDigital-IC-Design-DiplomaPublic

   Under supervision of Eng. Ali El-Temsah

   Verilog

5. Verilog-course-codesVerilog-course-codesPublic

   Forked from aseddin/ece_3300

   ECE 3300 HDL Code

   Verilog

6. Design-and-Implementation-of-Full-Featured-UARTDesign-and-Implementation-of-Full-Featured-UARTPublic

   This is a design of a fully configured uart transmitter and receiver using Verilog-HDL and implemented in DE10-Lite Max-10 FPGA Dev board

   Verilog