Popular repositories Loading
- Verilog_Assignment_CSE332L
Verilog_Assignment_CSE332L PublicIn CSE332L: Computer Organization and Architecture Lab, I completed an assignment involving several Verilog tasks, where I solved the problems using behavioral, dataflow, and gate-level modeling.
Verilog 1
- MIPS_Processor_Inspired_16bit_R_and_I_type_dataflow_project
MIPS_Processor_Inspired_16bit_R_and_I_type_dataflow_project PublicI have built a R-type and I-type datapath for a 16-bit system in logisim, featuring 16 bit data, 4-bit addressing (16 registers) and 16-bit instructions, where the ALU is capable of performing 8 op…
- Resistor_Calculator_Python_Beginner_Project
Resistor_Calculator_Python_Beginner_Project PublicResistors have colored bands that indicate their resistance value, tolerance, and the temperature coefficient of resistance (TCR) which is measured in ppm/C. Resistors could have 4-6 colored bands.…
Python
- -MCU_ENERGY_MODE_ANALYZER_with_Python_matplot
-MCU_ENERGY_MODE_ANALYZER_with_Python_matplot PublicAdvanced microcontrollers support multiple energy modes for balancing performance and power efficiency. This project parses MCU data from a CSV file, analyzes power consumption by selected energy m…
Python
If the problem persists, check the GitHub status page or contact support.
Uh oh!
There was an error while loading. Please reload this page.