[diskann-wide] Add more 64-bit neon types

[Mark Hildebrand (hildebrandmw)]

Adds u32x2, i32x2, u16x4, and i16x4. Along the way, addresses a few places where Miri incompatibility has crept in.

[Copilot]

🔵 Needs a closer look

It touches low-level architecture-specific SIMD intrinsics and Miri-conditional behavior where correctness and portability are hard to fully validate without running the full CI/test matrix.

Pull request overview

This PR expands diskann-wide’s AArch64/Neon 64-bit SIMD surface area by adding new small-lane vector types (u32x2, i32x2, u16x4, i16x4) and adjusts a few Neon code paths to avoid Miri-incompatible intrinsics/operations.

Changes:

• Add new AArch64 Neon vector register implementations and tests for u32x2, i32x2, u16x4, and i16x4.
• Extend emulated SIMDSumTree support (and tests) to include 1- and 2-lane integer emulated vectors.
• Improve Miri compatibility by guarding tests and adding Miri fallbacks for some Neon reductions/min/max, and by avoiding a Miri-problematic lane-load pattern.

File summaries

File	Description
diskann-wide/tests/float16_conversion.rs	Disables the exhaustive f16 -> f32 test under Miri.
diskann-wide/src/emulated.rs	Adds SIMDSumTree impls/tests for more integer lane counts (including 1 and 2).
diskann-wide/src/arch/aarch64/u32x2_.rs	Introduces Neon u32x2 register type with ops, bitops, select, sumtree, and tests.
diskann-wide/src/arch/aarch64/u16x4_.rs	Introduces Neon u16x4 register type with ops/bitops and tests.
diskann-wide/src/arch/aarch64/mod.rs	Exports the newly added Neon modules/types.
diskann-wide/src/arch/aarch64/internal/load_first.rs	Adds partial-load helpers for i16x4, u32x2, i32x2 and adjusts a 32x4 partial-load to be Miri-friendlier.
diskann-wide/src/arch/aarch64/i32x2_.rs	Introduces Neon i32x2 register type with ops, bitops, select, sumtree, cast-to-f32, and tests.
diskann-wide/src/arch/aarch64/i16x4_.rs	Introduces Neon i16x4 register type with ops/bitops and tests.
diskann-wide/src/arch/aarch64/f32x4_.rs	Adds Miri fallbacks for min/max operations by routing through emulated implementations under Miri.

Review details

• Files reviewed: 9/9 changed files
• Comments generated: 1
• Review effort level: Lite

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[Codecov Comments Bot (codecov-commenter)]

Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 91.42%. Comparing base (600c2b9) to head (58dd898).
⚠️ Report is 1 commits behind head on main.

Additional details and impacted files

@@ Coverage Diff @@## main #1377 +/- ##
==========================================
- Coverage 91.55% 91.42% -0.13% 
==========================================
Files 521 521 Lines 100302 100726 +424 ==========================================
+ Hits 91828 92089 +261 - Misses 8474 8637 +163 

Flag	Coverage Δ
miri	91.42% <ø> (-0.13%)	⬇️
unittests	91.22% <ø> (-0.02%)	⬇️

Flags with carried forward coverage won't be shown. Click here to find out more.

Files with missing lines	Coverage Δ
diskann-wide/src/emulated.rs	98.31% <ø> (ø)

... and 44 files with indirect coverage changes

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