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Curtis J Bezault (cbezault) wants to merge 6 commits into from
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Add arm64EC pipeline. Disable all SSE usage for ARM64EC #2491

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9408103
Add arm64EC pipeline. Disable all SSE usage for ARM64EC
cbezault Jan 19, 2022
70115c4
fixup arm build
cbezault Jan 19, 2022
b094a36
Merge branch 'main' into arm64ec3
StephanTLavavej Jan 25, 2022
4cce4e4
New pool.
StephanTLavavej Jan 25, 2022
991ce42
Revert "New pool."
StephanTLavavej Jan 26, 2022
82e0e4c
Merge branch 'main' into arm64ec3
StephanTLavavej Jan 26, 2022
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9 changes: 9 additions & 0 deletions CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,15 @@ elseif(VCLIBS_TARGET_ARCHITECTURE MATCHES "^[aA][rR][mM]64$")
add_compile_definitions(_ARM64_ _VCRT_WIN32_WINNT=0x0A00 _STL_WIN32_WINNT=0x0A00
_WIN32_WINNT=0x0A00 NTDDI_VERSION=NTDDI_WIN10)
string(APPEND CMAKE_CXX_STANDARD_LIBRARIES " Synchronization.lib")
elseif(VCLIBS_TARGET_ARCHITECTURE MATCHES "^[aA][rR][mM]64[eE][cC]")
set(VCLIBS_TARGET_ARCHITECTURE "arm64EC")
set(VCLIBS_I386_OR_AMD64 "arm64EC")
set(VCLIBS_X86_OR_X64 "arm64")
add_compile_definitions(_ARM64_ _VCRT_WIN32_WINNT=0x0A00 _STL_WIN32_WINNT=0x0A00
_WIN32_WINNT=0x0A00 NTDDI_VERSION=NTDDI_WIN10)
string(APPEND CMAKE_CXX_STANDARD_LIBRARIES " Synchronization.lib")
add_compile_options(/arm64EC)
add_link_options(/machine:arm64ec)
else()
message(FATAL_ERROR "Could not determine target architecture: VCLIBS_TARGET_ARCHITECTURE: ${VCLIBS_TARGET_ARCHITECTURE}")
endif()
Expand Down
2 changes: 1 addition & 1 deletion azure-devops/cross-build.yml
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Expand Up @@ -38,7 +38,7 @@ jobs:
targetPlatform: ${{ parameters.targetPlatform }}
hostArch: ${{ parameters.hostArch }}
targetArch: ${{ parameters.vsDevCmdArch }}
cmakeAdditionalFlags: '-DTESTS_BUILD_ONLY=ON'
cmakeAdditionalFlags: '-DTESTS_BUILD_ONLY=ON -DVCLIBS_TARGET_ARCHITECTURE=${{ parameters.targetPlatform }}'
- template: run-tests.yml
parameters:
hostArch: ${{ parameters.hostArch }}
Expand Down
11 changes: 10 additions & 1 deletion azure-pipelines.yml
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Expand Up @@ -82,7 +82,7 @@ stages:
jobs:
- template: azure-devops/cross-build.yml
parameters:
targetPlatform: arm
targetPlatform: armv7
vsDevCmdArch: arm

- stage: Build_ARM64
Expand All @@ -93,3 +93,12 @@ stages:
parameters:
targetPlatform: arm64
vsDevCmdArch: arm64

- stage: Build_ARM64EC
dependsOn: Build_And_Test_x64
displayName: 'Build'
jobs:
- template: azure-devops/cross-build.yml
parameters:
targetPlatform: arm64EC
vsDevCmdArch: arm64
5 changes: 4 additions & 1 deletion stl/CMakeLists.txt
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Expand Up @@ -534,7 +534,7 @@ function(add_stl_dlls D_SUFFIX THIS_CONFIG_DEFINITIONS THIS_CONFIG_COMPILE_OPTIO
add_library(msvcp${D_SUFFIX}_implib STATIC ${HEADERS})
target_link_libraries(msvcp${D_SUFFIX}_implib msvcp${D_SUFFIX}_implib_objects)
add_dependencies(msvcp${D_SUFFIX}_implib msvcp${D_SUFFIX} msvcp_1${D_SUFFIX} msvcp_2${D_SUFFIX} msvcp${D_SUFFIX}_atomic_wait msvcp${D_SUFFIX}_codecvt_ids)
set_target_properties(msvcp${D_SUFFIX}_implib PROPERTIES STATIC_LIBRARY_OPTIONS "/NOLOGO;/NODEFAULTLIB;/IGNORE:4006;$<TARGET_LINKER_FILE:msvcp${D_SUFFIX}>;$<TARGET_LINKER_FILE:msvcp_1${D_SUFFIX}>;$<TARGET_LINKER_FILE:msvcp_2${D_SUFFIX}>;$<TARGET_LINKER_FILE:msvcp${D_SUFFIX}_codecvt_ids>;$<TARGET_LINKER_FILE:msvcp${D_SUFFIX}_atomic_wait>")
set_target_properties(msvcp${D_SUFFIX}_implib PROPERTIES STATIC_LIBRARY_OPTIONS "/NOLOGO;/NODEFAULTLIB;/IGNORE:4006;$<TARGET_LINKER_FILE:msvcp${D_SUFFIX}>;$<TARGET_LINKER_FILE:msvcp_1${D_SUFFIX}>;$<TARGET_LINKER_FILE:msvcp_2${D_SUFFIX}>;$<TARGET_LINKER_FILE:msvcp${D_SUFFIX}_codecvt_ids>;$<TARGET_LINKER_FILE:msvcp${D_SUFFIX}_atomic_wait>;/machine:${VCLIBS_TARGET_ARCHITECTURE}")
set_target_properties(msvcp${D_SUFFIX}_implib PROPERTIES ARCHIVE_OUTPUT_NAME "msvcprt${D_SUFFIX}")
endfunction()

Expand All @@ -545,11 +545,13 @@ function(add_stl_statics FLAVOR_SUFFIX THIS_CONFIG_DEFINITIONS THIS_CONFIG_COMPI
add_library(libcpmt${FLAVOR_SUFFIX}_eha OBJECT ${EHA_SOURCES})
target_compile_definitions(libcpmt${FLAVOR_SUFFIX}_eha PRIVATE "${THIS_CONFIG_DEFINITIONS};_ANNOTATE_VECTOR")
target_compile_options(libcpmt${FLAVOR_SUFFIX}_eha PRIVATE "${THIS_CONFIG_COMPILE_OPTIONS};/EHa")
set_target_properties(libcpmt${FLAVOR_SUFFIX}_eha PROPERTIES STATIC_LIBRARY_OPTIONS "/machine:${VCLIBS_TARGET_ARCHITECTURE}")

@strega-nil-ms nicole mazzuca (strega-nil-ms) May 26, 2022

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libcpmt*_eha is not a static library, it's an object library (hence should not require STATIC_LIBRARY_OPTIONS)


add_library(libcpmt${FLAVOR_SUFFIX} STATIC ${HEADERS} ${IMPLIB_SOURCES} ${SOURCES} ${INITIALIZER_SOURCES} ${STATIC_SOURCES})
target_compile_definitions(libcpmt${FLAVOR_SUFFIX} PRIVATE "${THIS_CONFIG_DEFINITIONS};_ANNOTATE_VECTOR")
target_compile_options(libcpmt${FLAVOR_SUFFIX} PRIVATE "${THIS_CONFIG_COMPILE_OPTIONS};/EHsc")
target_link_libraries(libcpmt${FLAVOR_SUFFIX} PRIVATE Boost::math libcpmt${FLAVOR_SUFFIX}_eha)
set_target_properties(libcpmt${FLAVOR_SUFFIX} PROPERTIES STATIC_LIBRARY_OPTIONS "/machine:${VCLIBS_TARGET_ARCHITECTURE}")
endfunction()

add_stl_statics("" "_ITERATOR_DEBUG_LEVEL=0" "${VCLIBS_RELEASE_OPTIONS}")
Expand All @@ -559,3 +561,4 @@ add_stl_statics("d1" "_DEBUG;_ITERATOR_DEBUG_LEVEL=1" "${VCLIBS_DEBUG_OPTIONS}")
add_stl_statics("d0" "_DEBUG;_ITERATOR_DEBUG_LEVEL=0" "${VCLIBS_DEBUG_OPTIONS}")

add_library(stl_asan STATIC ${ASAN_SOURCES})
set_target_properties(stl_asan PROPERTIES STATIC_LIBRARY_OPTIONS "/machine:${VCLIBS_TARGET_ARCHITECTURE}")
20 changes: 11 additions & 9 deletions stl/src/vector_algorithms.cpp
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Expand Up @@ -39,6 +39,7 @@ static void _Reverse_copy_tail(_BidIt _First, _BidIt _Last, _OutIt _Dest) noexce
}
}

#if !defined(_M_ARM64EC)
static size_t _Byte_length(const void* _First, const void* _Last) noexcept {
return static_cast<const unsigned char*>(_Last) - static_cast<const unsigned char*>(_First);
}
Expand All @@ -50,6 +51,7 @@ static void _Advance_bytes(void*& _Target, ptrdiff_t _Offset) noexcept {
static void _Advance_bytes(const void*& _Target, ptrdiff_t _Offset) noexcept {
_Target = static_cast<const unsigned char*>(_Target) + _Offset;
}
#endif // !defined(_M_ARM64EC)

extern "C" {
__declspec(noalias) void __cdecl __std_swap_ranges_trivially_swappable_noalias(
Expand All @@ -68,7 +70,6 @@ __declspec(noalias) void __cdecl __std_swap_ranges_trivially_swappable_noalias(
_Advance_bytes(_First2, 32);
} while (_First1 != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

constexpr size_t _Mask_16 = ~((static_cast<size_t>(1) << 4) - 1);
if (_Byte_length(_First1, _Last1) >= 16
Expand Down Expand Up @@ -119,6 +120,7 @@ __declspec(noalias) void __cdecl __std_swap_ranges_trivially_swappable_noalias(
#else
#error Unsupported architecture
#endif
#endif // !defined(_M_ARM64EC)

auto _First1c = static_cast<unsigned char*>(_First1);
auto _Last1c = static_cast<unsigned char*>(_Last1);
Expand Down Expand Up @@ -159,7 +161,6 @@ __declspec(noalias) void __cdecl __std_reverse_trivially_swappable_1(void* _Firs
_Advance_bytes(_First, 32);
} while (_First != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

if (_Byte_length(_First, _Last) >= 32 && _bittest(&__isa_enabled, __ISA_AVAILABLE_SSE42)) {
const __m128i _Reverse_char_sse = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
Expand All @@ -176,6 +177,7 @@ __declspec(noalias) void __cdecl __std_reverse_trivially_swappable_1(void* _Firs
_Advance_bytes(_First, 16);
} while (_First != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

@AlexGuteniev Alex Guteniev (AlexGuteniev) Jan 20, 2022

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If _M_ARM64EC contains only fallback, it should not be called at all; instead _USE_STD_VECTOR_ALGORITHMS should be set to 0, like for _M_HYBRID.

Maybe they should even not exist, like for _M_ARM.

@cbezault Curtis J Bezault (cbezault) Jan 20, 2022

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I think we should mimic the behavior of _M_HYBRID I just put this PR out as it was to get the idea out there.

@strega-nil-ms nicole mazzuca (strega-nil-ms) May 26, 2022 •
edited
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I don't agree with this; I believe that arm64EC should be treated like ARM64 for purposes of vector instructions, since it is "just" ARM64 code with an emulator-friendly ABI.

However, I'll note that we currently don't have vector algorithms for ARM64, so the outcome should be the same.


_Reverse_tail(static_cast<unsigned char*>(_First), static_cast<unsigned char*>(_Last));
}
Expand All @@ -201,7 +203,6 @@ __declspec(noalias) void __cdecl __std_reverse_trivially_swappable_2(void* _Firs
_Advance_bytes(_First, 32);
} while (_First != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

if (_Byte_length(_First, _Last) >= 32 && _bittest(&__isa_enabled, __ISA_AVAILABLE_SSE42)) {
const __m128i _Reverse_short_sse = _mm_set_epi8(1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14);
Expand All @@ -218,6 +219,7 @@ __declspec(noalias) void __cdecl __std_reverse_trivially_swappable_2(void* _Firs
_Advance_bytes(_First, 16);
} while (_First != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

_Reverse_tail(static_cast<unsigned short*>(_First), static_cast<unsigned short*>(_Last));
}
Expand All @@ -240,7 +242,6 @@ __declspec(noalias) void __cdecl __std_reverse_trivially_swappable_4(void* _Firs
_Advance_bytes(_First, 32);
} while (_First != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

if (_Byte_length(_First, _Last) >= 32
#ifdef _M_IX86
Expand All @@ -260,6 +261,7 @@ __declspec(noalias) void __cdecl __std_reverse_trivially_swappable_4(void* _Firs
_Advance_bytes(_First, 16);
} while (_First != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

_Reverse_tail(static_cast<unsigned long*>(_First), static_cast<unsigned long*>(_Last));
}
Expand All @@ -280,7 +282,6 @@ __declspec(noalias) void __cdecl __std_reverse_trivially_swappable_8(void* _Firs
_Advance_bytes(_First, 32);
} while (_First != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

if (_Byte_length(_First, _Last) >= 32
#ifdef _M_IX86
Expand All @@ -301,6 +302,7 @@ __declspec(noalias) void __cdecl __std_reverse_trivially_swappable_8(void* _Firs
} while (_First != _Stop_at);
}

#endif // !defined(_M_ARM64EC)
_Reverse_tail(static_cast<unsigned long long*>(_First), static_cast<unsigned long long*>(_Last));
}

Expand All @@ -322,7 +324,6 @@ __declspec(noalias) void __cdecl __std_reverse_copy_trivially_copyable_1(
_Advance_bytes(_Dest, 32);
} while (_Dest != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

if (_Byte_length(_First, _Last) >= 16 && _bittest(&__isa_enabled, __ISA_AVAILABLE_SSE42)) {
const __m128i _Reverse_char_sse = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
Expand All @@ -336,6 +337,7 @@ __declspec(noalias) void __cdecl __std_reverse_copy_trivially_copyable_1(
_Advance_bytes(_Dest, 16);
} while (_Dest != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

_Reverse_copy_tail(static_cast<const unsigned char*>(_First), static_cast<const unsigned char*>(_Last),
static_cast<unsigned char*>(_Dest));
Expand All @@ -359,7 +361,6 @@ __declspec(noalias) void __cdecl __std_reverse_copy_trivially_copyable_2(
_Advance_bytes(_Dest, 32);
} while (_Dest != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

if (_Byte_length(_First, _Last) >= 16 && _bittest(&__isa_enabled, __ISA_AVAILABLE_SSE42)) {
const __m128i _Reverse_short_sse = _mm_set_epi8(1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14);
Expand All @@ -373,6 +374,7 @@ __declspec(noalias) void __cdecl __std_reverse_copy_trivially_copyable_2(
_Advance_bytes(_Dest, 16);
} while (_Dest != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

_Reverse_copy_tail(static_cast<const unsigned short*>(_First), static_cast<const unsigned short*>(_Last),
static_cast<unsigned short*>(_Dest));
Expand All @@ -393,7 +395,6 @@ __declspec(noalias) void __cdecl __std_reverse_copy_trivially_copyable_4(
_Advance_bytes(_Dest, 32);
} while (_Dest != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

if (_Byte_length(_First, _Last) >= 16
#ifdef _M_IX86
Expand All @@ -410,6 +411,7 @@ __declspec(noalias) void __cdecl __std_reverse_copy_trivially_copyable_4(
_Advance_bytes(_Dest, 16);
} while (_Dest != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

_Reverse_copy_tail(static_cast<const unsigned long*>(_First), static_cast<const unsigned long*>(_Last),
static_cast<unsigned long*>(_Dest));
Expand All @@ -429,7 +431,6 @@ __declspec(noalias) void __cdecl __std_reverse_copy_trivially_copyable_8(
_Advance_bytes(_Dest, 32);
} while (_Dest != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

if (_Byte_length(_First, _Last) >= 16
#ifdef _M_IX86
Expand All @@ -446,6 +447,7 @@ __declspec(noalias) void __cdecl __std_reverse_copy_trivially_copyable_8(
_Advance_bytes(_Dest, 16);
} while (_Dest != _Stop_at);
}
#endif // !defined(_M_ARM64EC)

_Reverse_copy_tail(static_cast<const unsigned long long*>(_First), static_cast<const unsigned long long*>(_Last),
static_cast<unsigned long long*>(_Dest));
Expand Down