Digital ASIC and FPGA engineer @ Cadence. Guitar player, Mortal Kombat player and cycling aspirant in spare time.
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Computer engineer. ASIC, FPGA and Mortal Kombat.
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- cademics-digital-ic-design
cademics-digital-ic-design PublicRepository with verilog modules developed in the CADEMICS digital IC design course by SBMicro and Cadence Design Systems
Verilog 2
- cademics-verification
cademics-verification PublicRepository with SystemVerilog modules developed in the CADEMICS SV for design and verification course by SBMicro and Cadence Design Systems
SystemVerilog 5
- heart-disease-analysis
heart-disease-analysis PublicProjeto que visa analisar e prever ocorrências de doenças cardíacas usando aprendizado de máquina
Jupyter Notebook 2
- wordcloud-unifei
wordcloud-unifei PublicJupyter Notebook 1
- sign-language-classification
sign-language-classification PublicReconhecimento símbolos em língua americana de sinais com robustez à ruído e classificação via rede neural
Jupyter Notebook 1
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