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Support Cortex-M cores with DSP instruction set #17644
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module: microcontrollersFor embedded MCUs like Cortex-M, or RTOS like Zephyr, does not track NPU backend like Arm Ethos.For embedded MCUs like Cortex-M, or RTOS like Zephyr, does not track NPU backend like Arm Ethos.partner: armFor backend delegation, kernels, demo, etc. from the 3rd-party partner, ArmFor backend delegation, kernels, demo, etc. from the 3rd-party partner, Arm
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module: microcontrollersFor embedded MCUs like Cortex-M, or RTOS like Zephyr, does not track NPU backend like Arm Ethos.For embedded MCUs like Cortex-M, or RTOS like Zephyr, does not track NPU backend like Arm Ethos.partner: armFor backend delegation, kernels, demo, etc. from the 3rd-party partner, ArmFor backend delegation, kernels, demo, etc. from the 3rd-party partner, Arm
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Extend Cortex-M support to cover cores with the DSP instruction set, such as Cortex-M4, M7 or M33. The existing cortex-m operators should largely just work as-is today, but have not been tested. The CMSIS library handles instruction set differences via detection of
ARM_MATH_DSPorARM_MATH_MVEIpre-processor macros.One caveat to keep in mind is that scratch buffer allocation sizes will need to be different between DSP & MVE implementations. As of today, those use the temp allocator so it is allocated at runtime, but #16041 will move these into the AOT memory plan.
cc @digantdesai@SS-JIA@freddan80@per@zingo@oscarandersson8218@mansnils@Sebastian-Larsson@robell@psiddh@AdrianLundell