Arm backend: Int16 linear support - #14258

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zingo merged 7 commits into
pytorch:mainfrom
per:int16_linear_support
Sep 24, 2025
Merged

Arm backend: Int16 linear support#14258
zingo merged 7 commits into
pytorch:mainfrom
per:int16_linear_support

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@perper commented Sep 12, 2025•
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Summary

Adds support for a16w8 for linear when targeting a backend with +int16 extension.

Fixes#13729

Test plan

Tested through unit tests.

cc @digantdesai@freddan80@zingo@oscarandersson8218

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🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/14258

Note: Links to docs will display an error until the docs builds have been completed.

❌ 2 New Failures

As of commit 0bdb35c with merge base 0329a8a (image):

NEW FAILURES - The following jobs have failed:

This comment was automatically generated by Dr. CI and updates every 15 minutes.

@meta-clameta-claBot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label Sep 12, 2025
@per
per requested a review from zingoSeptember 12, 2025 14:22
@perper added partner: arm For backend delegation, kernels, demo, etc. from the 3rd-party partner, Arm ciflow/trunk release notes: none Do not include this in the release notes labels Sep 12, 2025
@zingozingo added this to the 1.0.0 milestone Sep 12, 2025
@zingozingo changed the title Int16 linear supportArm backend: Int16 linear supportSep 12, 2025
@per
perforce-pushed the int16_linear_support branch from e170183 to 0ab797fCompareSeptember 15, 2025 07:08
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per commented Sep 15, 2025

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Unrelated failures.

digantdesai
digantdesai reviewed Sep 15, 2025
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Comment threadbackends/arm/_passes/add_bias_pass.py Outdated
digantdesai
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Comment threadbackends/arm/_passes/arm_pass_manager.py
self.add_pass(FuseConstantArgsPass(exported_program))
self.add_pass(InsertTableOpsPass(exported_program))
# If we have a conv2d with int16 activation split up into a convolution
# and an addition, to work-around the lack of support for int48 in torch

@digantdesaidigantdesaiSep 15, 2025•
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and an addition, to work-around the lack of support for int48 in torch

Or can it be done by using torch.dtype.int64 instead and then detecting and lowering it as int48 downstream?

@perperSep 15, 2025

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I was starting of in that direction, but it interfere a bit with the int64->int32 handling, so rather keep it separate.

@digantdesaidigantdesaiSep 16, 2025

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yeah given int64 is treated as radioactive :P

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This is awesome, No conv tests for 16a8w, just curious.

@per
perforce-pushed the int16_linear_support branch from 5b9c54e to ac4203cCompareSeptember 16, 2025 14:18
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Comment threadbackends/arm/test/ops/test_linear.py
)


@common.parametrize("test_data", test_data_all_16a8w)

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@per - Does it work with U55 and U85?
@Ninja91 - IIRC you already have tests seems like haven't merged?

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No, not yet. Test will be added for Ethos-U with a Vela update when it's in place.

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I have added tests for U55 and U85

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I see this testfail :(
[test-arm-backend (test_pytest_ops_ethosu_fvp) / linux-job https://github.com/pytorch/executorch/actions/runs/17768877335/job/50517971935?pr=14258#logs

FAILED backends/arm/test/ops/test_linear.py::test_linear_16a8w_tosa_INT[model_linear_rank1_large_randn,per_channel_quant=True] - AssertionError: Output 0 does not match reference output.
Given atol: 0.004528127912431955, rtol: 0.001.
Output tensor shape: torch.Size([20]), dtype: torch.float32
Difference: max: 0.1481781005859375, abs: 0.1481781005859375, mean abs error: 0.008467483520507812.
-- Model vs. Reference --
Numel: 20, 20
Median: 14.398289680480957, 14.398289680480957
Mean: 2.563008487224579, 2.555246722698212
Max: 69.8498764038086, 69.84635162353516
Min: -115.46151733398438, -115.60969543457031

@per
perforce-pushed the int16_linear_support branch from ac4203c to 54ad8e2CompareSeptember 17, 2025 15:20
@zingozingo removed this from the 1.0.0 milestone Sep 18, 2025
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I removed milestone 1.0 for now Vela does not support this anyway so lets take this a bit calmer.

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zingo commented Sep 19, 2025•
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@digantdesai , this has come out of sync with Meta internal version and I'm not allowed merge it, would you like to assist?

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yeah let me try to merge this.

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if it doesn't work I can give you a patch..

@per
Arm backend: Handle 16 bit activation for conv2d
bc0f134
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I2b189b559f699c7eda6921ed515c0e8a849226ca
@per
Arm backend: Decompose conv2d with 16 bit activation
60033f9
Support quantization to 16a8w. Since the resulting TOSA operator
needs to have the bias in int48 which isn't avaiable as a type in
torch, the conv2d needs to be decomposed into a conv + add, where
the conv result is scaled down to 32 bit before the addition of the
bias is done.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ib8cae694035796374a55a9909e501596e983abf5
@per
Arm backend: Handle i48 special case for bias tensor
edc1c42
For the case when the activation is 16 bit the bias in TOSA must be
a int48_t tensor. Since that can't be represented using torch.dtypes
the corresponding node.meta is set with a key 'tosa_dtype_48bit' to
pass through the note to the creation of the TOSA Tensor.
Also make sure to distinguish between int32 and int48 tensors in fuse
constant ops pass.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Iefe64f2b02f388c905c9c818ee7d2a6af40bc9e3
@per
Arm backend: Fix mult and scale calculation for int48_t
2bd09f9
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ibe158d8d35a632547290f1b9a055d061ae267d77
@per
Arm backend: Enable linear 16a8w tests
aafcede
Enable tests of int16 activations and int8 weight quantization.
Test for large_rand is disabled to sort out why the test is flaky.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I9de5d472f8862edebcf82c140399985db930c069
@per
Arm backend: Add special dtype TOSA handling
18c9985
Add a enum class to handle special dtypes that can't be represented
in torch (i.e. int48_t) to avoid leaking serializer types into the
pass handling of the backend.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I3388cec3c8a26f28790eedc3f124c336b6724cb4
@per
perforce-pushed the int16_linear_support branch from dc7a0a7 to 18c9985CompareSeptember 22, 2025 10:06
@zingo

zingo commented Sep 22, 2025

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Fails are unrelated
Note: Fail in trunk / test-arm-ootb-linux / linux-job is unrelated and handled by another PR

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@digantdesai we had to rebase as a file was changed and as we changed it again we got back to the same problem and need your help again. Sorry about that.

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@digantdesai has imported this pull request. If you are a Meta employee, you can view this in D82552402.

@zingo
zingo merged commit bb81136 into pytorch:mainSep 24, 2025
359 of 365 checks passed
jirioc pushed a commit to nxp-upstream/executorch that referenced this pull request Dec 19, 2025
@per@digantdesai@jirioc
Arm backend: Int16 linear support (pytorch#14258)
2be30ee
### Summary
Adds support for a16w8 for linear when targeting a backend with +int16
extension.
Fixespytorch#13729
### Test plan
Tested through unit tests.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Co-authored-by: Digant Desai <digantdesai@meta.com>
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[Arm] Support Linear INT16 TOSA reference model run

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, 'i'); if (__m === '*' || __re.test(location.href)) { injectUserscript("// Add copy buttons to all 
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Arm backend: Int16 linear support - #14258
Merged
zingo merged 7 commits into
pytorch:mainfrom 
per:int16_linear_support
Sep 24, 2025
Merged
Arm backend: Int16 linear support#14258
zingo merged 7 commits into
pytorch:mainfrom 
per:int16_linear_support
Conversation
@per
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Sep 12, 2025•

edited by pytorch-bot
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Summary
Adds support for a16w8 for linear when targeting a backend with +int16 extension.
Fixes#13729
Test plan
Tested through unit tests.
cc @digantdesai@freddan80@zingo@oscarandersson8218
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🔗 Helpful Links
🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/14258
Note: Links to docs will display an error until the docs builds have been completed.
❌ 2 New Failures
As of commit 0bdb35c with merge base 0329a8a (image):
NEW FAILURES - The following jobs have failed:
This comment was automatically generated by Dr. CI and updates every 15 minutes.
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added

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For backend delegation, kernels, demo, etc. from the 3rd-party partner, Arm
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added this to the 1.0.0 milestone
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@zingozingo
changed the title
Int16 linear supportArm backend: Int16 linear supportSep 12, 2025
@per
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Unrelated failures.
digantdesai
digantdesai
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Sep 15, 2025
View reviewed changes
Comment threadbackends/arm/_passes/add_bias_pass.py
Outdated

digantdesai
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reviewed
Sep 15, 2025
View reviewed changes
Comment threadbackends/arm/_passes/arm_pass_manager.py
 self.add_pass(FuseConstantArgsPass(exported_program))
 self.add_pass(InsertTableOpsPass(exported_program))
 # If we have a conv2d with int16 activation split up into a convolution
 # and an addition, to work-around the lack of support for int48 in torch
@digantdesaidigantdesaiSep 15, 2025•

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and an addition, to work-around the lack of support for int48 in torch
Or can it be done by using torch.dtype.int64 instead and then detecting and lowering it as int48 downstream?
@perperSep 15, 2025

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I was starting of in that direction, but it interfere a bit with the int64->int32 handling, so rather keep it separate.
@digantdesaidigantdesaiSep 16, 2025

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yeah given int64 is treated as radioactive :P
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This is awesome, No conv tests for 16a8w, just curious.
@per
perforce-pushed
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int16_linear_support
branch
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5b9c54e to
ac4203cCompareSeptember 16, 2025 14:18
digantdesai
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View reviewed changes
Comment threadbackends/arm/test/ops/test_linear.py
)


@common.parametrize("test_data", test_data_all_16a8w)
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@per - Does it work with U55 and U85?
@Ninja91 - IIRC you already have tests seems like haven't merged?
@perperSep 17, 2025

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No, not yet. Test will be added for Ethos-U with a Vela update when it's in place.
@Ninja91Ninja91Sep 23, 2025

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I have added tests for U55 and U85
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@digantdesai has imported this pull request. If you are a Meta employee, you can view this in D82552402.
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I see this testfail :(

[test-arm-backend (test_pytest_ops_ethosu_fvp) / linux-job https://github.com/pytorch/executorch/actions/runs/17768877335/job/50517971935?pr=14258#logs
FAILED backends/arm/test/ops/test_linear.py::test_linear_16a8w_tosa_INT[model_linear_rank1_large_randn,per_channel_quant=True] - AssertionError: Output 0 does not match reference output.

Given atol: 0.004528127912431955, rtol: 0.001.

Output tensor shape: torch.Size([20]), dtype: torch.float32

Difference: max: 0.1481781005859375, abs: 0.1481781005859375, mean abs error: 0.008467483520507812.

-- Model vs. Reference --

Numel: 20, 20

Median: 14.398289680480957, 14.398289680480957

Mean: 2.563008487224579, 2.555246722698212

Max: 69.8498764038086, 69.84635162353516

Min: -115.46151733398438, -115.60969543457031
@per
perforce-pushed
the
int16_linear_support
branch
from
ac4203c to
54ad8e2CompareSeptember 17, 2025 15:20
@zingozingo
removed this from the 1.0.0 milestone
Sep 18, 2025
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I removed milestone 1.0 for now Vela does not support this anyway so lets take this a bit calmer.
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@digantdesai , this has come out of sync with Meta internal version and I'm not allowed merge it, would you like to assist?
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yeah let me try to merge this.
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@digantdesai has imported this pull request. If you are a Meta employee, you can view this in D82552402.
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if it doesn't work I can give you a patch..
@per
Arm backend: Handle 16 bit activation for conv2d
bc0f134
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I2b189b559f699c7eda6921ed515c0e8a849226ca
@per
Arm backend: Decompose conv2d with 16 bit activation
60033f9
Support quantization to 16a8w. Since the resulting TOSA operator
needs to have the bias in int48 which isn't avaiable as a type in
torch, the conv2d needs to be decomposed into a conv + add, where
the conv result is scaled down to 32 bit before the addition of the
bias is done.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ib8cae694035796374a55a9909e501596e983abf5
@per
Arm backend: Handle i48 special case for bias tensor
edc1c42
For the case when the activation is 16 bit the bias in TOSA must be
a int48_t tensor. Since that can't be represented using torch.dtypes
the corresponding node.meta is set with a key 'tosa_dtype_48bit' to
pass through the note to the creation of the TOSA Tensor.
Also make sure to distinguish between int32 and int48 tensors in fuse
constant ops pass.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Iefe64f2b02f388c905c9c818ee7d2a6af40bc9e3
@per
Arm backend: Fix mult and scale calculation for int48_t
2bd09f9
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ibe158d8d35a632547290f1b9a055d061ae267d77
@per
Arm backend: Enable linear 16a8w tests
aafcede
Enable tests of int16 activations and int8 weight quantization.
Test for large_rand is disabled to sort out why the test is flaky.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I9de5d472f8862edebcf82c140399985db930c069
@per
Arm backend: Add special dtype TOSA handling
18c9985
Add a enum class to handle special dtypes that can't be represented
in torch (i.e. int48_t) to avoid leaking serializer types into the
pass handling of the backend.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I3388cec3c8a26f28790eedc3f124c336b6724cb4
@per
perforce-pushed
the
int16_linear_support
branch
from
dc7a0a7 to
18c9985CompareSeptember 22, 2025 10:06
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Fails are unrelated

Note: Fail in trunk / test-arm-ootb-linux / linux-job is unrelated and handled by another PR
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@digantdesai we had to rebase as a file was changed and as we changed it again we got back to the same problem and need your help again. Sorry about that.
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@digantdesai has imported this pull request. If you are a Meta employee, you can view this in D82552402.
@zingo
zingo
merged commit bb81136
into
pytorch:mainSep 24, 2025

359 of 365 checks passed

jirioc pushed a commit
to nxp-upstream/executorch
that referenced
this pull request
Dec 19, 2025
@per@digantdesai@jirioc
Arm backend: Int16 linear support (pytorch#14258)
2be30ee
### Summary
Adds support for a16w8 for linear when targeting a backend with +int16
extension.
Fixespytorch#13729
### Test plan
Tested through unit tests.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Co-authored-by: Digant Desai <digantdesai@meta.com>
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ciflow/trunkCLA SignedThis label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed.partner: armFor backend delegation, kernels, demo, etc. from the 3rd-party partner, Armrelease notes: noneDo not include this in the release notes

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[Arm] Support Linear INT16 TOSA reference model run


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, 'i');
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Arm backend: Int16 linear support - #14258
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per:int16_linear_support
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Arm backend: Int16 linear support#14258
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per:int16_linear_support
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Summary
Adds support for a16w8 for linear when targeting a backend with +int16 extension.
Fixes#13729
Test plan
Tested through unit tests.
cc @digantdesai@freddan80@zingo@oscarandersson8218
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🔗 Helpful Links
🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/14258
Note: Links to docs will display an error until the docs builds have been completed.
❌ 2 New Failures
As of commit 0bdb35c with merge base 0329a8a (image):
NEW FAILURES - The following jobs have failed:
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Int16 linear supportArm backend: Int16 linear supportSep 12, 2025
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Comment threadbackends/arm/_passes/arm_pass_manager.py
 self.add_pass(FuseConstantArgsPass(exported_program))
 self.add_pass(InsertTableOpsPass(exported_program))
 # If we have a conv2d with int16 activation split up into a convolution
 # and an addition, to work-around the lack of support for int48 in torch
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and an addition, to work-around the lack of support for int48 in torch
Or can it be done by using torch.dtype.int64 instead and then detecting and lowering it as int48 downstream?
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I was starting of in that direction, but it interfere a bit with the int64->int32 handling, so rather keep it separate.
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yeah given int64 is treated as radioactive :P
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This is awesome, No conv tests for 16a8w, just curious.
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@common.parametrize("test_data", test_data_all_16a8w)
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@per - Does it work with U55 and U85?
@Ninja91 - IIRC you already have tests seems like haven't merged?
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No, not yet. Test will be added for Ethos-U with a Vela update when it's in place.
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I have added tests for U55 and U85
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I see this testfail :(

[test-arm-backend (test_pytest_ops_ethosu_fvp) / linux-job https://github.com/pytorch/executorch/actions/runs/17768877335/job/50517971935?pr=14258#logs
FAILED backends/arm/test/ops/test_linear.py::test_linear_16a8w_tosa_INT[model_linear_rank1_large_randn,per_channel_quant=True] - AssertionError: Output 0 does not match reference output.

Given atol: 0.004528127912431955, rtol: 0.001.

Output tensor shape: torch.Size([20]), dtype: torch.float32

Difference: max: 0.1481781005859375, abs: 0.1481781005859375, mean abs error: 0.008467483520507812.

-- Model vs. Reference --

Numel: 20, 20

Median: 14.398289680480957, 14.398289680480957

Mean: 2.563008487224579, 2.555246722698212

Max: 69.8498764038086, 69.84635162353516

Min: -115.46151733398438, -115.60969543457031
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I removed milestone 1.0 for now Vela does not support this anyway so lets take this a bit calmer.
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@digantdesai , this has come out of sync with Meta internal version and I'm not allowed merge it, would you like to assist?
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yeah let me try to merge this.
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if it doesn't work I can give you a patch..
@per
Arm backend: Handle 16 bit activation for conv2d
bc0f134
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I2b189b559f699c7eda6921ed515c0e8a849226ca
@per
Arm backend: Decompose conv2d with 16 bit activation
60033f9
Support quantization to 16a8w. Since the resulting TOSA operator
needs to have the bias in int48 which isn't avaiable as a type in
torch, the conv2d needs to be decomposed into a conv + add, where
the conv result is scaled down to 32 bit before the addition of the
bias is done.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ib8cae694035796374a55a9909e501596e983abf5
@per
Arm backend: Handle i48 special case for bias tensor
edc1c42
For the case when the activation is 16 bit the bias in TOSA must be
a int48_t tensor. Since that can't be represented using torch.dtypes
the corresponding node.meta is set with a key 'tosa_dtype_48bit' to
pass through the note to the creation of the TOSA Tensor.
Also make sure to distinguish between int32 and int48 tensors in fuse
constant ops pass.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Iefe64f2b02f388c905c9c818ee7d2a6af40bc9e3
@per
Arm backend: Fix mult and scale calculation for int48_t
2bd09f9
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ibe158d8d35a632547290f1b9a055d061ae267d77
@per
Arm backend: Enable linear 16a8w tests
aafcede
Enable tests of int16 activations and int8 weight quantization.
Test for large_rand is disabled to sort out why the test is flaky.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I9de5d472f8862edebcf82c140399985db930c069
@per
Arm backend: Add special dtype TOSA handling
18c9985
Add a enum class to handle special dtypes that can't be represented
in torch (i.e. int48_t) to avoid leaking serializer types into the
pass handling of the backend.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I3388cec3c8a26f28790eedc3f124c336b6724cb4
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Fails are unrelated

Note: Fail in trunk / test-arm-ootb-linux / linux-job is unrelated and handled by another PR
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@digantdesai we had to rebase as a file was changed and as we changed it again we got back to the same problem and need your help again. Sorry about that.
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@per@digantdesai@jirioc
Arm backend: Int16 linear support (pytorch#14258)
2be30ee
### Summary
Adds support for a16w8 for linear when targeting a backend with +int16
extension.
Fixespytorch#13729
### Test plan
Tested through unit tests.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Co-authored-by: Digant Desai <digantdesai@meta.com>
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Arm backend: Int16 linear support - #14258
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zingo merged 7 commits into
pytorch:mainfrom 
per:int16_linear_support
Sep 24, 2025
Merged
Arm backend: Int16 linear support#14258
zingo merged 7 commits into
pytorch:mainfrom 
per:int16_linear_support
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Sep 12, 2025•

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Summary
Adds support for a16w8 for linear when targeting a backend with +int16 extension.
Fixes#13729
Test plan
Tested through unit tests.
cc @digantdesai@freddan80@zingo@oscarandersson8218
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🔗 Helpful Links
🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/14258
Note: Links to docs will display an error until the docs builds have been completed.
❌ 2 New Failures
As of commit 0bdb35c with merge base 0329a8a (image):
NEW FAILURES - The following jobs have failed:
This comment was automatically generated by Dr. CI and updates every 15 minutes.
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Int16 linear supportArm backend: Int16 linear supportSep 12, 2025
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Unrelated failures.
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Comment threadbackends/arm/_passes/arm_pass_manager.py
 self.add_pass(FuseConstantArgsPass(exported_program))
 self.add_pass(InsertTableOpsPass(exported_program))
 # If we have a conv2d with int16 activation split up into a convolution
 # and an addition, to work-around the lack of support for int48 in torch
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and an addition, to work-around the lack of support for int48 in torch
Or can it be done by using torch.dtype.int64 instead and then detecting and lowering it as int48 downstream?
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I was starting of in that direction, but it interfere a bit with the int64->int32 handling, so rather keep it separate.
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yeah given int64 is treated as radioactive :P
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This is awesome, No conv tests for 16a8w, just curious.
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Comment threadbackends/arm/test/ops/test_linear.py
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@common.parametrize("test_data", test_data_all_16a8w)
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@per - Does it work with U55 and U85?
@Ninja91 - IIRC you already have tests seems like haven't merged?
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No, not yet. Test will be added for Ethos-U with a Vela update when it's in place.
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I have added tests for U55 and U85
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I see this testfail :(

[test-arm-backend (test_pytest_ops_ethosu_fvp) / linux-job https://github.com/pytorch/executorch/actions/runs/17768877335/job/50517971935?pr=14258#logs
FAILED backends/arm/test/ops/test_linear.py::test_linear_16a8w_tosa_INT[model_linear_rank1_large_randn,per_channel_quant=True] - AssertionError: Output 0 does not match reference output.

Given atol: 0.004528127912431955, rtol: 0.001.

Output tensor shape: torch.Size([20]), dtype: torch.float32

Difference: max: 0.1481781005859375, abs: 0.1481781005859375, mean abs error: 0.008467483520507812.

-- Model vs. Reference --

Numel: 20, 20

Median: 14.398289680480957, 14.398289680480957

Mean: 2.563008487224579, 2.555246722698212

Max: 69.8498764038086, 69.84635162353516

Min: -115.46151733398438, -115.60969543457031
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I removed milestone 1.0 for now Vela does not support this anyway so lets take this a bit calmer.
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@digantdesai , this has come out of sync with Meta internal version and I'm not allowed merge it, would you like to assist?
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yeah let me try to merge this.
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if it doesn't work I can give you a patch..
@per
Arm backend: Handle 16 bit activation for conv2d
bc0f134
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I2b189b559f699c7eda6921ed515c0e8a849226ca
@per
Arm backend: Decompose conv2d with 16 bit activation
60033f9
Support quantization to 16a8w. Since the resulting TOSA operator
needs to have the bias in int48 which isn't avaiable as a type in
torch, the conv2d needs to be decomposed into a conv + add, where
the conv result is scaled down to 32 bit before the addition of the
bias is done.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ib8cae694035796374a55a9909e501596e983abf5
@per
Arm backend: Handle i48 special case for bias tensor
edc1c42
For the case when the activation is 16 bit the bias in TOSA must be
a int48_t tensor. Since that can't be represented using torch.dtypes
the corresponding node.meta is set with a key 'tosa_dtype_48bit' to
pass through the note to the creation of the TOSA Tensor.
Also make sure to distinguish between int32 and int48 tensors in fuse
constant ops pass.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Iefe64f2b02f388c905c9c818ee7d2a6af40bc9e3
@per
Arm backend: Fix mult and scale calculation for int48_t
2bd09f9
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ibe158d8d35a632547290f1b9a055d061ae267d77
@per
Arm backend: Enable linear 16a8w tests
aafcede
Enable tests of int16 activations and int8 weight quantization.
Test for large_rand is disabled to sort out why the test is flaky.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I9de5d472f8862edebcf82c140399985db930c069
@per
Arm backend: Add special dtype TOSA handling
18c9985
Add a enum class to handle special dtypes that can't be represented
in torch (i.e. int48_t) to avoid leaking serializer types into the
pass handling of the backend.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I3388cec3c8a26f28790eedc3f124c336b6724cb4
@per
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Fails are unrelated

Note: Fail in trunk / test-arm-ootb-linux / linux-job is unrelated and handled by another PR
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@digantdesai we had to rebase as a file was changed and as we changed it again we got back to the same problem and need your help again. Sorry about that.
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@digantdesai has imported this pull request. If you are a Meta employee, you can view this in D82552402.
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359 of 365 checks passed

jirioc pushed a commit
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that referenced
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Dec 19, 2025
@per@digantdesai@jirioc
Arm backend: Int16 linear support (pytorch#14258)
2be30ee
### Summary
Adds support for a16w8 for linear when targeting a backend with +int16
extension.
Fixespytorch#13729
### Test plan
Tested through unit tests.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Co-authored-by: Digant Desai <digantdesai@meta.com>
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[Arm] Support Linear INT16 TOSA reference model run


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injectUserscript("// Strip utm_, fbclid, gclid, etc. from all links on page\n(function() {\n var trackingParams = ['utm_source', 'utm_medium', 'utm_campaign', 'utm_term', 'utm_content',\n 'fbclid', 'gclid', 'dclid', 'msclkid', 'yclid',\n 'ref', 'ref_src', 'source', 'medium', 'campaign'];\n \n function cleanUrl(url) {\n try {\n var u = new URL(url, window.location.origin);\n var changed = false;\n trackingParams.forEach(function(p) {\n if (u.searchParams.has(p)) {\n u.searchParams.delete(p);\n changed = true;\n }\n });\n return changed ? u.toString() : url;\n } catch (e) {\n return url;\n }\n }\n \n function cleanLinks() {\n document.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n \n cleanLinks();\n \n var observer = new MutationObserver(function(mutations) {\n mutations.forEach(function(m) {\n m.addedNodes.forEach(function(node) {\n if (node.nodeType === 1) {\n if (node.tagName === 'A') cleanLinks();\n node.querySelectorAll('a[href]').forEach(function(a) {\n var clean = cleanUrl(a.href);\n if (clean !== a.href) a.href = clean;\n });\n }\n });\n });\n });\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "Remove Tracking Parameters from Links");
}
} catch(__e) { console.warn('[Userscript:Remove Tracking Parameters from Links]', __e); }
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Arm backend: Int16 linear support - #14258
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pytorch:mainfrom 
per:int16_linear_support
Sep 24, 2025
Merged
Arm backend: Int16 linear support#14258
zingo merged 7 commits into
pytorch:mainfrom 
per:int16_linear_support
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Sep 12, 2025•

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Summary
Adds support for a16w8 for linear when targeting a backend with +int16 extension.
Fixes#13729
Test plan
Tested through unit tests.
cc @digantdesai@freddan80@zingo@oscarandersson8218
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🔗 Helpful Links
🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/14258
Note: Links to docs will display an error until the docs builds have been completed.
❌ 2 New Failures
As of commit 0bdb35c with merge base 0329a8a (image):
NEW FAILURES - The following jobs have failed:
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Int16 linear supportArm backend: Int16 linear supportSep 12, 2025
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Unrelated failures.
digantdesai
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Comment threadbackends/arm/_passes/add_bias_pass.py
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Comment threadbackends/arm/_passes/arm_pass_manager.py
 self.add_pass(FuseConstantArgsPass(exported_program))
 self.add_pass(InsertTableOpsPass(exported_program))
 # If we have a conv2d with int16 activation split up into a convolution
 # and an addition, to work-around the lack of support for int48 in torch
@digantdesaidigantdesaiSep 15, 2025•

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and an addition, to work-around the lack of support for int48 in torch
Or can it be done by using torch.dtype.int64 instead and then detecting and lowering it as int48 downstream?
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I was starting of in that direction, but it interfere a bit with the int64->int32 handling, so rather keep it separate.
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yeah given int64 is treated as radioactive :P
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This is awesome, No conv tests for 16a8w, just curious.
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Comment threadbackends/arm/test/ops/test_linear.py
)


@common.parametrize("test_data", test_data_all_16a8w)
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@per - Does it work with U55 and U85?
@Ninja91 - IIRC you already have tests seems like haven't merged?
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No, not yet. Test will be added for Ethos-U with a Vela update when it's in place.
@Ninja91Ninja91Sep 23, 2025

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I have added tests for U55 and U85
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I see this testfail :(

[test-arm-backend (test_pytest_ops_ethosu_fvp) / linux-job https://github.com/pytorch/executorch/actions/runs/17768877335/job/50517971935?pr=14258#logs
FAILED backends/arm/test/ops/test_linear.py::test_linear_16a8w_tosa_INT[model_linear_rank1_large_randn,per_channel_quant=True] - AssertionError: Output 0 does not match reference output.

Given atol: 0.004528127912431955, rtol: 0.001.

Output tensor shape: torch.Size([20]), dtype: torch.float32

Difference: max: 0.1481781005859375, abs: 0.1481781005859375, mean abs error: 0.008467483520507812.

-- Model vs. Reference --

Numel: 20, 20

Median: 14.398289680480957, 14.398289680480957

Mean: 2.563008487224579, 2.555246722698212

Max: 69.8498764038086, 69.84635162353516

Min: -115.46151733398438, -115.60969543457031
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I removed milestone 1.0 for now Vela does not support this anyway so lets take this a bit calmer.
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@digantdesai , this has come out of sync with Meta internal version and I'm not allowed merge it, would you like to assist?
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yeah let me try to merge this.
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if it doesn't work I can give you a patch..
@per
Arm backend: Handle 16 bit activation for conv2d
bc0f134
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I2b189b559f699c7eda6921ed515c0e8a849226ca
@per
Arm backend: Decompose conv2d with 16 bit activation
60033f9
Support quantization to 16a8w. Since the resulting TOSA operator
needs to have the bias in int48 which isn't avaiable as a type in
torch, the conv2d needs to be decomposed into a conv + add, where
the conv result is scaled down to 32 bit before the addition of the
bias is done.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ib8cae694035796374a55a9909e501596e983abf5
@per
Arm backend: Handle i48 special case for bias tensor
edc1c42
For the case when the activation is 16 bit the bias in TOSA must be
a int48_t tensor. Since that can't be represented using torch.dtypes
the corresponding node.meta is set with a key 'tosa_dtype_48bit' to
pass through the note to the creation of the TOSA Tensor.
Also make sure to distinguish between int32 and int48 tensors in fuse
constant ops pass.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Iefe64f2b02f388c905c9c818ee7d2a6af40bc9e3
@per
Arm backend: Fix mult and scale calculation for int48_t
2bd09f9
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ibe158d8d35a632547290f1b9a055d061ae267d77
@per
Arm backend: Enable linear 16a8w tests
aafcede
Enable tests of int16 activations and int8 weight quantization.
Test for large_rand is disabled to sort out why the test is flaky.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I9de5d472f8862edebcf82c140399985db930c069
@per
Arm backend: Add special dtype TOSA handling
18c9985
Add a enum class to handle special dtypes that can't be represented
in torch (i.e. int48_t) to avoid leaking serializer types into the
pass handling of the backend.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I3388cec3c8a26f28790eedc3f124c336b6724cb4
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Fails are unrelated

Note: Fail in trunk / test-arm-ootb-linux / linux-job is unrelated and handled by another PR
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@digantdesai we had to rebase as a file was changed and as we changed it again we got back to the same problem and need your help again. Sorry about that.
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@digantdesai has imported this pull request. If you are a Meta employee, you can view this in D82552402.
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@per@digantdesai@jirioc
Arm backend: Int16 linear support (pytorch#14258)
2be30ee
### Summary
Adds support for a16w8 for linear when targeting a backend with +int16
extension.
Fixespytorch#13729
### Test plan
Tested through unit tests.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Co-authored-by: Digant Desai <digantdesai@meta.com>
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@digantdesaidigantdesaidigantdesai approved these changes
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[Arm] Support Linear INT16 TOSA reference model run


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, 'i');
if (__m === '*' || __re.test(location.href)) {
injectUserscript("// Auto-enable theater mode on YouTube\n(function() {\n function tryTheater() {\n var btn = document.querySelector('button[aria-label=\"Theater mode\"], ytd-player #player button[title=\"Theater mode\"]');\n if (btn && !btn.classList.contains('activated')) {\n btn.click();\n }\n }\n \n // Try immediately\n tryTheater();\n \n // Try after navigation (SPA)\n var lastUrl = location.href;\n setInterval(function() {\n if (location.href !== lastUrl) {\n lastUrl = location.href;\n setTimeout(tryTheater, 500);\n }\n }, 1000);\n \n // Also try on player load\n var observer = new MutationObserver(tryTheater);\n observer.observe(document.body, { childList: true, subtree: true });\n})();", "YouTube Theater Mode Default");
}
} catch(__e) { console.warn('[Userscript:YouTube Theater Mode Default]', __e); }
})();
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try {
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Skip to content
Arm backend: Int16 linear support - #14258
Merged
zingo merged 7 commits into
pytorch:mainfrom 
per:int16_linear_support
Sep 24, 2025
Merged
Arm backend: Int16 linear support#14258
zingo merged 7 commits into
pytorch:mainfrom 
per:int16_linear_support
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@per
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Sep 12, 2025•

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Summary
Adds support for a16w8 for linear when targeting a backend with +int16 extension.
Fixes#13729
Test plan
Tested through unit tests.
cc @digantdesai@freddan80@zingo@oscarandersson8218
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🔗 Helpful Links
🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/14258
Note: Links to docs will display an error until the docs builds have been completed.
❌ 2 New Failures
As of commit 0bdb35c with merge base 0329a8a (image):
NEW FAILURES - The following jobs have failed:
This comment was automatically generated by Dr. CI and updates every 15 minutes.
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Int16 linear supportArm backend: Int16 linear supportSep 12, 2025
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Unrelated failures.
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Comment threadbackends/arm/_passes/add_bias_pass.py
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Comment threadbackends/arm/_passes/arm_pass_manager.py
 self.add_pass(FuseConstantArgsPass(exported_program))
 self.add_pass(InsertTableOpsPass(exported_program))
 # If we have a conv2d with int16 activation split up into a convolution
 # and an addition, to work-around the lack of support for int48 in torch
@digantdesaidigantdesaiSep 15, 2025•

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and an addition, to work-around the lack of support for int48 in torch
Or can it be done by using torch.dtype.int64 instead and then detecting and lowering it as int48 downstream?
@perperSep 15, 2025

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I was starting of in that direction, but it interfere a bit with the int64->int32 handling, so rather keep it separate.
@digantdesaidigantdesaiSep 16, 2025

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yeah given int64 is treated as radioactive :P
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This is awesome, No conv tests for 16a8w, just curious.
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Comment threadbackends/arm/test/ops/test_linear.py
)


@common.parametrize("test_data", test_data_all_16a8w)
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@per - Does it work with U55 and U85?
@Ninja91 - IIRC you already have tests seems like haven't merged?
@perperSep 17, 2025

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No, not yet. Test will be added for Ethos-U with a Vela update when it's in place.
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I have added tests for U55 and U85
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I see this testfail :(

[test-arm-backend (test_pytest_ops_ethosu_fvp) / linux-job https://github.com/pytorch/executorch/actions/runs/17768877335/job/50517971935?pr=14258#logs
FAILED backends/arm/test/ops/test_linear.py::test_linear_16a8w_tosa_INT[model_linear_rank1_large_randn,per_channel_quant=True] - AssertionError: Output 0 does not match reference output.

Given atol: 0.004528127912431955, rtol: 0.001.

Output tensor shape: torch.Size([20]), dtype: torch.float32

Difference: max: 0.1481781005859375, abs: 0.1481781005859375, mean abs error: 0.008467483520507812.

-- Model vs. Reference --

Numel: 20, 20

Median: 14.398289680480957, 14.398289680480957

Mean: 2.563008487224579, 2.555246722698212

Max: 69.8498764038086, 69.84635162353516

Min: -115.46151733398438, -115.60969543457031
@per
perforce-pushed
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int16_linear_support
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@zingozingo
removed this from the 1.0.0 milestone
Sep 18, 2025
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I removed milestone 1.0 for now Vela does not support this anyway so lets take this a bit calmer.
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Sep 19, 2025•

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@digantdesai , this has come out of sync with Meta internal version and I'm not allowed merge it, would you like to assist?
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yeah let me try to merge this.
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if it doesn't work I can give you a patch..
@per
Arm backend: Handle 16 bit activation for conv2d
bc0f134
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I2b189b559f699c7eda6921ed515c0e8a849226ca
@per
Arm backend: Decompose conv2d with 16 bit activation
60033f9
Support quantization to 16a8w. Since the resulting TOSA operator
needs to have the bias in int48 which isn't avaiable as a type in
torch, the conv2d needs to be decomposed into a conv + add, where
the conv result is scaled down to 32 bit before the addition of the
bias is done.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ib8cae694035796374a55a9909e501596e983abf5
@per
Arm backend: Handle i48 special case for bias tensor
edc1c42
For the case when the activation is 16 bit the bias in TOSA must be
a int48_t tensor. Since that can't be represented using torch.dtypes
the corresponding node.meta is set with a key 'tosa_dtype_48bit' to
pass through the note to the creation of the TOSA Tensor.
Also make sure to distinguish between int32 and int48 tensors in fuse
constant ops pass.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Iefe64f2b02f388c905c9c818ee7d2a6af40bc9e3
@per
Arm backend: Fix mult and scale calculation for int48_t
2bd09f9
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ibe158d8d35a632547290f1b9a055d061ae267d77
@per
Arm backend: Enable linear 16a8w tests
aafcede
Enable tests of int16 activations and int8 weight quantization.
Test for large_rand is disabled to sort out why the test is flaky.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I9de5d472f8862edebcf82c140399985db930c069
@per
Arm backend: Add special dtype TOSA handling
18c9985
Add a enum class to handle special dtypes that can't be represented
in torch (i.e. int48_t) to avoid leaking serializer types into the
pass handling of the backend.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I3388cec3c8a26f28790eedc3f124c336b6724cb4
@per
perforce-pushed
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Fails are unrelated

Note: Fail in trunk / test-arm-ootb-linux / linux-job is unrelated and handled by another PR
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@digantdesai we had to rebase as a file was changed and as we changed it again we got back to the same problem and need your help again. Sorry about that.
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Arm backend: Int16 linear support (pytorch#14258)
2be30ee
### Summary
Adds support for a16w8 for linear when targeting a backend with +int16
extension.
Fixespytorch#13729
### Test plan
Tested through unit tests.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Co-authored-by: Digant Desai <digantdesai@meta.com>
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Arm backend: Int16 linear support - #14258
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Arm backend: Int16 linear support#14258
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Summary
Adds support for a16w8 for linear when targeting a backend with +int16 extension.
Fixes#13729
Test plan
Tested through unit tests.
cc @digantdesai@freddan80@zingo@oscarandersson8218
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🔗 Helpful Links
🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/14258
Note: Links to docs will display an error until the docs builds have been completed.
❌ 2 New Failures
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Int16 linear supportArm backend: Int16 linear supportSep 12, 2025
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Unrelated failures.
digantdesai
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Comment threadbackends/arm/_passes/add_bias_pass.py
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Comment threadbackends/arm/_passes/arm_pass_manager.py
 self.add_pass(FuseConstantArgsPass(exported_program))
 self.add_pass(InsertTableOpsPass(exported_program))
 # If we have a conv2d with int16 activation split up into a convolution
 # and an addition, to work-around the lack of support for int48 in torch
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and an addition, to work-around the lack of support for int48 in torch
Or can it be done by using torch.dtype.int64 instead and then detecting and lowering it as int48 downstream?
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I was starting of in that direction, but it interfere a bit with the int64->int32 handling, so rather keep it separate.
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yeah given int64 is treated as radioactive :P
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This is awesome, No conv tests for 16a8w, just curious.
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Comment threadbackends/arm/test/ops/test_linear.py
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@common.parametrize("test_data", test_data_all_16a8w)
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@per - Does it work with U55 and U85?
@Ninja91 - IIRC you already have tests seems like haven't merged?
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No, not yet. Test will be added for Ethos-U with a Vela update when it's in place.
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I have added tests for U55 and U85
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I see this testfail :(

[test-arm-backend (test_pytest_ops_ethosu_fvp) / linux-job https://github.com/pytorch/executorch/actions/runs/17768877335/job/50517971935?pr=14258#logs
FAILED backends/arm/test/ops/test_linear.py::test_linear_16a8w_tosa_INT[model_linear_rank1_large_randn,per_channel_quant=True] - AssertionError: Output 0 does not match reference output.

Given atol: 0.004528127912431955, rtol: 0.001.

Output tensor shape: torch.Size([20]), dtype: torch.float32

Difference: max: 0.1481781005859375, abs: 0.1481781005859375, mean abs error: 0.008467483520507812.

-- Model vs. Reference --

Numel: 20, 20

Median: 14.398289680480957, 14.398289680480957

Mean: 2.563008487224579, 2.555246722698212

Max: 69.8498764038086, 69.84635162353516

Min: -115.46151733398438, -115.60969543457031
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I removed milestone 1.0 for now Vela does not support this anyway so lets take this a bit calmer.
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@digantdesai , this has come out of sync with Meta internal version and I'm not allowed merge it, would you like to assist?
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yeah let me try to merge this.
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if it doesn't work I can give you a patch..
@per
Arm backend: Handle 16 bit activation for conv2d
bc0f134
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I2b189b559f699c7eda6921ed515c0e8a849226ca
@per
Arm backend: Decompose conv2d with 16 bit activation
60033f9
Support quantization to 16a8w. Since the resulting TOSA operator
needs to have the bias in int48 which isn't avaiable as a type in
torch, the conv2d needs to be decomposed into a conv + add, where
the conv result is scaled down to 32 bit before the addition of the
bias is done.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ib8cae694035796374a55a9909e501596e983abf5
@per
Arm backend: Handle i48 special case for bias tensor
edc1c42
For the case when the activation is 16 bit the bias in TOSA must be
a int48_t tensor. Since that can't be represented using torch.dtypes
the corresponding node.meta is set with a key 'tosa_dtype_48bit' to
pass through the note to the creation of the TOSA Tensor.
Also make sure to distinguish between int32 and int48 tensors in fuse
constant ops pass.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Iefe64f2b02f388c905c9c818ee7d2a6af40bc9e3
@per
Arm backend: Fix mult and scale calculation for int48_t
2bd09f9
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ibe158d8d35a632547290f1b9a055d061ae267d77
@per
Arm backend: Enable linear 16a8w tests
aafcede
Enable tests of int16 activations and int8 weight quantization.
Test for large_rand is disabled to sort out why the test is flaky.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I9de5d472f8862edebcf82c140399985db930c069
@per
Arm backend: Add special dtype TOSA handling
18c9985
Add a enum class to handle special dtypes that can't be represented
in torch (i.e. int48_t) to avoid leaking serializer types into the
pass handling of the backend.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I3388cec3c8a26f28790eedc3f124c336b6724cb4
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Fails are unrelated

Note: Fail in trunk / test-arm-ootb-linux / linux-job is unrelated and handled by another PR
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@digantdesai we had to rebase as a file was changed and as we changed it again we got back to the same problem and need your help again. Sorry about that.
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@per@digantdesai@jirioc
Arm backend: Int16 linear support (pytorch#14258)
2be30ee
### Summary
Adds support for a16w8 for linear when targeting a backend with +int16
extension.
Fixespytorch#13729
### Test plan
Tested through unit tests.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Co-authored-by: Digant Desai <digantdesai@meta.com>
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Arm backend: Int16 linear support - #14258
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Arm backend: Int16 linear support#14258
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Summary
Adds support for a16w8 for linear when targeting a backend with +int16 extension.
Fixes#13729
Test plan
Tested through unit tests.
cc @digantdesai@freddan80@zingo@oscarandersson8218
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🔗 Helpful Links
🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/14258
Note: Links to docs will display an error until the docs builds have been completed.
❌ 2 New Failures
As of commit 0bdb35c with merge base 0329a8a (image):
NEW FAILURES - The following jobs have failed:
This comment was automatically generated by Dr. CI and updates every 15 minutes.
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Int16 linear supportArm backend: Int16 linear supportSep 12, 2025
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Unrelated failures.
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Comment threadbackends/arm/_passes/arm_pass_manager.py
 self.add_pass(FuseConstantArgsPass(exported_program))
 self.add_pass(InsertTableOpsPass(exported_program))
 # If we have a conv2d with int16 activation split up into a convolution
 # and an addition, to work-around the lack of support for int48 in torch
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and an addition, to work-around the lack of support for int48 in torch
Or can it be done by using torch.dtype.int64 instead and then detecting and lowering it as int48 downstream?
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I was starting of in that direction, but it interfere a bit with the int64->int32 handling, so rather keep it separate.
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yeah given int64 is treated as radioactive :P
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This is awesome, No conv tests for 16a8w, just curious.
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@common.parametrize("test_data", test_data_all_16a8w)
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@per - Does it work with U55 and U85?
@Ninja91 - IIRC you already have tests seems like haven't merged?
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No, not yet. Test will be added for Ethos-U with a Vela update when it's in place.
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I have added tests for U55 and U85
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I see this testfail :(

[test-arm-backend (test_pytest_ops_ethosu_fvp) / linux-job https://github.com/pytorch/executorch/actions/runs/17768877335/job/50517971935?pr=14258#logs
FAILED backends/arm/test/ops/test_linear.py::test_linear_16a8w_tosa_INT[model_linear_rank1_large_randn,per_channel_quant=True] - AssertionError: Output 0 does not match reference output.

Given atol: 0.004528127912431955, rtol: 0.001.

Output tensor shape: torch.Size([20]), dtype: torch.float32

Difference: max: 0.1481781005859375, abs: 0.1481781005859375, mean abs error: 0.008467483520507812.

-- Model vs. Reference --

Numel: 20, 20

Median: 14.398289680480957, 14.398289680480957

Mean: 2.563008487224579, 2.555246722698212

Max: 69.8498764038086, 69.84635162353516

Min: -115.46151733398438, -115.60969543457031
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I removed milestone 1.0 for now Vela does not support this anyway so lets take this a bit calmer.
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@digantdesai , this has come out of sync with Meta internal version and I'm not allowed merge it, would you like to assist?
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yeah let me try to merge this.
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if it doesn't work I can give you a patch..
@per
Arm backend: Handle 16 bit activation for conv2d
bc0f134
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I2b189b559f699c7eda6921ed515c0e8a849226ca
@per
Arm backend: Decompose conv2d with 16 bit activation
60033f9
Support quantization to 16a8w. Since the resulting TOSA operator
needs to have the bias in int48 which isn't avaiable as a type in
torch, the conv2d needs to be decomposed into a conv + add, where
the conv result is scaled down to 32 bit before the addition of the
bias is done.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ib8cae694035796374a55a9909e501596e983abf5
@per
Arm backend: Handle i48 special case for bias tensor
edc1c42
For the case when the activation is 16 bit the bias in TOSA must be
a int48_t tensor. Since that can't be represented using torch.dtypes
the corresponding node.meta is set with a key 'tosa_dtype_48bit' to
pass through the note to the creation of the TOSA Tensor.
Also make sure to distinguish between int32 and int48 tensors in fuse
constant ops pass.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Iefe64f2b02f388c905c9c818ee7d2a6af40bc9e3
@per
Arm backend: Fix mult and scale calculation for int48_t
2bd09f9
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: Ibe158d8d35a632547290f1b9a055d061ae267d77
@per
Arm backend: Enable linear 16a8w tests
aafcede
Enable tests of int16 activations and int8 weight quantization.
Test for large_rand is disabled to sort out why the test is flaky.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I9de5d472f8862edebcf82c140399985db930c069
@per
Arm backend: Add special dtype TOSA handling
18c9985
Add a enum class to handle special dtypes that can't be represented
in torch (i.e. int48_t) to avoid leaking serializer types into the
pass handling of the backend.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Change-Id: I3388cec3c8a26f28790eedc3f124c336b6724cb4
@per
perforce-pushed
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@zingo
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Sep 22, 2025

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Fails are unrelated

Note: Fail in trunk / test-arm-ootb-linux / linux-job is unrelated and handled by another PR
@zingo
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Sep 22, 2025

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@digantdesai we had to rebase as a file was changed and as we changed it again we got back to the same problem and need your help again. Sorry about that.
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Sep 23, 2025

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@digantdesai has imported this pull request. If you are a Meta employee, you can view this in D82552402.
@zingo
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merged commit bb81136
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pytorch:mainSep 24, 2025

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Dec 19, 2025
@per@digantdesai@jirioc
Arm backend: Int16 linear support (pytorch#14258)
2be30ee
### Summary
Adds support for a16w8 for linear when targeting a backend with +int16
extension.
Fixespytorch#13729
### Test plan
Tested through unit tests.
Signed-off-by: Per Åstrand <per.astrand@arm.com>
Co-authored-by: Digant Desai <digantdesai@meta.com>
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@digantdesaidigantdesaidigantdesai approved these changes
@zingozingoAwaiting requested review from zingo
@Ninja91Ninja91Awaiting requested review from Ninja91

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[Arm] Support Linear INT16 TOSA reference model run


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