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net: stmmac: dwmac-qcom-ethqos: Restore nominal clk_ptp_ref frequency - #619
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Merge Check Failed: No CR Numbers Found Error: No Change Request numbers were found. Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests. |
qlijarvis
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Jun 1, 2026
PR #619 — validate-patchPR:#619
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qlijarvis
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Jun 1, 2026
PR #619 — checker-log-analyzerPR:#619
Detailed report: Full report
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Shiraz Hashim (shashim-quic)
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submit patch upstream and bring it as FROMLIST.
pkiran (pkrian)
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Jun 9, 2026
qli-2.0 GA Critical Fix |
Shiraz Hashim (shashim-quic)
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Please send the patch upstream and bring as FROMLIST.
Salendarsingh Gaud (sgaud-quic)
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Jun 10, 2026
Committer sign-off is missing |
Merge Check Failed: No CR Numbers Found Error: No Change Request numbers were found. Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests. |
pkiran (pkrian)
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Jun 10, 2026
CRs-Fixed: 4549777 |
f2011a8 to
c939be9CompareSalendarsingh Gaud (sgaud-quic)
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Jun 11, 2026
This should be added to PR Body |
qcomlnxci
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Jun 11, 2026
Test Matrix
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qcomlnxci
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Jun 11, 2026
Test Matrix
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Salendarsingh Gaud (sgaud-quic)
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Jun 11, 2026
CRs-Fixed : to be added to PR Body |
Merge Check Failed: No CR Numbers Found Error: No Change Request numbers were found. Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests. |
pkiran (pkrian)
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Jun 14, 2026
CRs-Fixed: 4549777 |
Merge Check Failed: CR Not Eligible for Merge CR 4549777 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
…_ref" This reverts commit db845b9. Reason: this change causes the PTP clock to always be in Turbo mode which can cause power KPI regression. Signed-off-by: Kiran Patchala <pkiran@qti.qualcomm.com>
qcomlnxci
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Jun 17, 2026
Test Matrix
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The current implementation configures the PTP reference clock (clk_ptp_ref) to its maximum supported frequency in order to improve timestamp resolution.
While higher clock rates benefit PTP/gPTP accuracy, forcing the PTP reference clock to operate at maximum frequency results in increased power consumption, as the clock remains at this rate irrespective of actual runtime requirements.
On power-sensitive platforms and in use cases where ultra-high timestamp precision is not required, this leads to unnecessary power overhead.
Update the driver to restore the nominal/default clock configuration for clk_ptp_ref, allowing the platform to operate at its baseline frequency (e.g., ~19.2 MHz). This reduces power consumption while maintaining functional correctness for standard PTP operation.
Higher clock frequencies can be enabled through targeted configuration if improved timestamp resolution is required for specific applications
CRs-Fixed: 4549777