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AIX: use align 8 for byval parameter - #134396
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rustbot
commented
Dec 16, 2024
r? @Nadrieril rustbot has assigned @Nadrieril. Use |
workingjubilee
commented
Dec 16, 2024
...wait, so on AIX, loads from the stack aren't aligned to the size of the type? whee... |
Not exactly the case. That's just how we are representing it in the IR. In reality, it almost always 16 byte aligned. |
workingjubilee
commented
Dec 17, 2024
??? what is the actuality then? |
This sounds like a statement for 32-bit mode. TMK, in 64-bit mode, Clang produces 8-byte alignment. |
51dcfae to
7bfcddfComparemustartt
commented
Dec 17, 2024
For input values of the parameter, yes, the loads from the stack can be not aligned to the type. But the function local have to have proper alignment.
We do not (at the assembly level) pass pointers to the callee. The incoming parameter is represented as a pointer in the IR (associated to register-sized/aligned memory when not stored in the registers themselves). That is: The alignment is associated with the size of registers (except where a parameter type has an non-packed vector in it). |
hubert-reinterpretcast
commented
Dec 18, 2024
@mustartt, Clang creates the function local separately, does the Rust front-end do so as well? |
mustartt
commented
Dec 18, 2024
Yes, the function locals will have the type's alignment. For example: definei64@rust_func(ptrbyval([16 x i8]) align8%0) unnamed_addr #0personalityptr@rust_eh_personality {
start:
%val = alloca [16 x i8], align16callvoid@llvm.memcpy.p0.p0.i64(ptralign16%val, ptralign8%0, i6416, i1false)
...
} |
| // The AIX ABI expect byval for aggregates | ||
| // See https://github.com/llvm/llvm-project/blob/main/clang/lib/CodeGen/Targets/PPC.cpp. | ||
| // The incoming parameter is represented as a pointer in the IR, | ||
| // the alignment is associated with the size of the register. (align 8 for 64bit) |
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Should there be a TODO regarding PowerPC SIMD vector types (https://doc.rust-lang.org/core/arch/powerpc64/index.html)?
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Probably. Its 16 for vector types?
It's 16 for vector types and aggregates with (non-packed) vector subobjects. There seems to be a bug in Clang for the packed cases.
Nadrieril
commented
Dec 21, 2024
I know nothing about this :) |
wesleywiser
left a comment
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This looks correct to me. Let's cc the AIX target maintainers though: @daltenty@gilamn5tr
wesleywiser
commented
Jan 21, 2025
One more friendly reminder to the target maintainers to see if they spot an issue with this before merging: @daltenty@gilamn5tr |
gilamn5tr
commented
Jan 21, 2025
@wesleywiser We're happy with it for now. LGTM! |
wesleywiser
commented
Jan 21, 2025
Thanks for taking a look @gilamn5tr! @bors r+ |
bors
commented
Jan 21, 2025
daltenty
left a comment
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Confirming this looks good from the AIX target perspective
…iaskrgr Rollup of 10 pull requests Successful merges: - rust-lang#133372 (Refactor dyn-compatibility error and suggestions) - rust-lang#134396 (AIX: use align 8 for byval parameter) - rust-lang#135156 (Make our `DIFlags` match `LLVMDIFlags` in the LLVM-C API) - rust-lang#135816 (Use `structurally_normalize` instead of manual `normalizes-to` goals in alias relate errors) - rust-lang#135823 (make UI tests that use `--test` work on panic=abort targets) - rust-lang#135850 (Update the `wasm-component-ld` tool) - rust-lang#135858 (rustdoc: Finalize dyn compatibility renaming) - rust-lang#135866 (Don't pick `T: FnPtr` nested goals as the leaf goal in diagnostics for new solver) - rust-lang#135874 (Enforce that all spans are lowered in ast lowering) - rust-lang#135875 (Remove `Copy` bound from `enter_forall`) r? `@ghost` `@rustbot` modify labels: rollup
On AIX, byval pointer arguments are aligned to 8 bytes based on the 64bit register size. For example, the C callee https://godbolt.org/z/5f4vnG6bh will expect the following argument.
This case is captured by
run-make/extern-fn-explicit-align