Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R by thejpster · Pull Request #150556 · rust-lang/rust

thejpster · 2025-12-31T22:00:59Z

We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode.

This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected.

However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

rustbot · 2025-12-31T22:01:02Z

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

These commits modify compiler targets.
(See the Target Tier Policy.)

rustbot · 2025-12-31T22:01:05Z

r? @fee1-dead

rustbot has assigned @fee1-dead.
They will have a look at your PR within the next two weeks and either review your PR or reassign to another reviewer.

Use r? to explicitly pick a reviewer

fee1-dead · 2026-01-01T02:51:26Z

@rustbot reroll

rustbot · 2026-01-01T17:16:31Z

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

lcnr · 2026-01-19T10:29:51Z

wooops, sry

@bors compiler

rust-bors · 2026-01-19T10:29:56Z

Unknown command "compiler". Run @bors help to see available commands.

lcnr · 2026-01-19T10:30:03Z

@rustbot reroll

thejpster · 2026-01-22T20:51:57Z

@petrochenkov - I've updated the docs as requested.

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 3 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151065 (abi: add a rust-preserve-none calling convention) - #151505 (Various refactors to the proc_macro bridge) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 7 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151540 (Tweak bounds check in `DepNodeColorMap.get`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 6 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151346 (add `simd_splat` intrinsic) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151500 (hexagon: Add HVX target features) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

Rollup merge of #150556 - thejpster:add-thumbv7a-thumbv7r-thumbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

…c, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR rust-lang#150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

Rollup merge of #155723 - cezarbbb:fix-thumb-target-tier-spec, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR #150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

thejpster · 2025-12-31T22:00:59Z

We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode.

This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected.

However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

rustbot · 2025-12-31T22:01:02Z

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

These commits modify compiler targets.
(See the Target Tier Policy.)

rustbot · 2025-12-31T22:01:05Z

r? @fee1-dead

rustbot has assigned @fee1-dead.
They will have a look at your PR within the next two weeks and either review your PR or reassign to another reviewer.

Use r? to explicitly pick a reviewer

fee1-dead · 2026-01-01T02:51:26Z

@rustbot reroll

rustbot · 2026-01-01T17:16:31Z

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

lcnr · 2026-01-19T10:29:51Z

wooops, sry

@bors compiler

rust-bors · 2026-01-19T10:29:56Z

Unknown command "compiler". Run @bors help to see available commands.

lcnr · 2026-01-19T10:30:03Z

@rustbot reroll

thejpster · 2026-01-22T20:51:57Z

@petrochenkov - I've updated the docs as requested.

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 3 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151065 (abi: add a rust-preserve-none calling convention) - #151505 (Various refactors to the proc_macro bridge) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 7 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151540 (Tweak bounds check in `DepNodeColorMap.get`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 6 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151346 (add `simd_splat` intrinsic) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151500 (hexagon: Add HVX target features) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

Rollup merge of #150556 - thejpster:add-thumbv7a-thumbv7r-thumbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

…c, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR rust-lang#150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

Rollup merge of #155723 - cezarbbb:fix-thumb-target-tier-spec, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR #150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

thejpster · 2025-12-31T22:00:59Z

We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode.

This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected.

However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

rustbot · 2025-12-31T22:01:02Z

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

These commits modify compiler targets.
(See the Target Tier Policy.)

rustbot · 2025-12-31T22:01:05Z

r? @fee1-dead

rustbot has assigned @fee1-dead.
They will have a look at your PR within the next two weeks and either review your PR or reassign to another reviewer.

Use r? to explicitly pick a reviewer

fee1-dead · 2026-01-01T02:51:26Z

@rustbot reroll

rustbot · 2026-01-01T17:16:31Z

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

lcnr · 2026-01-19T10:29:51Z

wooops, sry

@bors compiler

rust-bors · 2026-01-19T10:29:56Z

Unknown command "compiler". Run @bors help to see available commands.

lcnr · 2026-01-19T10:30:03Z

@rustbot reroll

thejpster · 2026-01-22T20:51:57Z

@petrochenkov - I've updated the docs as requested.

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 3 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151065 (abi: add a rust-preserve-none calling convention) - #151505 (Various refactors to the proc_macro bridge) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 7 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151540 (Tweak bounds check in `DepNodeColorMap.get`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 6 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151346 (add `simd_splat` intrinsic) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151500 (hexagon: Add HVX target features) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

Rollup merge of #150556 - thejpster:add-thumbv7a-thumbv7r-thumbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

…c, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR rust-lang#150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

Rollup merge of #155723 - cezarbbb:fix-thumb-target-tier-spec, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR #150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

thejpster · 2025-12-31T22:00:59Z

We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode.

This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected.

However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

rustbot · 2025-12-31T22:01:02Z

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

These commits modify compiler targets.
(See the Target Tier Policy.)

rustbot · 2025-12-31T22:01:05Z

r? @fee1-dead

rustbot has assigned @fee1-dead.
They will have a look at your PR within the next two weeks and either review your PR or reassign to another reviewer.

Use r? to explicitly pick a reviewer

fee1-dead · 2026-01-01T02:51:26Z

@rustbot reroll

rustbot · 2026-01-01T17:16:31Z

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

lcnr · 2026-01-19T10:29:51Z

wooops, sry

@bors compiler

rust-bors · 2026-01-19T10:29:56Z

Unknown command "compiler". Run @bors help to see available commands.

lcnr · 2026-01-19T10:30:03Z

@rustbot reroll

thejpster · 2026-01-22T20:51:57Z

@petrochenkov - I've updated the docs as requested.

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 3 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151065 (abi: add a rust-preserve-none calling convention) - #151505 (Various refactors to the proc_macro bridge) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 7 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151540 (Tweak bounds check in `DepNodeColorMap.get`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 6 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151346 (add `simd_splat` intrinsic) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151500 (hexagon: Add HVX target features) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

Rollup merge of #150556 - thejpster:add-thumbv7a-thumbv7r-thumbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

…c, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR rust-lang#150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

Rollup merge of #155723 - cezarbbb:fix-thumb-target-tier-spec, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR #150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

thejpster · 2025-12-31T22:00:59Z

We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode.

This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected.

However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

rustbot · 2025-12-31T22:01:02Z

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

These commits modify compiler targets.
(See the Target Tier Policy.)

rustbot · 2025-12-31T22:01:05Z

r? @fee1-dead

rustbot has assigned @fee1-dead.
They will have a look at your PR within the next two weeks and either review your PR or reassign to another reviewer.

Use r? to explicitly pick a reviewer

fee1-dead · 2026-01-01T02:51:26Z

@rustbot reroll

rustbot · 2026-01-01T17:16:31Z

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

lcnr · 2026-01-19T10:29:51Z

wooops, sry

@bors compiler

rust-bors · 2026-01-19T10:29:56Z

Unknown command "compiler". Run @bors help to see available commands.

lcnr · 2026-01-19T10:30:03Z

@rustbot reroll

thejpster · 2026-01-22T20:51:57Z

@petrochenkov - I've updated the docs as requested.

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 3 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151065 (abi: add a rust-preserve-none calling convention) - #151505 (Various refactors to the proc_macro bridge) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 7 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151540 (Tweak bounds check in `DepNodeColorMap.get`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 6 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151346 (add `simd_splat` intrinsic) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151500 (hexagon: Add HVX target features) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

Rollup merge of #150556 - thejpster:add-thumbv7a-thumbv7r-thumbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

…c, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR rust-lang#150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

Rollup merge of #155723 - cezarbbb:fix-thumb-target-tier-spec, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR #150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

thejpster · 2025-12-31T22:00:59Z

We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode.

This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected.

However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

rustbot · 2025-12-31T22:01:02Z

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

These commits modify compiler targets.
(See the Target Tier Policy.)

rustbot · 2025-12-31T22:01:05Z

r? @fee1-dead

rustbot has assigned @fee1-dead.
They will have a look at your PR within the next two weeks and either review your PR or reassign to another reviewer.

Use r? to explicitly pick a reviewer

fee1-dead · 2026-01-01T02:51:26Z

@rustbot reroll

rustbot · 2026-01-01T17:16:31Z

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

lcnr · 2026-01-19T10:29:51Z

wooops, sry

@bors compiler

rust-bors · 2026-01-19T10:29:56Z

Unknown command "compiler". Run @bors help to see available commands.

lcnr · 2026-01-19T10:30:03Z

@rustbot reroll

thejpster · 2026-01-22T20:51:57Z

@petrochenkov - I've updated the docs as requested.

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 3 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151065 (abi: add a rust-preserve-none calling convention) - #151505 (Various refactors to the proc_macro bridge) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 7 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151540 (Tweak bounds check in `DepNodeColorMap.get`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 6 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151346 (add `simd_splat` intrinsic) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151500 (hexagon: Add HVX target features) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

Rollup merge of #150556 - thejpster:add-thumbv7a-thumbv7r-thumbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

…c, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR rust-lang#150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

Rollup merge of #155723 - cezarbbb:fix-thumb-target-tier-spec, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR #150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

thejpster · 2025-12-31T22:00:59Z

We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode.

This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected.

However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

rustbot · 2025-12-31T22:01:02Z

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

These commits modify compiler targets.
(See the Target Tier Policy.)

rustbot · 2025-12-31T22:01:05Z

r? @fee1-dead

rustbot has assigned @fee1-dead.
They will have a look at your PR within the next two weeks and either review your PR or reassign to another reviewer.

Use r? to explicitly pick a reviewer

fee1-dead · 2026-01-01T02:51:26Z

@rustbot reroll

rustbot · 2026-01-01T17:16:31Z

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

lcnr · 2026-01-19T10:29:51Z

wooops, sry

@bors compiler

rust-bors · 2026-01-19T10:29:56Z

Unknown command "compiler". Run @bors help to see available commands.

lcnr · 2026-01-19T10:30:03Z

@rustbot reroll

thejpster · 2026-01-22T20:51:57Z

@petrochenkov - I've updated the docs as requested.

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 3 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151065 (abi: add a rust-preserve-none calling convention) - #151505 (Various refactors to the proc_macro bridge) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 7 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151540 (Tweak bounds check in `DepNodeColorMap.get`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 6 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151346 (add `simd_splat` intrinsic) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151500 (hexagon: Add HVX target features) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

Rollup merge of #150556 - thejpster:add-thumbv7a-thumbv7r-thumbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

…c, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR rust-lang#150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

Rollup merge of #155723 - cezarbbb:fix-thumb-target-tier-spec, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR #150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

thejpster · 2025-12-31T22:00:59Z

We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode.

This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected.

However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

rustbot · 2025-12-31T22:01:02Z

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

These commits modify compiler targets.
(See the Target Tier Policy.)

rustbot · 2025-12-31T22:01:05Z

r? @fee1-dead

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fee1-dead · 2026-01-01T02:51:26Z

@rustbot reroll

rustbot · 2026-01-01T17:16:31Z

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

lcnr · 2026-01-19T10:29:51Z

wooops, sry

@bors compiler

rust-bors · 2026-01-19T10:29:56Z

Unknown command "compiler". Run @bors help to see available commands.

lcnr · 2026-01-19T10:30:03Z

@rustbot reroll

thejpster · 2026-01-22T20:51:57Z

@petrochenkov - I've updated the docs as requested.

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 3 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151065 (abi: add a rust-preserve-none calling convention) - #151505 (Various refactors to the proc_macro bridge) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 7 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151540 (Tweak bounds check in `DepNodeColorMap.get`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 6 pull requests Successful merges: - #149848 (Use allocator_shim_contents in allocator_shim_symbols) - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151346 (add `simd_splat` intrinsic) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151500 (hexagon: Add HVX target features) - #151505 (Various refactors to the proc_macro bridge) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

…umbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

@ghost

…uwer Rollup of 8 pull requests Successful merges: - #150556 (Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R) - #151259 (Fix is_ascii performance regression on AVX-512 CPUs when compiling with -C target-cpu=native) - #151500 (hexagon: Add HVX target features) - #151517 (Enable reproducible binary builds with debuginfo on Linux) - #151482 (Add "Skip to main content" link for keyboard navigation in rustdoc) - #151489 (constify boolean methods) - #151551 (Don't use default build-script fingerprinting in `test`) - #151555 (Fix compilation of std/src/sys/pal/uefi/tests.rs) r? @ghost

Rollup merge of #150556 - thejpster:add-thumbv7a-thumbv7r-thumbv8r, r=petrochenkov Add Tier 3 Thumb-mode targets for Armv7-A, Armv7-R and Armv8-R We currently have targets for bare-metal Armv7-R, Armv7-A and Armv8-R, but only in Arm mode. This PR adds five new targets enabling bare-metal support on these architectures in Thumb mode. This has been tested using https://github.com/rust-embedded/aarch32/compare/main...thejpster:aarch32:support-thumb-mode-v7-v8?expand=1 and they all seem to work as expected. However, I wasn't sure what to do with the maintainer lists as these are five new targets, but they share the docs page with the existing Arm versions. I can ask the Embedded Devices WG Arm Team about taking on these ones too, but whether Arm themselves want to take them on I guess is a bigger question.

…c, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR rust-lang#150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

Rollup merge of #155723 - cezarbbb:fix-thumb-target-tier-spec, r=wesleywiser Fix tier level for 5 thumb bare-metal ARM targets The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR #150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved. This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs: thumbv7a-none-eabi thumbv7a-none-eabihf thumbv7r-none-eabi thumbv7r-none-eabihf thumbv8r-none-eabihf PS: No doc changes needed — they already correctly state Tier 3. r?

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thejpster force-pushed the add-thumbv7a-thumbv7r-thumbv8r branch from a338091 to a556210Compare January 1, 2026 17:16

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thejpster added 3 commits January 22, 2026 18:37

Rationalise the Armv7-A, Armv7-R and Armv8-R bare-metal target configs
5dd7c0b

Add Thumb-mode targets for Armv7-R, Armv7-A and Armv8-R.
96647dd

Update SUMMARY.md too
fb05cac

thejpster force-pushed the add-thumbv7a-thumbv7r-thumbv8r branch from 809a1a5 to fb05cacCompare January 22, 2026 18:37

thejpster added 3 commits January 22, 2026 20:48

Ensure armv7a-none-eabi.md mentions all four targets
0a2bb4b

Ensure armv7r-none-eabi.md mentions all four targets
19d1be5

Update armv8r-none-eabi.md - note both targets are hardfloat
fa526c4

thejpster force-pushed the add-thumbv7a-thumbv7r-thumbv8r branch from 75afffe to fa526c4Compare January 22, 2026 20:51

rust-borsBot added S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Jan 23, 2026

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rust-borsBot merged commit 42c3cae into rust-lang:mainJan 24, 2026
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madsmtm mentioned this pull request Jan 29, 2026
Update src/target/generated.rs rust-lang/cc-rs#1667
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Fix tier level for 5 thumb bare-metal ARM targets #155723
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