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Replace usages of ..i + 1 ranges with ..=i. - #56516

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Dec 7, 2018
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Replace usages of ..i + 1 ranges with ..=i.#56516
bors merged 1 commit into
rust-lang:masterfrom
frewsxcv:frewsxcv-eq

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@frewsxcv

@frewsxcvfrewsxcv commented Dec 4, 2018•
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Before this change we were using old computer code techniques. After this change we use the new and improved computer code techniques.

@frewsxcv
frewsxcvforce-pushed the frewsxcv-eq branch 2 times, most recently from cfd8fdd to 33de72bCompareDecember 4, 2018 19:37
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@leonardo-m

leonardo-m commented Dec 5, 2018

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Before merging this I suggest to take a look at the performance effects. Because closed intervals still are slower (but such lower performance is significant only in some situations).

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frewsxcv commented Dec 5, 2018

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@leonardo-m Is there an issue in this repo for tracking such performance issues?

@Dylan-DPC-zzDylan-DPC-zz added the S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. label Dec 5, 2018
@kennytm

kennytm commented Dec 5, 2018

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@leonardo-m#45222 has been closed pretty long time ago.

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leonardo-m commented Dec 5, 2018

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I know, and the problem isn't solved well yet. I'll have to reopen that issue or create a new one...

@leonardo-mleonardo-m mentioned this pull request Dec 6, 2018
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leonardo-m commented Dec 6, 2018

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I've added a little example in Issue #45222.

@kennytm

kennytm commented Dec 6, 2018

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@bors try

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bors commented Dec 6, 2018

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⌛ Trying commit c025d61 with merge 941e2d7...

bors added a commit that referenced this pull request Dec 6, 2018
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Auto merge of#56516- frewsxcv:frewsxcv-eq, r=<try>
941e2d7
Replace usages of `..i + 1` ranges with `..=i`.
Before this change we were using old computer code techniques. After this change we use the new and improved computer code techniques.
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bors commented Dec 6, 2018

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☀️ Test successful - status-travis
State: approved= try=True

@kennytm

kennytm commented Dec 6, 2018

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@rust-timer build 941e2d7

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rust-timer commented Dec 6, 2018

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Success: Queued 941e2d7 with parent 77a6a61, comparison URL.

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rust-timer commented Dec 6, 2018

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Finished benchmarking try commit 941e2d7

@frewsxcv

frewsxcv commented Dec 6, 2018

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Doesn't like like there's much of a difference in performance, right?

@Mark-Simulacrum

Mark-Simulacrum commented Dec 6, 2018

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Largely as expected -- ranges are almost definitively not where the compiler spends its time. I'm okay landing this from a performance perspective.

@Centril

Centril commented Dec 7, 2018

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r? @Mark-Simulacrum

@estebank

estebank commented Dec 7, 2018

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@bors r=Mark-Simulacrum (as there haven't been any updates to the PR since @Mark-Simulacrum last looked at it and it indeed looks fine to merge)

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bors commented Dec 7, 2018

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📌 Commit c025d61 has been approved by Mark-Simulacrum

@borsbors added S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Dec 7, 2018
kennytm added a commit to kennytm/rust that referenced this pull request Dec 7, 2018
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Rollup merge ofrust-lang#56516- frewsxcv:frewsxcv-eq, r=Mark-Simula…
0e41ef1
…crum
Replace usages of `..i + 1` ranges with `..=i`.
Before this change we were using old computer code techniques. After this change we use the new and improved computer code techniques.
@kennytmkennytm mentioned this pull request Dec 7, 2018
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bors added a commit that referenced this pull request Dec 7, 2018
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Auto merge of#56581- kennytm:rollup, r=kennytm
fc84f5f
Rollup of 7 pull requests
Successful merges:
- #56000 (Add Armv8-M Mainline targets)
- #56250 (Introduce ptr::hash for references)
- #56434 (Improve query cycle errors for parallel queries)
- #56516 (Replace usages of `..i + 1` ranges with `..=i`.)
- #56555 (Send textual profile data to stderr, not stdout)
- #56561 (Fix bug in from_key_hashed_nocheck)
- #56574 (Fix a stutter in the docs for slice::exact_chunks)
Failed merges:
r? @ghost
@bors
bors merged commit c025d61 into rust-lang:masterDec 7, 2018
@frewsxcv
frewsxcv deleted the frewsxcv-eq branch December 10, 2018 04:16
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@frewsxcv@rust-highfive@leonardo-m@kennytm@bors@rust-timer@Mark-Simulacrum@Centril@estebank@Dylan-DPC-zz