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Add asm!() support for hexagon - #73214
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Jun 10, 2020
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r? @estebank (rust_highfive has picked a reviewer for you, use r? to override) |
androm3da
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Jun 10, 2020
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r? @Amanieu This is probably a good start for inline asm w/Hexagon. Missing overlapping regs implementation and more tests. Not many of the registers defined so far actually overlap, just p3_0 and p3/p2/p1/p0 I think. Haven't quite deciphered the logic in the other targets' macro-based implementation, but I'll figure it out. |
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This dont_merge might not be necessary here. I just threw this in because it seemed like the functions were reordered and I didn't know if function merging was responsible.
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Function reordering can't be the issue, CHECK-LABEL should handle that for you automatically.
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rust-highfive
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The job Click to expand the log.I'm a bot! I can only do what humans tell me to, so if this was not helpful or you have suggestions for improvements, please ping or otherwise contact |
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HVX test is failing and predicate registers aren't implemented/tested yet.
Incorporated some review feedback.
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Amanieu
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The job Click to expand the log.I'm a bot! I can only do what humans tell me to, so if this was not helpful or you have suggestions for improvements, please ping or otherwise contact |
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I think this failure is CI infrastructure related. Can I just retry it? |
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Amanieu
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You only need to test one pointer type here, they are all treated identically by the backend.
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ptr_mut_32 is not used anywhere. I would also recommend renaming ptr_32 to just ptr for consistency with the other asm tests.
Amanieu
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Jun 12, 2020
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You can find the set of constraint codes and types supported by LLVM here. |
androm3da
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Yeah, sorry, we just don't have support for these all upstreamed yet. I'll get on it. |
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Thanks for your guidance @Amanieu ! Hopefully we can consider adding just support for general purpose regs for now and I can follow up with changes to support pairs. And after I push up some backend stuff I can add vector regs and more. |
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The LLVM modifier is actually None. This is not the same thing as the constraint code.
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Add sp, lr and fr as aliases for x29, x30 and x31 in the register names tables.
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The target feature should be None: general-purpose registers are always available.
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@bors r+ |
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📌 Commit 7a9f29d has been approved by |
| | ------------ | -------------------- | ------ | | ||
| | All | `sp` | The stack pointer must be restored to its original value at the end of an asm code block. | | ||
| | All | `bp` (x86), `r11` (ARM), `x29` (AArch64), `x8` (RISC-V) | The frame pointer cannot be used as an input or output. | | ||
| | All | `bp` (x86), `r11` (ARM), `x29` (AArch64), `x8` (RISC-V), `fr` (Hexagon) | The frame pointer cannot be used as an input or output. | |
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All registers can be used as inputs on Hexagon, that is the architecture doesn't not differentiate between r0 and r29 or r30, except for a small set of instructions which require fewer bits to encode registers. As a matter of fact, most loads/stores to stack are done via r29 or r30 (i.e. sp or fp), and a return from a function that does not allocate stack space is done via jumpr r31.
All of these registers can also be modified, but that's typically a bad idea.
Dylan-DPC-zz pushed a commit
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Jun 17, 2020
Add asm!() support for hexagon
tmandry added a commit
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Jun 17, 2020
Add asm!() support for hexagon
bors added a commit
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Jun 19, 2020
…arth Rollup of 13 pull requests Successful merges: - rust-lang#71568 (Document unsafety in slice/sort.rs) - rust-lang#72709 (`#[deny(unsafe_op_in_unsafe_fn)]` in liballoc) - rust-lang#73214 (Add asm!() support for hexagon) - rust-lang#73248 (save_analysis: improve handling of enum struct variant) - rust-lang#73257 (ty: projections in `transparent_newtype_field`) - rust-lang#73261 (Suggest `?Sized` when applicable for ADTs) - rust-lang#73300 (Implement crate-level-only lints checking.) - rust-lang#73334 (Note numeric literals that can never fit in an expected type) - rust-lang#73357 (Use `LocalDefId` for import IDs in trait map) - rust-lang#73364 (asm: Allow multiple template string arguments; interpret them as newline-separated) - rust-lang#73382 (Only display other method receiver candidates if they actually apply) - rust-lang#73465 (Add specialization of `ToString for char`) - rust-lang#73489 (Refactor hir::Place) Failed merges: r? @ghost
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Add asm!() support for PowerPC This includes GPRs and FPRs only. Note that this does not include PowerPC64. For my reference, this was mostly duplicated from PR rust-lang#73214.
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May 26, 2026
…ock_stream Slice 4c needs a way to get a VsockStream from the running VM handle that VzRuntime owns. This commit adds the bridge method so the macOS tray (which can't directly access the private vm_handle module) can plug pty_vsock_bridge::spawn_pty_bridge against a live VM connection. VzRuntime::open_vsock_stream(port, timeout) -> Result<VsockStream, OpenVsockError> - macOS-only (cfg-gated). Async wrapper around the blocking connect_to_vm_vsock (which must pump the CFRunLoop for VZ's completion handler). - Clones the existing vm_handle::VmHandle out of the Mutex<Option<>> slot (Send via the unsafe impl on VmHandle), moves it into a spawn_blocking worker, calls connect_to_vm_vsock, wraps the resulting VsockFd via VsockStream::from_vsock_fd, returns the AsyncRead+AsyncWrite stream. - Workaround for Rust 2021 closure field-projection: the closure forces full-struct capture via `let _force_full_capture = &send_handle` so the wrapper's unsafe Send applies. Documented with the rust-lang/rust#73214 issue reference. New error enum OpenVsockError with variants: - VmNotStarted (most common; common first-launch path before m5) - LockPoisoned(String) - Join(String) — spawn_blocking task panic - Connect(ConnectError) — VZ-level connect failure - Stream(io::Error) — fcntl/AsyncFd wrap failure New test open_vsock_stream_errors_when_vm_not_started covers the gating path (the happy path requires a booted VM and is exercised by the macOS tray's manual smoke once m5 lands). Tests: vm-layer 51/51 pass with --features materialize (was 50; +1 gating test). macos-tray 24/24 unchanged (no integration yet). Slice 4c proper (next macOS slice) wires action_host.rs's openShell to: open_vsock_stream -> spawn_pty_bridge -> handshake -> PtySession::open(launch_spec(Shell)) -> pump_io with a host UnixPtyMaster -> spawn Terminal.app pointed at the master's slave path. Gated end-to-end on m5 (booted VM with forge container) but each adapter piece is now testable in isolation. @trace plan/steps/20-macos-tray-v0_0_1.md (m4 sub-task B slice 4c precursor) Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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