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Correct some wrong uses of LLVM intrinsics - #2144

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adamgemmell merged 2 commits into
rust-lang:mainfrom
sayantn:llvm-intrinsics
Jun 10, 2026
Merged

Correct some wrong uses of LLVM intrinsics#2144
adamgemmell merged 2 commits into
rust-lang:mainfrom
sayantn:llvm-intrinsics

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@sayantn

@sayantnsayantn commented May 31, 2026

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There were some small mistakes in the LLVM intrinsics, these were autoupgraded by LLVM so the builds passed. Also replaces all extern "C" LLVM intrinsics blocks with extern "unadjusted"

AArch64

cc @adamgemmell

  • wrong type parameter in neon.vluti4q.lane
  • missing type parameter in prefetch
  • typo in sve.{and,bic,eor,orr,orn}.z
  • extra .x in sve.fcmla.lane and sve.frecpx
  • trailing whitespace in sve.expa.x
  • one missing type parameter in sve.fmmla
  • splitting svcvt in two parts, because same size operands need a different intrinsic

x86

  • missing type parameter in prefetch

NVPTX

I don't know who to cc here, the file was last modified by @gnzlbg but he doesn't seem active here anymore

  • deprecated intrinsic llvm.nvvm.barrier0 used

WASM32

cc @alexcrichton

  • missing type parameter in llvm.wasm.memory.{grow,size}

r? @folkertdev

@folkertdev

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Out of curiosity, how did you find these?

@sayantn

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Out of curiosity, how did you find these?

A modified version of rust-lang/rust#157145

Comment threadcrates/core_arch/src/mips/msa.rs

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This looks fine to me, but maybe target maintainers have thoughts?

Also I wonder if this breaks with LLVM 21 at all?

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Comment threadcrates/core_arch/src/wasm32/memory.rs
@alexcrichton

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wasm bits lgtm, thanks!

@sayantn
sayantn requested a review from adamgemmellJune 2, 2026 19:25

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Looks good, thanks you!

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@adamgemmell
adamgemmell added this pull request to the merge queueJun 10, 2026
Merged via the queue into rust-lang:main with commit 4ca0638Jun 10, 2026
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5 participants

@sayantn@folkertdev@alexcrichton@adamgemmell@bjorn3