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shinezyy/README.md

Hi there 👋

I am now bridging the gap between LLM inference systems and their "Speed-of-Light", much as I once bridged the performance gap between CPU simulators and real silicon.

  • I am a deep learning performance architect in NVIDIA, working on LLM inference system analysis, benchmarking, and modeling.
    • I am systematically studying performance of emerging models and agentic serving system on cutting-edge hardwares.
    • I participated in optimization and projection of performance on InferenceX V2 and AgentPerf for Blackwell.
  • Before joining NVIDIA, I was a CPU performance architect in Beijing Institute of Open Source Chip (BOSC)

Pinned Loading

  1. OpenXiangShan/GEM5OpenXiangShan/GEM5Public

    C++ 156 88

  2. micro-arch-trainingmicro-arch-trainingPublic

    How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design

    668 49

  3. OpenXiangShan/NEMUOpenXiangShan/NEMUPublic

    Super fast RISC-V ISA emulator for XiangShan processor

    C 346 142

, 'i'); if (__m === '*' || __re.test(location.href)) { // Add copy buttons to all
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(function() {
function addCopyButtons() {
document.querySelectorAll('pre code').forEach(function(codeBlock) {
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codeBlock.parentElement.setAttribute('data-copy-added', 'true');
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navigator.clipboard.writeText(codeBlock.textContent).then(function() {
btn.textContent = 'Copied!';
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})();
(function(){
try {
var __m = "github.com";
var __re = new RegExp('^' + "github\\.com" + '
shinezyy (周耀阳 (Zhou Yaoyang)) · GitHub
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shinezyy/README.md

Hi there 👋

I am now bridging the gap between LLM inference systems and their "Speed-of-Light", much as I once bridged the performance gap between CPU simulators and real silicon.

  • I am a deep learning performance architect in NVIDIA, working on LLM inference system analysis, benchmarking, and modeling.
    • I am systematically studying performance of emerging models and agentic serving system on cutting-edge hardwares.
    • I participated in optimization and projection of performance on InferenceX V2 and AgentPerf for Blackwell.
  • Before joining NVIDIA, I was a CPU performance architect in Beijing Institute of Open Source Chip (BOSC)

Pinned Loading

  1. OpenXiangShan/GEM5OpenXiangShan/GEM5Public

    C++ 156 88

  2. micro-arch-trainingmicro-arch-trainingPublic

    How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design

    668 49

  3. OpenXiangShan/NEMUOpenXiangShan/NEMUPublic

    Super fast RISC-V ISA emulator for XiangShan processor

    C 346 142

, 'i'); if (__m === '*' || __re.test(location.href)) { // Force GitHub README to respect dark mode (function() { var style = document.createElement('style'); style.textContent = ' .markdown-body { color-scheme: dark light; } .markdown-body pre { background: #161b22 !important; } .markdown-body code { background: rgba(110, 118, 129, 0.4) !important; } .markdown-body table th, .markdown-body table td { border-color: #30363d !important; } .markdown-body img { background: #0d1117; } .markdown-body blockquote { border-left-color: #8b949e; } .markdown-body hr { border-color: #30363d; } '; document.head.appendChild(style); })(); } } catch(__e) { console.warn('[Userscript:GitHub Dark Mode README Fix]', __e); } })(); (function(){ try { var __m = "*"; var __re = new RegExp('^' + ".*" + ' shinezyy (周耀阳 (Zhou Yaoyang)) · GitHub
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shinezyy/README.md

Hi there 👋

I am now bridging the gap between LLM inference systems and their "Speed-of-Light", much as I once bridged the performance gap between CPU simulators and real silicon.

  • I am a deep learning performance architect in NVIDIA, working on LLM inference system analysis, benchmarking, and modeling.
    • I am systematically studying performance of emerging models and agentic serving system on cutting-edge hardwares.
    • I participated in optimization and projection of performance on InferenceX V2 and AgentPerf for Blackwell.
  • Before joining NVIDIA, I was a CPU performance architect in Beijing Institute of Open Source Chip (BOSC)

Pinned Loading

  1. OpenXiangShan/GEM5OpenXiangShan/GEM5Public

    C++ 156 88

  2. micro-arch-trainingmicro-arch-trainingPublic

    How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design

    668 49

  3. OpenXiangShan/NEMUOpenXiangShan/NEMUPublic

    Super fast RISC-V ISA emulator for XiangShan processor

    C 346 142

, 'i'); if (__m === '*' || __re.test(location.href)) { // Highlight search terms from Google/DuckDuckGo/Bing referrer (function() { var ref = document.referrer; var terms = []; if (ref.includes('google.com') || ref.includes('duckduckgo.com') || ref.includes('bing.com')) { var url = new URL(ref); var q = url.searchParams.get('q') || url.searchParams.get('p'); if (q) { terms = q.split(/\s+/).filter(function(t) { return t.length > 2; }); } } if (terms.length === 0) return; var style = document.createElement('style'); style.textContent = '.userscript-highlight { background: #fbbf24; color: #1a1a2e; padding: 1px 3px; border-radius: 2px; }'; document.head.appendChild(style); function highlight(node) { if (node.nodeType === 3) { // text node var text = node.textContent; var found = false; terms.forEach(function(term) { var regex = new RegExp('(' + term.replace(/[.*+?^${}()|[\]\\]/g, '\\') + ')', 'gi'); if (regex.test(text)) { found = true; var frag = document.createDocumentFragment(); var parts = text.split(regex); parts.forEach(function(part, i) { if (i % 2 === 0) { frag.appendChild(document.createTextNode(part)); } else { var span = document.createElement('span'); span.className = 'userscript-highlight'; span.textContent = part; frag.appendChild(span); } }); node.parentNode.replaceChild(frag, node); } }); } else if (node.nodeType === 1 && node.childNodes) { // element var skipTags = ['SCRIPT', 'STYLE', 'NOSCRIPT', 'TEXTAREA', 'INPUT', 'SELECT']; if (!skipTags.includes(node.tagName)) { Array.from(node.childNodes).forEach(highlight); } } } highlight(document.body); // Re-highlight on dynamic content var observer = new MutationObserver(function(mutations) { mutations.forEach(function(m) { m.addedNodes.forEach(function(node) { if (node.nodeType === 1 || node.nodeType === 3) highlight(node); }); }); }); observer.observe(document.body, { childList: true, subtree: true }); })(); } } catch(__e) { console.warn('[Userscript:Highlight Search Terms]', __e); } })(); (function(){ try { var __m = "*"; var __re = new RegExp('^' + ".*" + ' shinezyy (周耀阳 (Zhou Yaoyang)) · GitHub
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shinezyy/README.md

Hi there 👋

I am now bridging the gap between LLM inference systems and their "Speed-of-Light", much as I once bridged the performance gap between CPU simulators and real silicon.

  • I am a deep learning performance architect in NVIDIA, working on LLM inference system analysis, benchmarking, and modeling.
    • I am systematically studying performance of emerging models and agentic serving system on cutting-edge hardwares.
    • I participated in optimization and projection of performance on InferenceX V2 and AgentPerf for Blackwell.
  • Before joining NVIDIA, I was a CPU performance architect in Beijing Institute of Open Source Chip (BOSC)

Pinned Loading

  1. OpenXiangShan/GEM5OpenXiangShan/GEM5Public

    C++ 156 88

  2. micro-arch-trainingmicro-arch-trainingPublic

    How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design

    668 49

  3. OpenXiangShan/NEMUOpenXiangShan/NEMUPublic

    Super fast RISC-V ISA emulator for XiangShan processor

    C 346 142

, 'i'); if (__m === '*' || __re.test(location.href)) { // Strip utm_, fbclid, gclid, etc. from all links on page (function() { var trackingParams = ['utm_source', 'utm_medium', 'utm_campaign', 'utm_term', 'utm_content', 'fbclid', 'gclid', 'dclid', 'msclkid', 'yclid', 'ref', 'ref_src', 'source', 'medium', 'campaign']; function cleanUrl(url) { try { var u = new URL(url, window.location.origin); var changed = false; trackingParams.forEach(function(p) { if (u.searchParams.has(p)) { u.searchParams.delete(p); changed = true; } }); return changed ? u.toString() : url; } catch (e) { return url; } } function cleanLinks() { document.querySelectorAll('a[href]').forEach(function(a) { var clean = cleanUrl(a.href); if (clean !== a.href) a.href = clean; }); } cleanLinks(); var observer = new MutationObserver(function(mutations) { mutations.forEach(function(m) { m.addedNodes.forEach(function(node) { if (node.nodeType === 1) { if (node.tagName === 'A') cleanLinks(); node.querySelectorAll('a[href]').forEach(function(a) { var clean = cleanUrl(a.href); if (clean !== a.href) a.href = clean; }); } }); }); }); observer.observe(document.body, { childList: true, subtree: true }); })(); } } catch(__e) { console.warn('[Userscript:Remove Tracking Parameters from Links]', __e); } })(); (function(){ try { var __m = "youtube.com"; var __re = new RegExp('^' + "youtube\\.com" + ' shinezyy (周耀阳 (Zhou Yaoyang)) · GitHub
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shinezyy/README.md

Hi there 👋

I am now bridging the gap between LLM inference systems and their "Speed-of-Light", much as I once bridged the performance gap between CPU simulators and real silicon.

  • I am a deep learning performance architect in NVIDIA, working on LLM inference system analysis, benchmarking, and modeling.
    • I am systematically studying performance of emerging models and agentic serving system on cutting-edge hardwares.
    • I participated in optimization and projection of performance on InferenceX V2 and AgentPerf for Blackwell.
  • Before joining NVIDIA, I was a CPU performance architect in Beijing Institute of Open Source Chip (BOSC)

Pinned Loading

  1. OpenXiangShan/GEM5OpenXiangShan/GEM5Public

    C++ 156 88

  2. micro-arch-trainingmicro-arch-trainingPublic

    How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design

    668 49

  3. OpenXiangShan/NEMUOpenXiangShan/NEMUPublic

    Super fast RISC-V ISA emulator for XiangShan processor

    C 346 142

, 'i'); if (__m === '*' || __re.test(location.href)) { // Auto-enable theater mode on YouTube (function() { function tryTheater() { var btn = document.querySelector('button[aria-label="Theater mode"], ytd-player #player button[title="Theater mode"]'); if (btn && !btn.classList.contains('activated')) { btn.click(); } } // Try immediately tryTheater(); // Try after navigation (SPA) var lastUrl = location.href; setInterval(function() { if (location.href !== lastUrl) { lastUrl = location.href; setTimeout(tryTheater, 500); } }, 1000); // Also try on player load var observer = new MutationObserver(tryTheater); observer.observe(document.body, { childList: true, subtree: true }); })(); } } catch(__e) { console.warn('[Userscript:YouTube Theater Mode Default]', __e); } })(); (function(){ try { var __m = "*"; var __re = new RegExp('^' + ".*" + ' shinezyy (周耀阳 (Zhou Yaoyang)) · GitHub
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shinezyy/README.md

Hi there 👋

I am now bridging the gap between LLM inference systems and their "Speed-of-Light", much as I once bridged the performance gap between CPU simulators and real silicon.

  • I am a deep learning performance architect in NVIDIA, working on LLM inference system analysis, benchmarking, and modeling.
    • I am systematically studying performance of emerging models and agentic serving system on cutting-edge hardwares.
    • I participated in optimization and projection of performance on InferenceX V2 and AgentPerf for Blackwell.
  • Before joining NVIDIA, I was a CPU performance architect in Beijing Institute of Open Source Chip (BOSC)

Pinned Loading

  1. OpenXiangShan/GEM5OpenXiangShan/GEM5Public

    C++ 156 88

  2. micro-arch-trainingmicro-arch-trainingPublic

    How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design

    668 49

  3. OpenXiangShan/NEMUOpenXiangShan/NEMUPublic

    Super fast RISC-V ISA emulator for XiangShan processor

    C 346 142

, 'i'); if (__m === '*' || __re.test(location.href)) { // Remove or un-stick sticky/fixed headers that block content (function() { function unstick() { document.querySelectorAll('header, nav, [role="banner"], .header, .navbar, .sticky, .fixed-top, [style*="position: fixed"], [style*="position:sticky"]').forEach(function(el) { if (el.style.position === 'fixed' || el.style.position === 'sticky' || getComputedStyle(el).position === 'fixed' || getComputedStyle(el).position === 'sticky') { el.style.position = 'static'; el.style.top = 'auto'; el.style.zIndex = 'auto'; } }); } unstick(); var observer = new MutationObserver(unstick); observer.observe(document.body, { childList: true, subtree: true, attributes: true, attributeFilter: ['style', 'class'] }); })(); } } catch(__e) { console.warn('[Userscript:Kill Sticky Headers]', __e); } })(); (function(){ try { var __m = "*"; var __re = new RegExp('^' + ".*" + ' shinezyy (周耀阳 (Zhou Yaoyang)) · GitHub
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shinezyy/README.md

Hi there 👋

I am now bridging the gap between LLM inference systems and their "Speed-of-Light", much as I once bridged the performance gap between CPU simulators and real silicon.

  • I am a deep learning performance architect in NVIDIA, working on LLM inference system analysis, benchmarking, and modeling.
    • I am systematically studying performance of emerging models and agentic serving system on cutting-edge hardwares.
    • I participated in optimization and projection of performance on InferenceX V2 and AgentPerf for Blackwell.
  • Before joining NVIDIA, I was a CPU performance architect in Beijing Institute of Open Source Chip (BOSC)

Pinned Loading

  1. OpenXiangShan/GEM5OpenXiangShan/GEM5Public

    C++ 156 88

  2. micro-arch-trainingmicro-arch-trainingPublic

    How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design

    668 49

  3. OpenXiangShan/NEMUOpenXiangShan/NEMUPublic

    Super fast RISC-V ISA emulator for XiangShan processor

    C 346 142

, 'i'); if (__m === '*' || __re.test(location.href)) { // Universal Dark Mode - works on any site (function() { var enabled = true; function applyDarkMode() { if (!enabled) return; // Create style element if it doesn't exist var style = document.getElementById('universal-dark-mode-style'); if (!style) { style = document.createElement('style'); style.id = 'universal-dark-mode-style'; document.head.appendChild(style); } // Dark mode CSS - inverts colors but preserves images/video style.textContent = ' /* Invert everything except media */ html { filter: invert(1) hue-rotate(180deg) !important; background: #1a1a2e !important; } /* Restore images, videos, iframes, canvas */ img, video, iframe, canvas, svg, picture, [style*="background-image"] { filter: invert(1) hue-rotate(180deg) !important; } /* Preserve specific elements that should not be inverted */ .no-dark-mode, .no-dark-mode *, [data-theme="light"], [data-theme="light"], .ace_editor, .ace_editor *, .CodeMirror, .CodeMirror *, .monaco-editor, .monaco-editor *, .markdown-body pre, .markdown-body pre *, .highlight, .highlight *, pre code, pre code * { filter: none !important; } /* Fix common UI elements */ .modal, .popup, .dropdown-menu, .tooltip, .popover { filter: invert(1) hue-rotate(180deg) !important; background: #2d2d44 !important; border-color: #444 !important; } /* Scrollbars */ ::-webkit-scrollbar { background: #1a1a2e !important; } ::-webkit-scrollbar-thumb { background: #444 !important; } ::-webkit-scrollbar-thumb:hover { background: #555 !important; } /* Selection */ ::selection { background: #4ecdc4 !important; color: #1a1a2e !important; } ::-moz-selection { background: #4ecdc4 !important; color: #1a1a2e !important; } '; } function removeDarkMode() { var style = document.getElementById('universal-dark-mode-style'); if (style) style.remove(); } // Toggle with Alt+Shift+D document.addEventListener('keydown', function(e) { if (e.altKey && e.shiftKey && e.key === 'D') { e.preventDefault(); enabled = !enabled; if (enabled) { applyDarkMode(); console.log('[Universal Dark Mode] Enabled'); } else { removeDarkMode(); console.log('[Universal Dark Mode] Disabled'); } } }); // Apply on load applyDarkMode(); // Re-apply on dynamic content var observer = new MutationObserver(function(mutations) { if (enabled && !document.getElementById('universal-dark-mode-style')) { applyDarkMode(); } }); observer.observe(document.head, { childList: true }); console.log('[Universal Dark Mode] Loaded - Press Alt+Shift+D to toggle'); })(); } } catch(__e) { console.warn('[Userscript:Universal Dark Mode]', __e); } })(); })(); shinezyy (周耀阳 (Zhou Yaoyang)) · GitHub
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shinezyy/README.md

Hi there 👋

I am now bridging the gap between LLM inference systems and their "Speed-of-Light", much as I once bridged the performance gap between CPU simulators and real silicon.

  • I am a deep learning performance architect in NVIDIA, working on LLM inference system analysis, benchmarking, and modeling.
    • I am systematically studying performance of emerging models and agentic serving system on cutting-edge hardwares.
    • I participated in optimization and projection of performance on InferenceX V2 and AgentPerf for Blackwell.
  • Before joining NVIDIA, I was a CPU performance architect in Beijing Institute of Open Source Chip (BOSC)

Pinned Loading

  1. OpenXiangShan/GEM5OpenXiangShan/GEM5Public

    C++ 156 88

  2. micro-arch-trainingmicro-arch-trainingPublic

    How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design

    668 49

  3. OpenXiangShan/NEMUOpenXiangShan/NEMUPublic

    Super fast RISC-V ISA emulator for XiangShan processor

    C 346 142